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* ARM: mvebu: use clocks property for serial portsThomas Petazzoni2014-04-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | Back when the Armada 370 and Armada XP initial support was introduced, the only way to pass the clock frequency to the of_serial driver was through a clock-frequency Device Tree property. Thanks to 0bbeb3c3e84bc963d1c66661e082d207023b0e5c ('of serial port driver - add clk_get_rate() support'), it is possible to use the standard 'clocks' DT property to reference the clock used for a particular UART controller. This clock is then used by the of_serial driver to retrieve the clock rate. This commit modifies the SoC-level Device Tree files of Armada 370, Armada XP, Armada 375 and Armada 38x to use this possibility. Since there is no gatable clock for the UART controllers, we simply reference the TCLK, which is the main SoC clock for the peripherals. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: switch to the new PMSU binding in Armada 370/XP Device TreeGregory CLEMENT2014-04-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | Following the introduction of the new PMSU Device Tree binding, as well as the separate CPU reset binding, this commit switches the Armada 370 and Armada XP Device Trees to use them. The PMSU node is moved from the Armada XP specific armada-xp.dtsi to the common Armada 370/XP armada-370-xp.dtsi because the PMSU is in fact available at the same location on both SOCs. The CPU reset node is then added on both Armada 370 and Armada XP, with a different compatible string. On Armada 370, the CPU reset driver is not really needed as Armada 370 is single core and the only use of the CPU reset driver is to boot secondary processors, but it still makes sense to have this CPU reset register described in the Device Tree. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable Armada 370/XP watchdog in the devicetreeEzequiel Garcia2014-02-171-0/+6
| | | | | | | | | Add the DT nodes to enable watchdog support available in Armada 370 and Armada XP SoCs. Tested-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: fix register length for Armada XP PMSUThomas Petazzoni2013-12-251-1/+1
| | | | | | | | | | | | | | | | | | | | The per-CPU PMSU registers documented in the datasheet start at 0x22100 and the last register for CPU3 is at 0x22428. However, the DT informations use <0x22100 0x430>, which makes the region end at 0x22530 and not 0x22430. Moreover, looking at the datasheet, we can see that the registers for CPU0 start at 0x22100, for CPU1 at 0x22200, for CPU2 at 0x22300 and for CPU3 at 0x22400. It seems clear that 0x100 bytes of registers have been used per CPU. Therefore, this commit reduces the length of the PMSU per-CPU register area from the incorrect 0x430 bytes to a more logical 0x400 bytes. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: sort DT nodes by addressJason Cooper2013-12-121-50/+50
| | | | | | Prevent future unnecessary merge conflicts Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'omap-for-v3.13/quirk-signed' of ↵Kevin Hilman2013-10-141-0/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren: Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. * tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits) ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it ARM: OMAP2+: Add minimal 8250 support for GPMC ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap ARM: OMAP2+: Add support for auxdata pinctrl: single: Add support for auxdata pinctrl: single: Add support for wake-up interrupts pinctrl: single: Prepare for supporting SoC specific features ARM: OMAP2+: igep0020: use display init from dss-common ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: mvebu: Add clock properties to Armada XP timer nodeEzequiel Garcia2013-09-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | With the addition of the Armada XP reference clock, we can now model accurately the available clock inputs for the timer: namely, nbclk and refclk. For each of this clock inputs we assign a name, for the driver to select as appropriate. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: Add the reference 25 MHz fixed-clock to Armada XPEzequiel Garcia2013-09-181-0/+9
| | | | | | | | | | | | | | | | | | | | | | The Armada XP SoC has a reference 25 MHz fixed-clock that is used in some controllers such as the timer and the watchdog. This commit adds a DT representation of this clock through a fixed-clock compatible node. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: dts: mvebu: Update with the new compatible string for mv64xxx-i2cGregory CLEMENT2013-09-171-0/+10
|/ | | | | | | | | | | | | | | | The mv64xxx-i2c embedded in the Armada XP have a new feature to offload i2c transaction. This new version of the IP come also with some errata. This lead to the introduction to a another compatible string. This commit split the i2c information into armada-370.dtsi and armada-xp.dtsi. Most of the data remains the same and stay in the common file Armada-370-xp.dtsi. With this new feature the size of the registers are bigger for Armada XP and the new compatible string is used. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'dt-3.12' of git://git.infradead.org/linux-mvebu into next/socOlof Johansson2013-08-291-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Jason Cooper: mvebu dt changes for v3.12 - kirkwood - add ZyXEL NSA310 board, fan for ReadyNAS Duo v2 - mvebu - add ReadyNAS 102 board - misc dts updates and changes. v2: - dropped mv64xxx-i2c change * tag 'dt-3.12' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix the Armada 370/XP timer compatible strings ARM: mvebu: use dts pre-processor for readynas 102 ARM: kirkwood: use dts pre-processor for nsa310 boards ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cells ARM: Kirkwood: Add support for another ZyXEL NSA310 variant ARM: mvebu: Add Netgear ReadyNAS 102 board arm: kirkwood: readynas duo v2: Add GMT G762 Fan Controller Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/boot/dts/kirkwood-nsa310.dts
| * ARM: mvebu: Fix the Armada 370/XP timer compatible stringsEzequiel Garcia2013-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "marvell,armada-370-xp-timer" compatible string, together with the "marvell,timer-25Mhz" property are deprecated and should be removed from current DT. Instead, the timer DT nodes are now required to have an appropriate compatible string, which should be either "marvell,armada-370-timer" or "marvell,armada-xp-timer", depending on SoC. The clock property is now required only for Armada 370 so move it accordingly. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: Add BootROM to Armada 370/XP device treeEzequiel Garcia2013-08-061-0/+5
| | | | | | | | | | | | | | | | | | | | | | In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: Add MBus to Armada 370/XP device treeEzequiel Garcia2013-08-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada 370/XP SoC family has a completely configurable address space handled by the MBus controller. This patch introduces the device tree layout of MBus, making the 'soc' node as mbus-compatible. Since every peripheral/controller is a child of this 'soc' node, this makes all of them sit behind the mbus, thus describing the hardware accurately. A translation entry has been added for the internal-regs mapping. This can't be done in the common armada-370-xp.dtsi because A370 and AXP have different addressing width. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: Use the preprocessor on Armada 370/XP device tree filesEzequiel Garcia2013-08-061-1/+1
|/ | | | | | | Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'dt-for-linus' of ↵Linus Torvalds2013-07-021-1/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "These changes from 30 individual branches for the most part update device tree files, but there are also a few source code changes that have crept in this time, usually in order to atomically move over a driver from using hardcoded data to DT probing. A number of platforms change their DT files to use the C preprocessor, which is causing a bit of churn, but that is hopefully only this once" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits) ARM: at91: dt: rm9200ek: add spi support ARM: at91: dt: rm9200: add spi support ARM: at91/DT: at91sam9n12: add SPI DMA client infos ARM: at91/DT: sama5d3: add SPI DMA client infos ARM: at91/DT: fix SPI compatibility string ARM: Kirkwood: Fix the internal register ranges translation ARM: dts: bcm281xx: change comment to C89 style ARM: mmc: bcm281xx SDHCI driver (dt mods) ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support arm: mvebu: enable mini-PCIe connectors on Armada 370 RD ARM: shmobile: irqpin: add a DT property to enable masking on parent ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ...
| * Merge tag 'dt-3.11-5' of git://git.infradead.org/users/jcooper/linux into ↵Olof Johansson2013-06-141-1/+5
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt From Jason Cooper: mvebu dt changes for v3.11 (round 5) - mvebu - set aliases for ethernet interfaces - PCIe range for armada-xp-db - rm unused properties on A370 - kirkwood - assign sheevaplug pinmuxs to correct devices - enable second PCIe port for ts219 * tag 'dt-3.11-5' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: ts219: Enable second PCIe port in DT. ARM: mvebu: Remove device tree unused properties on A370 arm: mvebu: armada-xp-db: ensure PCIe range is specified arm: kirkwood: sheevaplug: move pinmux configs to the right devices ARM: mvebu: set aliases for ethernet controllers Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: mvebu: set aliases for ethernet controllersWilly Tarreau2013-06-041-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | These aliases are used when feeding the DT from ATAGS to set the devices MAC addresses. Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | arm: mvebu: fix length of Ethernet registers area in .dtsiThomas Petazzoni2013-05-281-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | The length of the registers area for the Marvell 370/XP Ethernet controller was incorrect in the .dtsi: 0x2400 while it should have been 0x4000. Until now, this problem wasn't noticed because there was a large static mapping for all I/Os set up by ->map_io(). But since we're going to get rid of this static mapping, we need to ensure that the register areas are properly sized. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: do not duplicate the mpic aliasThomas Petazzoni2013-05-131-1/+1
|/ | | | | | | | | The mpic alias is already defined in the common armada-370-xp.dtsi, so there's no need to repeat it at the armada-xp.dtsi and armada-370.dtsi level. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: dts: mvebu: introduce internal-regs nodeGregory CLEMENT2013-04-151-97/+96
| | | | | | | | | | | Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: dts: mvebu: Convert all the mvebu files to use the range propertyGregory CLEMENT2013-04-151-35/+36
| | | | | | | | | | This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: dts: mvebu: move all peripherals inside socThomas Petazzoni2013-04-151-16/+16
| | | | | | | | | reorganize the .dts and .dtsi files so that all devices are under the soc { } node (currently some devices such as the interrupt controller, the L2 cache and a few others are outside). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'tags/mvebu_fixes_for_v3.9_round3' into mvebu/dtJason Cooper2013-04-151-2/+2
|\ | | | | | | | | | | | | | | | | | | | | pulling in mvebu branches which changes armada*.dts? files for LPAE changes mvebu fixes for v3.9 round 3 - Kirkwood - a couple of small fixes for the Iomega ix2-200 board (ether and led) - mvebu - allow GPIO button to work on Mirabox when running SMP
| * arm: mvebu: Reduce reg-io-width with UARTsHeikki Krogerus2013-03-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting the reg-io-width to 1 byte represents more accurate description of the HW. This will fix an issue where UART driver causes kernel panic during bootup. Gregory CLEMENT traced the issue to autoconfig() in 8250.c, where the existence of FIFO is checked from UART_IIR register. The register is now read as 32-bit value as the reg-io-width is set to 4-bytes. The retuned value seems to contain bogus data for bits 31:8, causing the issue. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: Add thermal support to Armada XP device treeEzequiel Garcia2013-04-031-0/+6
|/ | | | | | | | | | This patch adds support for the thermal controller available in all Armada XP boards. This controller has two 4-byte registers: one to read the thermal sensor, the other for sensor initialization. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Add support for USB host controllers in Armada 370/XPEzequiel Garcia2013-02-281-0/+17
| | | | | | | | | | | | | | The Armada 370 and Armada XP SoC has an Orion EHCI USB controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Improve the SMP support of the interrupt controllerGregory CLEMENT2013-02-281-1/+1
| | | | | | | | | | | | | This patch makes the interrupt controller driver more SMP aware for the Armada XP SoCs. It adds the support for the per-CPU irq. It also adds the implementation for the set_affinity hook. Patch initialy wrote by Yehuda Yitschak and reworked by Gregory CLEMENT. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Armada XP MV78230 has only three Ethernet interfacesThomas Petazzoni2013-01-061-8/+0
| | | | | | | | | | | | | | | | | | | | | | We originally thought that the MV78230 variant of the Armada XP had four Ethernet interfaces, like the other variants MV78260 and MV78460. In fact, this is not true, and the MV78230 has only three Ethernet interfaces. So, the definitions of the Ethernet interfaces is now done as follows: * armada-370-xp.dtsi: definitions of the first two interfaces, that are common to Armada 370 and Armada XP * armada-xp.dtsi: definition of the third interface, common to all Armada XP variants. * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of the fourth interface. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driverGregory CLEMENT2013-01-061-2/+4
| | | | | | | | | | | | | The UART controller used in the Armada 370 and Armada XP SoCs is the Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The improper use of the ns16550 can lead to a kernel oops during boot if a character is sent to the UART before the initialization of the driver. The DW APB has an extra interrupt that gets raised when writing to the LCR when busy. This explains why we need to use dw-apb-uart driver to handle this. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: add Aurora L2 Cache Controller to the DTGregory CLEMENT2012-11-271-0/+7
| | | | | | | | | | | | | | Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Tested-and-reviewed-by: Yehuda Yitschak <yehuday@marvell.com> Tested-and-reviewed-by: Lior Amsalem <alior@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'marvell-armadaxp-smp-for-3.8' of ↵Jason Cooper2012-11-211-1/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything SMP support for Armada XP The purpose of this series is to add the SMP support for the Armada XP SoCs. Beside the SMP support itself brought by the last 3 commits, this series also adds the support for the coherency fabric unit and the power management service unit. The coherency fabric is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This unit is also available for Armada 370 and will be used in an incoming patch set for hardware I/O cache coherency. The power management service unit is responsible for powering down and waking up CPUs and other SOC units.
| * arm: mvebu: Add IPI support via doorbellsGregory CLEMENT2012-11-211-1/+1
| | | | | | | | | | | | | | | | This patch enhances the IRQ controller driver to add support for Inter-Processor-Interrupts that are needed to enable SMP support. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * arm: mvebu: Add initial support for power managmement service unitGregory CLEMENT2012-11-211-0/+6
| | | | | | | | | | | | | | | | | | The Armada 370 and Armada XP SOCs have a power management service unit which is responsible for powering down and waking up CPUs and other SOC units. This patch adds support for this unit. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | Merge tag 'marvell-xor-board-dt-changes-3.8-v2' of ↵Jason Cooper2012-11-211-0/+40
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything Marvell XOR driver DT changes for 3.8 Conflicts: arch/arm/boot/dts/armada-xp.dtsi
| * | arm: mvebu: add XOR engines to Armada XP .dtsiThomas Petazzoni2012-11-201-0/+40
| |/ | | | | | | Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* | arm: mvebu: add 'clocks' property to Ethernet nodes for Armada 370/XP SoCsThomas Petazzoni2012-11-201-0/+2
| | | | | | | | | | | | | | | | | | The mvneta driver now understands a standard 'clocks' clock pointer property in the Device Tree nodes for the Ethernet devices, so we add the right clock reference for the different Ethernet ports of the Armada 370/XP SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* | Merge tag 'marvell-boards-net-for-3.8' of ↵Thomas Petazzoni2012-11-201-0/+14
|\ \ | |/ |/| | | | | | | | | | | | | | | github.com:MISL-EBU-System-SW/mainline-public into test-the-merge Marvell boards changes related to Ethernet, for 3.8 Conflicts: arch/arm/boot/dts/armada-370-xp.dtsi arch/arm/boot/dts/armada-xp-db.dts
| * arm: mvebu: add Ethernet controllers using mvneta driver for Armada 370/XPThomas Petazzoni2012-11-161-0/+14
| | | | | | | | | | | | | | | | | | | | The Armada 370 SoC has two network units, while the Armada XP has four network units. The first two network units are common to both the Armada XP and Armada 370, so they are added to armada-370-xp.dtsi, while the other two network units are specific to the Armada XP and therefore added to armada-xp.dtsi. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* | clk: armada-370-xp: add support for clock frameworkGregory CLEMENT2012-11-201-0/+20
|/ | | | | | Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm: mvebu: fix typo in .dtsi comment for Armada XP SoCsThomas Petazzoni2012-08-021-1/+1
| | | | | | | | The comment was wrongly referring to Armada 370 while the file is related to Armada XP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: mach-mvebu: add support for Armada 370 and Armada XP with DTThomas Petazzoni2012-07-101-0/+55
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32] [ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ] [ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic] [ben.dooks@codethink.co.uk: move mpic per-cpu register base ] [ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()] Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com>
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