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* ARM: mvebu: add Device Tree description of the EHCI controller on Armada 38xGregory CLEMENT2014-05-161-0/+4
| | | | | | | | | | The Marvell Armada 38x SoCs contains one EHCI controller. This commit adds the Device Tree description of this interface at the SoC level, and also enables the USB2 port on the Armada 385 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-16-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of xHCI controllers on Armada 38xGregory CLEMENT2014-05-161-0/+8
| | | | | | | | | | | | The Marvell Armada 38x SoCs contains two xHCI controllers. This commit adds the Device Tree description of those interfaces at the SoC level, and also enables the two USB3 ports on the Armada 385 DB platform and one USB3 port on the Armada 385 RD platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-15-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: remove clock-frequency of serial port Device Tree nodesThomas Petazzoni2014-04-261-1/+0
| | | | | | | | | | | | | | | Now that the Armada 370/375/38x/XP SoC-level Device Tree files have the proper "clocks" property in their UART controllers node, it is no longer useful to have the clock-frequency property defined in the board-level Device Tree files. Therefore, this commit gets rid of all the useless 'clock-frequency' properties. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of AHCI interfaces on Armada 38xThomas Petazzoni2014-04-261-0/+8
| | | | | | | | | | | | The Marvell Armada 38x processors contain two AHCI compatible interfaces. This commit adds the Device Tree description of those interfaces at the SoC level, and also enables them on the Armada 385 DB platform, which allows access to both interfaces through SATA ports. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397574006-5868-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: enable the SDHCI interface on Armada 385Thomas Petazzoni2014-04-251-0/+8
| | | | | | | | | | | | | | | In commit "mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller", the sdhci-pxav3 driver has been extended to also be usable on Armada 38x platforms. Therefore, this commit adds the necessary Device Tree informations to declare this SDHCI interface in the Armada 38x SoC, and also in the Armada 385 Development Board. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1397486478-16991-2-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable NAND controller in Armada 385-DBEzequiel Garcia2014-03-131-0/+21
| | | | | | | | | The Armada 385-DB board has a NAND flash, so enable it in the devicetree and add the partitions as prepared in the factory images. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1394742273-5113-6-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use the correct phy connection mode on Armada 385 DBThomas Petazzoni2014-03-061-2/+2
| | | | | | | | | | | | | | | | | | On Armada 385 DB, while the "rgmii" PHY connection mode works fine with the generic PHY driver, it fails to work when the Marvell PHY driver is enabled in the kernel configuration, due to a finer handling of the PHY configuration. This is due to the fact that the phy connection mode should instead be "rgmii-id", i.e with the TX/RX delay mechanisms enabled. This fixes the network operation on Armada 385 DB with CONFIG_MARVELL_PHY=y. Without this patch and this option enabled, one would only get messages such as: mvneta f1070000.ethernet eth1: bad rx status 0cc10000 (crc error), size=70 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree for the Armada 385 DB boardThomas Petazzoni2014-02-171-0/+101
The Armada 385 DB board is the development board from Marvell for the Armada 385 SoC. This commit adds a Device Tree description for this board, which enables the following features: * Network interfaces * I2C buses * SDIO * Serial port * SPI bus, with a SPI flash * PCIe interfaces Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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