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* ARM: mvebu: add Device Tree description for the EHCI controllers on Armada 375Gregory CLEMENT2014-05-161-0/+16
| | | | | | | | | | | The Marvell Armada 375 SoCs contains two EHCI controllers. This commit adds the Device Tree description of these interfaces at the SoC level, and also enables the USB2 port on the Armada 375 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-18-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of the xHCI controller on Armada 375Gregory CLEMENT2014-05-161-0/+8
| | | | | | | | | | | The Marvell Armada 375 SoCs contain a xHCI controller. This commit adds the Device Tree description of this interfaces at the SoC level, and also enables the USB3 port on the Armada 375 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-17-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable the thermal sensor in Armada 375 SoCEzequiel Garcia2014-04-261-0/+6
| | | | | | | | This commit enables the thermal sensor found in Armada 375 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398371004-15807-10-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use clocks property for serial portsThomas Petazzoni2014-04-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | Back when the Armada 370 and Armada XP initial support was introduced, the only way to pass the clock frequency to the of_serial driver was through a clock-frequency Device Tree property. Thanks to 0bbeb3c3e84bc963d1c66661e082d207023b0e5c ('of serial port driver - add clk_get_rate() support'), it is possible to use the standard 'clocks' DT property to reference the clock used for a particular UART controller. This clock is then used by the of_serial driver to retrieve the clock rate. This commit modifies the SoC-level Device Tree files of Armada 370, Armada XP, Armada 375 and Armada 38x to use this possibility. Since there is no gatable clock for the UART controllers, we simply reference the TCLK, which is the main SoC clock for the peripherals. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add SMP support in the Armada 375 device treeGregory CLEMENT2014-04-241-0/+7
| | | | | | | | | | | | Improve the Armada 375 Device Tree to add the CPU reset Device Tree node and declare the enabling method for CPUs, both of which are necessary to get SMP working. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397483648-26611-11-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483648-26611-11-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: enable the coherency fabric on Armada 375Thomas Petazzoni2014-04-241-0/+10
| | | | | | | | | This commit adds the necessary Device Tree information to enable the coherency fabric on Armada 375. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483228-25625-10-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable Armada 375 watchdog in the devicetreeEzequiel Garcia2014-04-241-0/+6
| | | | | | | | | | Add the DT nodes to enable the watchdog support available on Armada 375 SoC. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1397481813-4962-8-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use macros for interrupt flags on Armada 375/38xThomas Petazzoni2014-02-221-26/+31
| | | | | | | | | | | Instead of hardcoding the values of the interrupt flags, use the macros provided by <include/dt-bindings/interrupt-controller/irq.h> and <include/dt-bindings/interrupt-controller/arm-gic.h> for the Armada 375 and Armada 38x Device Tree files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use GIC_{SPI,PPI} in Armada 375/38x DTsThomas Petazzoni2014-02-221-26/+27
| | | | | | | | | | Instead of hardcoding 0 and 1 to indicate SPI and PPI GIC interrupts, use the definitions of <dt-bindings/interrupt-controller/arm-gic.h> to clarify the Device Tree code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use C preprocessor include for Armada 375/38x DTsThomas Petazzoni2014-02-221-1/+1
| | | | | | | | | | | Some of the Armada 375/38x DTs that were recently submitted were still using the old-style /include/ instead of the new-style, C-preprocessor based #include. Since we are going to start including more headers, switching to the C-preprocessor based includes is important. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of the Armada 375 SoCGregory CLEMENT2014-02-171-0/+458
The Armada 375 SoC is a new SoC from Marvell, based on a dual core Cortex-A9 and a number of hardware blocks that are common with earlier SoCs from the mvebu family. The provided Device Tree describes the following parts of the SoC: * CPUs * Device Bus * Clocks * Interrupt controllers: GIC and MPIC * GPIO controllers * I2C buses * L2 cache * MBus controller * SDIO * Pinctrl * SATA * Serial * SPI buses * System controller (for reboot) * Timer * XOR engines * PCIe controllers Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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