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* Merge branch 'for-v3.16/clk-dt' of https://github.com/t-kristo/linux-pm into ↵Tony Lindgren2014-05-281-3/+72
|\ | | | | | | omap-for-v3.16/dt-v2
| * ARM: dts: AM4372: clk: efuse based crystal frequency detectAfzal Mohammed2014-05-231-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently oscillator frequency is determined based on sysboot settings, it may not be the case always. To determine it properly, efuse settings also has to be read. CONTROL_STATUS register holds this information. Bit 31: if 0, frequency to be determined based on sysboot if 1, frequency to be determined based on efuse Bit 29,30 - for efuse detection of frequency Bit 22,23 - for sysboot detection of frequency Add clock nodes (mux) to determine oscillator frequency as above. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
| * ARM: dts: am43xx-clocks.dtsi: add ti, set-rate-parent to display clock pathTomi Valkeinen2014-05-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | We need set-rate-parent flags for the display's clock path so that the DSS driver can change the clock rate of the PLL. This patchs adds the ti,set-rate-parent flag to disp_clk and dpll_disp_m2_ck clock nodes. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
| * ARM: dts: am43x-clock: add tbclk data for ehrpwmPoddar, Sourav2014-05-231-0/+48
| | | | | | | | | | | | | | | | | | | | We need "tbclk" clock data for the functioning of ehrpwm module. Hence, populating the required clock information in clock dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
| * ARM: dts: am43xx-clocks: use ti, fixed-factor-clock for dpll_per_clkdcoldoDave Gerlach2014-05-161-3/+6
| | | | | | | | | | | | | | | | | | | | Use the ti,fixed-factor-clock version so that autoidle for dpll_per_clkdcoldo is properly controlled after power management code is introduced. Without this the clock may be held active even when it is gated. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | ARM: dts: am43xx clock dataGeorge Cherian2014-05-061-0/+32
|/ | | | | | | | | | Add USB and USB PHY reference clock data Signed-off-by: George Cherian <george.cherian@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> [tony@atomide.com: tabified] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am43xx clock dataTero Kristo2014-01-171-0/+656
This patch creates a unique node for each clock in the AM43xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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