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* ARC: dma: reintroduce platform specific dma<->physVineet Gupta2016-03-191-5/+4
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: dma: ioremap: use phys_addr_t consistenctly in code pathsVineet Gupta2016-03-191-6/+6
| | | | | | To support dma in physical memory beyond 4GB with PAE40 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: dma: pass_phys() not sg_virt() to cache opsVineet Gupta2016-03-191-2/+2
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: dma: non-coherent pages need V-P mapping if in HIGHMEMVineet Gupta2016-03-191-15/+32
| | | | | | | | | | | | | | | Previously a non-coherent page (hardware IOC or simply driver needs) could be handled by cpu with paddr alone (kvaddr used to be needed for coherent mappings to enforce uncached semantics via a MMU mapping). Now however such a page might still require a V-P mapping if it was in physical address space > 32bits due to PAE40, which the CPU can't access directly with a paddr So decouple decision of kvaddr allocation from type of alloc request (coh/non-coh) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: dma: Use struct page based page allocator helpersVineet Gupta2016-03-191-8/+17
| | | | | | | | | vs. the ones which reutne void *, so that we can handle pages > 4GB in subsequent patches Also plug a potential page leak in case ioremap fails Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* arc: convert to dma_map_opsChristoph Hellwig2016-01-201-47/+105
| | | | | | | | | | | | | [vgupta@synopsys.com: ARC: dma mapping fixes #2] Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Joerg Roedel <jroedel@suse.de> Cc: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Carlos Palminha <CARLOS.PALMINHA@synopsys.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARC: Eliminate some ARCv2 specific code for ARCompact buildVineet Gupta2015-08-211-2/+2
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin2015-08-201-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of ARCv2 CPU there're could be following configurations that affect cache handling for data exchanged with peripherals via DMA: [1] Only L1 cache exists [2] Both L1 and L2 exist, but no IO coherency unit [3] L1, L2 caches and IO coherency unit exist Current implementation takes care of [1] and [2]. Moreover support of [2] is implemented with run-time check for SLC existence which is not super optimal. This patch introduces support of [3] and rework of DMA ops usage. Instead of doing run-time check every time a particular DMA op is executed we'll have 3 different implementations of DMA ops and select appropriate one during init. As for IOC support for it we need: [a] Implement empty DMA ops because IOC takes care of cache coherency with DMAed data [b] Route dma_alloc_coherent() via dma_alloc_noncoherent() This is required to make IOC work in first place and also serves as optimization as LD/ST to coherent buffers can be srviced from caches w/o going all the way to memory Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> [vgupta: -Added some comments about IOC gains -Marked dma ops as static, -Massaged changelog a bit] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Don't memzero twice in dma_alloc_coherent for __GFP_ZEROVineet Gupta2015-07-061-2/+2
| | | | | | | | alloc_pages_exact() get gfp flags and handle zero'ing already And while it, fix the case where ioremap fails: return rightaway. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)Vineet Gupta2015-06-251-0/+12
| | | | | | | | | L2 cache on ARCHS processors is called SLC (System Level Cache) For working DMA (in absence of hardware assisted IO Coherency) we need to manage SLC explicitly when buffers transition between cpu and controllers. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: remove the unused platform helpers from dma mapping APIVineet Gupta2015-06-191-8/+4
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: I/O and DMA MappingsVineet Gupta2013-02-151-0/+94
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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