Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency) | Vineet Gupta | 2015-06-25 | 1 | -0/+12 |
| | | | | | | | | | L2 cache on ARCHS processors is called SLC (System Level Cache) For working DMA (in absence of hardware assisted IO Coherency) we need to manage SLC explicitly when buffers transition between cpu and controllers. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> | ||||
* | ARC: remove the unused platform helpers from dma mapping API | Vineet Gupta | 2015-06-19 | 1 | -8/+4 |
| | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com> | ||||
* | ARC: I/O and DMA Mappings | Vineet Gupta | 2013-02-15 | 1 | -0/+94 |
Signed-off-by: Vineet Gupta <vgupta@synopsys.com> |