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* ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta2015-06-221-0/+1
| | | | | | Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta2015-06-221-1/+2
| | | | | | | | | | | | | | | | | | The notable features are: - SMP configurations of upto 4 cores with coherency - Optional L2 Cache and IO-Coherency - Revised Interrupt Architecture (multiple priorites, reg banks, auto stack switch, auto regfile save/restore) - MMUv4 (PIPT dcache, Huge Pages) - Instructions for * 64bit load/store: LDD, STD * Hardware assisted divide/remainder: DIV, REM * Function prologue/epilogue: ENTER_S, LEAVE_S * IRQ enable/disable: CLRI, SETI * pop count: FFS, FLS * SETcc, BMSKN, XBFU... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: intc: split into ARCompact ISA specific, common bitsVineet Gupta2015-06-191-1/+1
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: entry.S: split into ARCompact ISA specific, common bitsVineet Gupta2015-06-191-2/+2
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: rename kconfig option for unaligned emulationVineet Gupta2014-10-131-1/+1
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Add perf support for ARC700 coresMischa Jonker2013-11-121-0/+1
| | | | | | | | | This adds basic perf support for ARC700 cores. Most PERF_COUNT_HW* events are supported now. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Hostlink Pseudo-Driver for Metaware DebuggerVineet Gupta2013-02-151-0/+1
| | | | | | | | | | This allows ARC Target to do I/O to host in absence of any peripherals whatsoever, assisted by Metaware Hostlink facility. Further we have a FUSE based filesystem which makes us mount/access host filesystem on target and do fops. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: kgdb supportMischa Jonker2013-02-151-0/+1
| | | | | | | Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Jason Wessel <jason.wessel@windriver.com> Acked-by: Jason Wessel <jason.wessel@windriver.com>
* ARC: Unaligned access emulationVineet Gupta2013-02-151-0/+1
| | | | | | | | | | | | | | | | ARC700 doesn't natively support unaligned access, but can be emulated -Unaligned Access Exception -Disassembly at the Fault address to find the exact insn (long/short) Also per Arnd's comment, we runtime control it using 2 sysctl knobs: * SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble * SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt Originally contributed by Tim Yao <tim.yao@amlogic.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Tim Yao <tim.yao@amlogic.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARC: kprobes supportVineet Gupta2013-02-151-0/+1
| | | | | | | Origin port done by Rajeshwar Ranga Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
* ARC: disassembly (needed by kprobes/kgdb/unaligned-access-emul)Vineet Gupta2013-02-151-1/+1
| | | | | | | | | | | | In-kernel disassembler Due Credits * Orig written by Rajeshwar Ranga * Consolidation/cleanups by Mischa Jonker Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* ARC: DWARF2 .debug_frame based stack unwinderVineet Gupta2013-02-151-0/+6
| | | | | | | | -Originally written by Rajeshwar Ranga -Derived off of generic unwinder in 2.6.19 and adapted to ARC Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
* ARC: SMP supportVineet Gupta2013-02-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC common code to enable a SMP system + ISS provided SMP extensions. ARC700 natively lacks SMP support, hence some of the core features are are only enabled if SoCs have the necessary h/w pixie-dust. This includes: -Inter Processor Interrupts (IPI) -Cache coherency -load-locked/store-conditional ... The low level exception handling would be completely broken in SMP because we don't have hardware assisted stack switching. Thus a fair bit of this code is repurposing the MMU_SCRATCH reg for event handler prologues to keep them re-entrant. Many thanks to Rajeshwar Ranga for his initial "major" contributions to SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help with resurrecting that in 3.2 kernel (2012). Note that this platform code is again singleton design pattern - so multiple SMP platforms won't build at the moment - this deficiency is addressed in subsequent patches within this series. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com> Cc: Noam Camus <noamc@ezchip.com> Cc: Gilad Ben-Yossef <gilad@benyossef.com>
* ARC: Module supportVineet Gupta2013-02-151-0/+2
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: ptrace supportVineet Gupta2013-02-151-0/+3
| | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARC: [DeviceTree] Basic supportVineet Gupta2013-02-151-0/+1
| | | | | | | | | | | | | | | | | | | | This is minimal infrastructure needed for devicetree work. It uses an a sample "skeleton" devicetree - embedded in kernel image - to print the board, manufacturer by parsing the top-level "compatible" string. As of now we don't need any additional "board" specific "machine_desc". TODO: support interpreting the command line as boot-loader passed dtb Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: James Hogan <james.hogan@imgtec.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: James Hogan <james.hogan@imgtec.com>
* ARC: Build system: Makefiles, Kconfig, Linker scriptVineet Gupta2013-02-111-0/+16
Arnd in his review pointed out that arch Kconfig organisation has several deficiencies: * Build time entries for things which can be runtime extracted from DT (e.g. SDRAM size, core clk frequency..) * Not multi-platform-image-build friendly (choice .. endchoice constructs) * cpu variants support (750/770) is exclusive. The first 2 have been fixed in subsequent patches. Due to the nature of the 750 and 770, it is not possible to build for both together, w/o special runtime glue code which would hurt performance. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Sam Ravnborg <sam@ravnborg.org> Acked-by: Sam Ravnborg <sam@ravnborg.org>
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