summaryrefslogtreecommitdiffstats
path: root/arch/arc/Kconfig
Commit message (Collapse)AuthorAgeFilesLines
* ARC: [plat-sim] unbork non default CONFIG_LINUX_LINK_BASEVineet Gupta2015-12-171-0/+1
| | | | | | | | | | | HIGHMEM support bumped the default memory size for nsim platform to 1G. Thus total memory ended at the very edge of start of peripherals address space. With linux link base shifted, memory started bleeding into peripheral space which caused early boot bad_page spew ! Fixes: 29e332261d2 ("ARC: mm: HIGHMEM: populate high memory from DT") Reported-by: Anton Kolesov <akolesov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: mm: PAE40 supportVineet Gupta2015-10-291-0/+15
| | | | | | | | This is the first working implementation of 40-bit physical address extension on ARCv2. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: mm: HIGHMEM: kmap API implementationVineet Gupta2015-10-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement kmap* API for ARC. This enables - permanent kernel maps (pkmaps): :kmap() API - fixmap : kmap_atomic() We use a very simple/uniform approach for both (unlike some of the other arches). So fixmap doesn't use the customary compile time address stuff. The important semantic is sleep'ability (pkmap) vs. not (fixmap) which the API guarantees. Note that this patch only enables highmem for subsequent PAE40 support as there is no real highmem for ARC in pure 32-bit paradigm as explained below. ARC has 2:2 address split of the 32-bit address space with lower half being translated (virtual) while upper half unstranslated (0x8000_0000 to 0xFFFF_FFFF). kernel itself is linked at base of unstranslated space (i.e. 0x8000_0000 onwards), which is mapped to say DDR 0x0 by external Bus Glue logic (outside the core). So kernel can potentially access 1.75G worth of memory directly w/o need for highmem. (the top 256M is taken by uncached peripheral space from 0xF000_0000 to 0xFFFF_FFFF) In PAE40, hardware can address memory beyond 4G (0x1_0000_0000) while the logical/virtual addresses remain 32-bits. Thus highmem is required for kernel proper to be able to access these pages for it's own purposes (user space is agnostic to this anyways). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: boot: Support Halt-on-reset and Run-on-reset SMP booting modesVineet Gupta2015-10-281-0/+10
| | | | | | | | | | | For Run-on-reset, non masters need to spin wait. For Halt-on-reset they can jump to entry point directly. Also while at it, made reset vector handler as "the" entry point for kernel including host debugger based boot (which uses the ELF header entry point) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: mm: MMU v1..v3 only selectable for ARCompact ISA based coresVineet Gupta2015-10-171-0/+4
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: mm: THP supportVineet Gupta2015-10-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | MMUv4 in HS38x cores supports Super Pages which are basis for Linux THP support. Normal and Super pages can co-exist (ofcourse not overlap) in TLB with a new bit "SZ" in TLB page desciptor to distinguish between them. Super Page size is configurable in hardware (4K to 16M), but fixed once RTL builds. The exact THP size a Linx configuration will support is a function of: - MMU page size (typical 8K, RTL fixed) - software page walker address split between PGD:PTE:PFN (typical 11:8:13, but can be changed with 1 line) So for above default, THP size supported is 8K * 256 = 2M Default Page Walker is 2 levels, PGD:PTE:PFN, which in THP regime reduces to 1 level (as PTE is folded into PGD and canonically referred to as PMD). Thus thp PMD accessors are implemented in terms of PTE (just like sparc) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Enable HAVE_FUTEX_CMPXCHGVineet Gupta2015-08-201-0/+1
| | | | | | | | ARC doesn't need the runtime detection of futex cmpxchg op Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Enable optimistic spinning for LLSC configVineet Gupta2015-08-111-0/+1
| | | | | Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with ↵Vineet Gupta2015-08-041-0/+5
| | | | | | | | | | | | | | | | | | | | exponential backoff This is to workaround the llock/scond livelock HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping coherency transactions in the SCU. The exclusive line state keeps rotating among contenting cores leading to a never ending cycle. So break the cycle by deferring the retry of failed exclusive access (SCOND). The actual delay needed is function of number of contending cores as well as the unrelated coherency traffic from other cores. To keep the code simple, start off with small delay of 1 which would suffice most cases and in case of contention double the delay. Eventually the delay is sufficient such that the coherency pipeline is drained, thus a subsequent exclusive access would succeed. Link: http://lkml.kernel.org/r/1438612568-28265-1-git-send-email-vgupta@synopsys.com Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: allow selection of page size for MMUv4Alexey Brodkin2015-07-231-2/+2
| | | | | | | MMUv4 also supports the configurable page size as MMUv3. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: add knob for DIV_REV in KconfigAlexey Brodkin2015-07-201-0/+4
| | | | | | | | | | | | | Being highly configurable core ARC HS among other features might be configured with or without DIV_REM_OPTION (hardware divider). That option when enabled adds following instructions: div, divu, rem, remu. By default ARC HS38 has this option enabled. So we add here possibility to disable usage of hardware divider by compiler. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Kconfig: better way to disable ARC_HAS_LLSC for ARC_CPU_750DVineet Gupta2015-07-061-1/+2
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: All bits in place, allow ARCv2 buildsVineet Gupta2015-06-251-5/+4
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: SMP: clocksource: Enable Global Real Time counterVineet Gupta2015-06-221-0/+5
| | | | | | Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: SMP: ARConnect debug/robustnessVineet Gupta2015-06-221-3/+12
| | | | | | | - Handle possible interrupt coalescing from MCIP - chk if prev IPI ack before sending new Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta2015-06-221-7/+14
| | | | | | Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: clocksource: Introduce 64bit local RTC counterVineet Gupta2015-06-221-0/+5
| | | | | | Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: MMUv4: cache programming model changesVineet Gupta2015-06-221-1/+1
| | | | | | | | | | | | | | | Caveats about cache flush on ARCv2 based cores - dcache is PIPT so paddr is sufficient for cache maintenance ops (no need to setup PTAG reg - icache is still VIPT but only aliasing configs need PTAG setup So basically this is departure from MMU-v3 which always need vaddr in line ops registers (DC_IVDL, DC_FLDL, IC_IVIL) but paddr in DC_PTAG, IC_PTAG respectively. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: MMUv4: TLB programming Model changesVineet Gupta2015-06-221-0/+5
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta2015-06-221-5/+75
| | | | | | | | | | | | | | | | | | The notable features are: - SMP configurations of upto 4 cores with coherency - Optional L2 Cache and IO-Coherency - Revised Interrupt Architecture (multiple priorites, reg banks, auto stack switch, auto regfile save/restore) - MMUv4 (PIPT dcache, Huge Pages) - Instructions for * 64bit load/store: LDD, STD * Hardware assisted divide/remainder: DIV, REM * Function prologue/epilogue: ENTER_S, LEAVE_S * IRQ enable/disable: CLRI, SETI * pop count: FFS, FLS * SETcc, BMSKN, XBFU... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [axs101] Add support for AXS101 SDP (software development platform)Alexey Brodkin2015-06-191-0/+1
| | | | | | | | | | The AXS10x platforms consist of a mainboard with peripherals, on which several daughter cards can be placed. The daughter cards typically contain a CPU and memory. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: explicit'ify uboot supportVineet Gupta2015-06-191-0/+12
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [plat_arcfpga]->[plat_sim]Vineet Gupta2015-06-191-1/+1
| | | | | | | | * Remove remanants of legacy ARC FPGA platforms (AA4, ML509...) * Only nsim simulation platform is left, rename platform accordingly * AA4 DT stuff is compatible with nsim for ARC700 so rename it too Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: RIP broken 64bit RTSCVineet Gupta2015-06-191-5/+0
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [kbuild] Retire CONFIG_ARC_CPU_REL_4_10Vineet Gupta2015-06-191-10/+1
| | | | | | | | | | | | | | | Back when ARC700 4.10 was released, the related kernel features were tied to this config item so they could be disabled in one shot (i.e. LLOCK/SCOND, SWAPE, RTSC..) That having happened a while back, all new ARC customers weill get 4.11+ so those features can be assumed to be present and need not be tied to a top-level (we still retain the ability to individually disable them). Further, since ARCv2 also shares some of those feautes, removing it simplifies things a bit in Kconfig Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: remove the unused platform helpers from dma mapping APIVineet Gupta2015-06-191-4/+0
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: add power management optionsAlexey Brodkin2014-11-031-0/+1
| | | | | | | | | | | Even though ARC cores itself don't have any power management except SLEEP state it's possible to use power management features of selected peripherals. For example USB OTG requires PM_RUNTIME which is only available if kernel/power/Kconfig is sourced by architecture. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Remove unneeded Kconfig entry NO_DMAPaul Bolle2014-10-131-3/+0
| | | | | | | | | Architectures only need a Kconfig entry for NO_DMA if it is possible that its value will be 'y'. For arc its value will always be 'n', making it pointless. Remove it. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: rename kconfig option for unaligned emulationVineet Gupta2014-10-131-1/+1
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [plat*] move code out of .init_machine into commonVineet Gupta2014-10-131-0/+1
| | | | | | | All the platforms do the same thing in init_machine callback so move it out of callback into caller of callback Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Kconfig: rename HAS_IOPORT to HAS_IOPORT_MAPUwe Kleine-König2014-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | If the renamed symbol is defined lib/iomap.c implements ioport_map and ioport_unmap and currently (nearly) all platforms define the port accessor functions outb/inb and friend unconditionally. So HAS_IOPORT_MAP is the better name for this. Consequently NO_IOPORT is renamed to NO_IOPORT_MAP. The motivation for this change is to reintroduce a symbol HAS_IOPORT that signals if outb/int et al are available. I will address that at least one merge window later though to keep surprises to a minimum and catch new introductions of (HAS|NO)_IOPORT. The changes in this commit were done using: $ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/' Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'master' into for-nextJiri Kosina2014-02-201-13/+2
|\
| * Merge tag 'arc-v3.14-rc1' of ↵Linus Torvalds2014-01-251-11/+0
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC changes from Vineet Gupta: - IPI optimization and cleanups - Support for bootloader provided external Device Tree blobs * tag 'arc-v3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: [cmdline] support External Device Trees from u-boot ARC: [cmdline] uboot cmdline handling rework ARC: [SMP] optimize IPI send and receive ARC: [SMP] simplify IPI code ARC: [SMP] cpu halt interface doesn't need "self" cpu-id ARC: [SMP] IPI ACK interface doesn't need "self" cpu-id ARC: [SMP] cpumask not needed in IPI send path
| | * ARC: [cmdline] uboot cmdline handling reworkVineet Gupta2014-01-161-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Moved cmdline copy from asm to "C" - allows for more robust checking of pointer validity etc. * Remove the Kconfig option to do so, base it on a runtime value passed by u-boot Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | Kconfig: update flightly outdated CONFIG_SMP documentationRobert Graffham2014-01-231-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | Remove an outdated reference to "most personal computers" having only one CPU, and change the use of "singleprocessor" and "single processor" in CONFIG_SMP's documentation to "uniprocessor" across all arches where that documentation is present. Signed-off-by: Robert Graffham <psquid@psquid.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Kconfig: Remove useless "default N" linesPaul Bolle2014-02-201-1/+0
|/ | | | | | | | | A number of Kconfig entries default to (uppercase) "N". It was clearly intended to use "default n". But since (lowercase) "n" is the default anyway, these lines might as well be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* ARC: extable: Enable sorting at build timeVineet Gupta2013-11-251-0/+1
| | | | | | | | | | Avoids wasting cycles at boot specially on slower simulators Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Francois Bedard <fbedard@synopsys.com> Cc: linux-kernel@vger.kernel.org Acked-by: David Daney <david.daney@cavium.com>
* kernel: remove CONFIG_USE_GENERIC_SMP_HELPERSChristoph Hellwig2013-11-151-1/+0
| | | | | | | | | | | We've switched over every architecture that supports SMP to it, so remove the new useless config variable. Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Jan Kara <jack@suse.cz> Cc: Jens Axboe <axboe@kernel.dk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARC: [SMP] Disallow RTSCVineet Gupta2013-11-071-5/+1
| | | | | | RTSC is strictly incore and must not be allowed in SMP configs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [SMP] enlarge possible NR_CPUSNoam Camus2013-11-061-2/+2
| | | | | Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Add support for irqflags tracing and lockdepVineet Gupta2013-11-061-0/+6
| | | | | | | Lockdep required a small fix to stacktrace API which was incorrectly unwindign out of __switch_to for the current call frame. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Remove GENERIC_HARDIRQ config optionMartin Schwidefsky2013-09-131-1/+0
| | | | | | | | After the last architecture switched to generic hard irqs the config options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code for !CONFIG_GENERIC_HARDIRQS can be removed. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* Merge branch 'kconfig-diet' from Dave HansenLinus Torvalds2013-07-041-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge Kconfig menu diet patches from Dave Hansen: "I think the "Kernel Hacking" menu has gotten a bit out of hand. It is over 120 lines long on my system with everything enabled and options are scattered around it haphazardly. http://sr71.net/~dave/linux/kconfig-horror.png Let's try to introduce some sanity. This set takes that 120 lines down to 55 and makes it vastly easier to find some things. It's a start. This set stands on its own, but there is plenty of room for follow-up patches. The arch-specific debug options still end up getting stuck in the top-level "kernel hacking" menu. OPTIMIZE_INLINING, for instance, could obviously go in to the "compiler options" menu, but the fact that it is defined in arch/ in a separate Kconfig file keeps it on its own for the moment. The Signed-off-by's in here look funky. I changed employers while working on this set, so I have signoffs from both email addresses" * emailed patches from Dave Hansen <dave@sr71.net>: hang and lockup detection menu kconfig: consolidate printk options group locking debugging options consolidate compilation option configs consolidate runtime testing configs order memory debugging Kconfig options consolidate per-arch stack overflow debugging options
| * consolidate per-arch stack overflow debugging optionsDave Hansen2013-07-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original posting: http://lkml.kernel.org/r/20121214184202.F54094D9@kernel.stglabs.ibm.com Several architectures have similar stack debugging config options. They all pretty much do the same thing, some with slightly differing help text. This patch changes the architectures to instead enable a Kconfig boolean, and then use that boolean in the generic Kconfig.debug to present the actual menu option. This removes a bunch of duplication and adds consistency across arches. Signed-off-by: Dave Hansen <dave@linux.vnet.ibm.com> Reviewed-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> [for tile] Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | ARC: [mm] Make stack/heap Non-executable by defaultVineet Gupta2013-06-221-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. For VM_EXEC based delayed dcache/icache flush, reduces the number of flushes. 2. Makes this security feature ON by default rather than OFF before. 3. Applications can use mprotect() to selectively override this. 4. ELF binaries have a GNU_STACK segment which can easily override the kernel default permissions. For nested-functions/trampolines, gcc already auto-enables executable stack in elf. Others needing this can use -Wl,-z,execstack option. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: make dcache VIPT aliasing support dependant on dcacheAlexey Brodkin2013-06-221-0/+1
|/ | | | | Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [mm] Aliasing VIPT dcache support 2/4Vineet Gupta2013-05-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | This is the meat of the series which prevents any dcache alias creation by always keeping the U and K mapping of a page congruent. If a mapping already exists, and other tries to access the page, prev one is flushed to physical page (wback+inv) Essentially flush_dcache_page()/copy_user_highpage() create K-mapping of a page, but try to defer flushing, unless U-mapping exist. When page is actually mapped to userspace, update_mmu_cache() flushes the K-mapping (in certain cases this can be optimised out) Additonally flush_cache_mm(), flush_cache_range(), flush_cache_page() handle the puring of stale userspace mappings on exit/munmap... flush_anon_page() handles the existing U-mapping for anon page before kernel reads it via the GUP path. Note that while not complete, this is enough to boot a simple dynamically linked Busybox based rootfs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [TB10x] Add support for TB10x platformChristian Ruppert2013-05-071-0/+1
| | | | | | | | | | | Infrastructure required to make the Linux kernel compile and boot on the Abilis Systems TB10x series of SOCs based on ARC700 CPUs: - Kmake related files (Kconfig, Makefile, tb10x_defconfig) - TB10x platform initialisation Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [cmdline] Remove CONFIG_CMDLINEVineet Gupta2013-05-071-9/+2
| | | | | | | Given that DeviceTree /bootargs can provide similar functionality, no point in providing duplicate infrastructure. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Remove non existent refs to GENERIC_KERNEL_EXECVE & GENERIC_KERNEL_THREADAlexander Shiyan2013-05-071-2/+0
| | | | | | | | | | | This tracks mainline commit ae903caae267 "Bury the conditionals from kernel_thread/kernel_execve series" which we missed out as ARC port was not yet mainline. [vgupta: commit log modified] Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
OpenPOWER on IntegriCloud