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| * Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode valueRafał Miłecki2016-05-051-2/+4
| | | | | | | | | | | | | | | | | | Now that we support nand-ecc-algo property it should be used together with "soft" to specify software BCH ECC. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: add support for "nand-ecc-algo" DT propertyRafał Miłecki2016-05-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: brcmnand: Add support for v6.2 controllersFlorian Fainelli2016-04-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Document and match the brcm,brcmnand-v6.2 compatible string, the controller has a register layout identical to the v6.0 version and supports prefetch. Update the command shift logic to account for v6.2 controller which are the first ones to use a shift of 0 (6.1 used a shift of 24). Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: document the NAND controller/NAND chip DT representationBoris Brezillon2016-04-191-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Standardize the NAND controller/NAND chip DT representation. Now, all new NAND controller drivers should comply with this representation, even if they are only supporting a single NAND chip. Existing drivers can keep support for the old representation (where only the NAND chip was described), but are encouraged to also support the new one. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
| * mtd: nand: omap2: Implement NAND ready using gpiolibRoger Quadros2016-04-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | The GPMC WAIT pin status are now available over gpiolib. Update the omap_dev_ready() function to use gpio instead of directly accessing GPMC register space. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * mtd: nand: omap: Update DT binding documentationRoger Quadros2016-04-151-4/+13
| | | | | | | | | | | | | | | | | | | | Add compatible id and interrupts. The NAND interrupts are provided by the GPMC controller node. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com>
* | Merge tag 'devicetree-for-4.7' of ↵Linus Torvalds2016-05-201-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Rewrite of the unflattening code to avoid recursion and lessen the stack usage. - Rewrite of the phandle args parsing code to get rid of the fixed args size. This is needed for IOMMU code. - Sync to latest dtc which adds more dts style checking. These warnings are enabled with "W=1" compiles. - Tegra documentation updates related to the above warnings. - A bunch of spelling and other doc fixes. - Various vendor prefix additions. * tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (52 commits) devicetree: Add Creative Technology vendor id gpio: dt-bindings: add ibm,ppc4xx-gpio binding of/unittest: Remove unnecessary module.h header inclusion drivers/of: Fix build warning in populate_node() drivers/of: Fix depth when unflattening devicetree of: dynamic: changeset prop-update revert fix drivers/of: Export of_detach_node() drivers/of: Return allocated memory from of_fdt_unflatten_tree() drivers/of: Specify parent node in of_fdt_unflatten_tree() drivers/of: Rename unflatten_dt_node() drivers/of: Avoid recursively calling unflatten_dt_node() drivers/of: Split unflatten_dt_node() of: include errno.h in of_graph.h of: document refcount incrementation of of_get_cpu_node() Documentation: dt: soc: fix spelling mistakes Documentation: dt: power: fix spelling mistake Documentation: dt: pinctrl: fix spelling mistake Documentation: dt: opp: fix spelling mistake Documentation: dt: net: fix spelling mistakes Documentation: dt: mtd: fix spelling mistake ...
| * | Documentation: dt: mtd: fix spelling mistakeEric Engestrom2016-04-251-1/+1
| |/ | | | | | | | | Signed-off-by: Eric Engestrom <eric@engestrom.ch> Signed-off-by: Rob Herring <robh@kernel.org>
* | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2016-05-181-1/+19
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs, these contain various things that touch the drivers/ directory but got merged through arm-soc for practical reasons. For the most part, this is now related to power management controllers, which have not yet been abstracted into a separate subsystem, and typically require some code in drivers/soc or arch/arm to control the power domains. Another large chunk here is a rework of the NVIDIA Tegra USB3.0 support, which was surprisingly tricky and took a long time to get done. Finally, reset controller handling as always gets merged through here as well" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits) arm-ccn: Enable building as module soc/tegra: pmc: Add generic PM domain support usb: xhci: tegra: Add Tegra210 support usb: xhci: Add NVIDIA Tegra XUSB controller driver dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding PCI: tegra: Support per-lane PHYs dt-bindings: pci: tegra: Update for per-lane PHYs phy: tegra: Add Tegra210 support phy: Add Tegra XUSB pad controller support dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding phy: core: Allow children node to be overridden clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs drivers: firmware: psci: make two helper functions inline soc: renesas: rcar-sysc: Add support for R-Car H3 power areas soc: renesas: rcar-sysc: Add support for R-Car E2 power areas soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas soc: renesas: rcar-sysc: Add support for R-Car H2 power areas ...
| * | mtd: augment the "arm,versatile-flash" bindingsLinus Walleij2016-04-041-1/+19
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bindings for the "arm,versatile-flash" device was merged in commit 3ba7222ac992d24d09ccd0b55940b54849eef752 "arm/versatile: Add device tree support" but was never used for anything. Versatile flash chips are actually just standard CFI chips, but they have one or two bits in a system controller to control VPP and write protection. Let's use this compatible string in conjunction with "cfi-flash" to indicate that we have a normal CFI flash with some extra Versatile-specific protection. Cc: devicetree@vger.kernel.org Cc: Grant Likely <grant.likely@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible stringYuan Yao2016-04-181-1/+2
|/ | | | | | | | new compatible string: "fsl,ls1043a-qspi". Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* dt/bindings: qcom_nandc: Add DT bindingsArchit Taneja2016-03-101-0/+86
| | | | | | | | | Add DT bindings document for the Qualcomm NAND controller driver. Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Documentation: fsl-quadspi: Add optional propertiesYao Yuan2016-03-071-0/+1
| | | | | | | | | | | Add optional properties for QSPI: big-endian if the register is big endian on this platform. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Documentation: fsl-quadspi: Add fsl, ls2080a-qspi compatible stringYao Yuan2016-03-071-1/+3
| | | | | | | | | new compatible string: "fsl,ls2080a-qspi". Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: atmel_nand: Support 32-bit ECC strengthRomain Izard2016-02-121-1/+2
| | | | | | | | | | | | | | | | As the SAMA5D2 controller supports the 32-bit ECC strength, accept it as a valid setting when required by the device tree or the NAND parameter page. Then configure the controller to use this new setting. For the binding: Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: atmel_nand: Support PMECC on SAMA5D2Romain Izard2016-02-121-1/+4
| | | | | | | | | | | | | | | | | | Starting with the SAMA5D2, there is a new revision of the Atmel PMECC controller that can correct 32 bits in each sector. This controller is not 100% compatible with the previous revision that corrected a maximum of 24 bits by sector, as some register addresses overlap. Using information from the device tree, we can configure the driver to work with both versions. For the binding: Acked-by: Rob Herring <robh@kernel.org> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* doc: dt: atmel_nand: Reword the documentationRomain Izard2016-02-121-11/+12
| | | | | | | | | | | | | Do not mention which chips supporting the PMECC controller, as it a duplicate of the information in the chips' device trees. Use common terms when describing the sub-node for the NAND Flash controller. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: atmel_nand: Support variable RB_EDGE interruptsRomain Izard2016-02-121-1/+1
| | | | | | | | | | | | | | | | The NFC controller used to accelerate the NAND transfers on SAMA5 chips can use either RB_EDGE0 or RB_EDGE3 as its ready/busy interrupt bit. Use the controller's compatible string to select the correct bit. For the binding: Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wenyou Yang <Wenyou.yang@atmel.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'devicetree-for-4.5' of ↵Linus Torvalds2016-01-141-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: - Rework and export the changeset API to make it available to users other than DT overlays - ARM secure devices binding - OCTEON USB binding - Clean-up of various SRAM binding docs - Various other binding doc updates * tag 'devicetree-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (21 commits) drivers/of: Export OF changeset functions Fix documentation for adp1653 DT ARM: psci: Fix indentation in DT bindings of/platform: export of_default_bus_match_table of/unittest: Show broken behaviour in the platform bus of: fix declaration of of_io_request_and_map of/address: replace printk(KERN_ERR ...) with pr_err(...) of/irq: optimize device node matching loop in of_irq_init() dt-bindings: tda998x: Document the required 'port' node. net/macb: bindings doc: Merge cdns-emac to macb dt-bindings: Misc fix for the ATH79 DDR controllers dt-bindings: Misc fix for the ATH79 MISC interrupt controllers Documentation: dt: Add bindings for Secure-only devices dt-bindings: ARM: add arm,cortex-a72 compatible string ASoC: Atmel: ClassD: add GCK's parent clock in DT binding DT: add Olimex to vendor prefixes Documentation: fsl-quadspi: Add fsl,ls1021-qspi compatible string Documentation/devicetree: document OCTEON USB bindings usb: misc: usb3503: Describe better how to bind clock to the hub dt-bindings: Consolidate SRAM bindings from all vendors ...
| * Documentation: fsl-quadspi: Add fsl,ls1021-qspi compatible stringYao Yuan2015-12-091-1/+2
| | | | | | | | | | | | | | new compatible string: "fsl,ls1021-qspi". Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Rob Herring <robh@kernel.org>
* | doc: dt: mtd: new binding for jz4780-{nand,bch}Alex Smith2016-01-061-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs, as well as the hardware BCH controller, used by the jz4780_{nand,bch} drivers. Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-mtd@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | doc: dt: mtd: brcmnand: Add brcm,bcm6368-nand device tree bindingSimon Arlott2015-12-091-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree binding for NAND on the BCM6368. The BCM6368 has a NAND interrupt register with combined status and enable registers. It also requires a clock, so add an optional clock to the common brcmnand binding. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: merge for-4.4 development into -next developmentBrian Norris2015-12-091-1/+6
|\ \ | | | | | | | | | | | | | | | A few MAINTAINERS updates, and some DT binding/documentation fixups. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | doc: dt: mtd: partitions: add compatible property to "partitions" nodeBrian Norris2015-12-081-1/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As noted here [1], there are potentially future conflicts if we try to use MTD's "partitions" subnode to describe anything besides just the fixed-in-the-device-tree partitions currently described in this document. Particularly, there was a proposal to use this node for the AFS parser too. It can pose a (small) problem to try to differentiate the following nodes: // using binding as currently specified partitions { #address-cells = <x>; #size-cells = <y>; partition@0 { ...; }; }; and // proposed future binding partitions { compatible = "arm,arm-flash-structure"; }; It's especially difficult if other uses of this node start having subnodes. So, since the "partitions" node is new in v4.4, let's fixup the binding before release so that it requires a compatible property, so it's much clearer to distinguish. e.g.: // proposed partitions { compatible = "fixed-partitions"; #address-cells = <x>; #size-cells = <y>; partition@0 { ...; }; }; [1] Subject: "mtd: create a partition type device tree binding" http://lkml.kernel.org/g/20151113220039.GA74382@google.com http://lists.infradead.org/pipermail/linux-mtd/2015-November/063355.html http://lists.infradead.org/pipermail/linux-mtd/2015-November/063364.html Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
* | doc: dt: mtd: stop referring to driver code for spi-nor IDsBrian Norris2015-11-191-5/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull the supported chip names from drivers/mtd/devices/m25p80.c and stop pointing readers to Linux code. Also (although I see this habit repeated throughout the Documentation/devicetree/bindings/ tree), stop using the title "driver" in this file, when we're trying explicitly to describe hardware, not software. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <devicetree@vger.kernel.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* | doc: dt: mtd: add documentation for Mediatek spi-nor controllerBayi Cheng2015-11-111-0/+41
| | | | | | | | | | | | | | | | | | | | Add device tree binding documentation for serial flash with Mediatek serial flash controller Signed-off-by: Bayi Cheng <bayi.cheng@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> [Brian: fixed up language] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: ofpart: document the lock flag.Michal Suchanek2015-11-101-0/+2
|/ | | | | | | | | The lock flag of ofpart is undocumented. Add to binding doc. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* doc: dt: mtd: support partitions in a special 'partitions' subnodeMichal Suchanek2015-10-301-29/+42
| | | | | | | | | | To avoid conflict with other drivers using subnodes of the mtd device create only one ofpart-specific node rather than any number of arbitrary partition subnodes. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: fsmc_nand: Add BCH4 SW ECC support for SPEAr600Stefan Roese2015-10-261-0/+6
| | | | | | | | | | | | | | | | | | | | | This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can be used by boards equipped with a NAND chip that requires 4-bit ECC strength. The SPEAr600 HW ECC only supports 1-bit ECC strength. To enable SW BCH4, you need to specify this in your nand controller DT node: nand-ecc-mode = "soft_bch"; nand-ecc-strength = <4>; nand-ecc-step-size = <512>; Tested on a custom SPEAr600 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> [Brian: tweaked the comments a bit] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: vf610_nfc: add device tree bindingsStefan Agner2015-09-291-0/+59
| | | | | | | | Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stefan Agner <stefan@agner.ch> [Brian: fixup #size-cells in example] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'for-linus-20150901' of git://git.infradead.org/linux-mtdLinus Torvalds2015-09-022-1/+60
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "SPI NOR: - reduce virtual address space requirements for fsl-quadspi memory map - new fsl-quadspi IP support: imx6ul-qspi and imx7d-qspi - add new NOR flash device support - add new driver for NXP SPI Flash Interface (SPIFI) - stop abusing SPI API structs for non-SPI framework - fixup DT table matching for new "jedec,spi-nor" string NAND: - brcmnand: fix big endian MIPS macro usage - denali: refactor to use devres, dev_*() printing, etc. - OMAP ELM: change the module alias to actually be usable - pxa3xx_nand: fixup a few command sequencing issues -- both new and old - race conditions in the IRQ handler status clearing - problems when a bootloader left interrupts pending - config issues when overriding the bootloader configuration - new flash device support - sunxi_nand: - optimize timing configuration by calculation, rather than fixed fail-safe values - use EDO setting from ONFI - r852: fix compiler warnings - davinci: add 4KB page support Core: - oobtest: correct debug print information" * tag 'for-linus-20150901' of git://git.infradead.org/linux-mtd: (42 commits) mtd: mtd_oobtest: Fix the address offset with vary_offset case mtd: blkdevs: fix switch-bool compilation warning mtd: spi-nor: stop (ab)using struct spi_device_id mtd: nand: add Toshiba TC58NVG0S3E to nand_ids table mtd: dataflash: Export OF module alias information nand: pxa3xx: Increase READ_ID buffer and make the size static mtd: nand: pxa3xx-nand: fix random command timeouts mtd: nand: pxa3xx_nand: fix early spurious interrupt mtd: pxa3xx_nand: add a default chunk size mtd: omap_elm: Fix module alias mtd: physmap_of: fix null pointer deference when kzalloc returns null mtd: nettel: do not ignore mtd_device_register() failure in nettel_init() mtd: denali_pci: switch to dev_err() mtd: denali_pci: refactor driver using devres API mtd: denali_pci: use module_pci_driver() macro mtd: denali: hide core part from user in Kconfig mtd: spi-nor: add Spansion S25FL204K support mtd: spi-nor: Improve Kconfig help text for SPI_FSL_QUADSPI mtd: spi-nor: add driver for NXP SPI Flash Interface (SPIFI) doc: dt: add documentation for nxp,lpc1773-spifi ...
| * doc: dt: add documentation for nxp,lpc1773-spifiJoachim Eastwood2015-08-141-0/+58
| | | | | | | | | | | | | | | | Add device tree binding documentation for the SPI Flash Interface (SPIFI) found on NXP LPC18xx and LPC43xx devies. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * Documentation: fsl-quadspi: Add fsl, imx6ul-qspi compatible stringFrank Li2015-08-061-1/+1
| | | | | | | | | | | | | | new compatible string: "fsl,imx6ul-qspi". Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * Documentation: fsl-quadspi: Add fsl, imx7d-qspi compatible stringFrank Li2015-08-061-1/+2
| | | | | | | | | | | | | | new compatible string: "fsl,imx7d-qspi" Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: pxa3xx: add optional dma for pxa architectureRobert Jarzmik2015-09-011-0/+3
|/ | | | | | | | | The PXA architecture provides a DMA to pump data from the nand controller to memory and the other way around. Add it to the binding description. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Rob Herring <robh@kernel.org>
* Merge tag 'v4.1-rc4' into MTD's -nextBrian Norris2015-05-181-3/+3
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| * Documentation: dt: mtd: replace "nor-jedec" binding with "jedec, spi-nor"Brian Norris2015-05-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 8ff16cf77ce3 ("Documentation: devicetree: m25p80: add "nor-jedec" binding"), we added a generic "nor-jedec" binding to catch all mostly-compatible SPI NOR flash which can be detected via the READ ID opcode (0x9F). This was discussed and reviewed at the time, however objections have come up since then as part of this discussion: http://lkml.kernel.org/g/20150511224646.GJ32500@ld-irv-0074 It seems the parties involved agree that "jedec,spi-nor" does a better job of capturing the fact that this is SPI-specific, not just any NOR flash. This binding was only merged for v4.1-rc1, so it's still OK to change the naming. At the same time, let's move the documentation to a better name. Next up: stop referring to code (drivers/mtd/devices/m25p80.c) from the documentation. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com>
* | Documentation: devicetree: brcmstb_nand: add BCM63138 and Cygnus/iProcBrian Norris2015-05-151-4/+44
| | | | | | | | | | | | | | | | | | Add notes to describe how some SoCs integrate this NAND core a little differently, and so we define extra compatibility strings and register resources/names. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
* | Documentation: devicetree: add binding doc for Broadcom NAND controllerBrian Norris2015-05-121-0/+110
|/ | | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
* Documentation: devicetree: m25p80: add "nor-jedec" bindingBrian Norris2015-04-051-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Almost all flash that are "compatible" with m25p80 support the JEDEC READ ID opcode (0x9F), and in fact, that is often the only thing that is used to differentiate them. Let's add a compatible string that represents this lowest common denominator of compatibility. Device trees can still specify manufacturer/device names in addition, but (until some reason is found to differentiate between them through device tree) software will likely want to bind just against the generic name, and avoid unnecessarily growing its device ID binding tables. This is related to the work of commit a5b7616c55e1 ("mtd: m25p80,spi-nor: Fix module aliases for m25p80"), which showed that maintaining these device tables as stable device-tree/modalias binding tables is not a worthwhile burden for mostly-comptatible flash. At the same time, let's update the binding doc to point to the m25p_ids[] ID list instead of spi_nor_ids[]. The former can be used for device tree bindings, but the latter cannot. In the future, we should pare down the m25p_ids[] list to only those IDs which are actually used in device trees. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
* Documentation: devicetree: fix spelling in pxa3xx-nand bindingBrian Norris2015-03-241-1/+1
| | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: fix generic nand binding referenceBaruch Siach2015-02-261-1/+1
| | | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtdLinus Torvalds2015-02-185-3/+55
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "NAND: - Add new Hisilicon NAND driver for Hip04 - Add default reboot handler, to ensure all outstanding erase transactions complete in time - jz4740: convert to use GPIO descriptor API - Atmel: add support for sama5d4 - Change default bitflip threshold to 75% of correction strength - Miscellaneous cleanups and bugfixes SPI NOR: - Freescale QuadSPI: - Fix a few probe() and remove() issues - Add a MAINTAINERS entry for this driver - Tweak transfer size to increase read performance - Add suspend/resume support - Add Micron quad I/O support - ST FSM SPI: miscellaneous fixes JFFS2: - gracefully handle corrupted 'offset' field found on flash Other: - bcm47xxpart: add tweaks for a few new devices - mtdconcat: set return lengths properly for mtd_write_oob() - map_ram: enable use with mtdoops - maps: support fallback to ROM/UBI for write-protected NOR flash" * tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd: (46 commits) mtd: hisilicon: && vs & typo jffs2: fix handling of corrupted summary length mtd: hisilicon: add device tree binding documentation mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc mtd: avoid registering reboot notifier twice mtd: concat: set the return lengths properly mtd: kconfig: replace PPC_OF with PPC mtd: denali: remove unnecessary stubs mtd: nand: remove redundant local variable MAINTAINERS: add maintainer entry for FREESCALE QUAD SPI driver mtd: fsl-quadspi: improve read performance by increase AHB transfer size mtd: fsl-quadspi: Remove unnecessary 'map_failed' label mtd: fsl-quadspi: Remove unneeded success/error messages mtd: fsl-quadspi: Fix the error paths mtd: nand: omap: drop condition with no effect mtd: nand: jz4740: Convert to GPIO descriptor API mtd: nand: Request strength instead of bytes for soft BCH mtd: nand: default bitflip-reporting threshold to 75% of correction strength mtd: atmel_nand: introduce a new compatible string for sama5d4 chip mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction() ...
| * mtd: hisilicon: add device tree binding documentationZhou Wang2015-02-081-0/+47
| | | | | | | | | | | | | | | | This patch adds the related dts binding document for Hisilicon 504 NAND controller. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: atmel_nand: introduce a new compatible string for sama5d4 chipWu, Josh2015-01-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since in SAMA5D4 chip, the PMECC can correct bit flips in erased page. So we add a DT property to indicate this hardware character. If the PMECC support correct bitflip erased page (all data are 0xff). Then we can use the PMECC correct the page and skip the erased page check. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: map_rom: Support UBI on ROMAaron Sierra2015-01-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UBI needs to know the physical erase block size, even on read-only devices, since it defines the on-device layout. Use a device-tree provided value to support previously written UBI on read-only NOR. UBI also needs a non-zero writebufsize, so we set it to one. Note: This was implemented because hardware write-protected CFI NOR cannot be probed for the physical erase block size. Signed-off-by: Joe Schultz <jschultz@xes-inc.ccom> Signed-off-by: Aaron Sierra <asierra@xes-inc.ccom> [Brian: removed unneeded #ifdef, note 'optional' erase-size property] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * Documentation: fsl-quadspi: Add an entry for the imx6sx compatible stringFabio Estevam2015-01-091-1/+1
| | | | | | | | | | | | | | "fsl,imx6sx-qspi" is also a valid compatible string, so add an entry for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: gpmi: Remove "We support only one NAND chip" from bindings docStefan Roese2014-12-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | This sentence "We support only one NAND chip now" is not true any more. Multiple chips are supported. So lets remove this sentence to not confuse anyone. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Huang Shijie <b32955@freescale.com> Cc: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Documentation: devicetree: Fix double words in Doumentation/devicetreeMasanari Iida2015-01-281-1/+1
|/ | | | | | | | This patch fix multiple words such as "the the" and "which which" in Documentation/devicetree. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
* mtd: atmel_nand: make PMECC lookup table and offset property optionalJosh Wu2014-11-051-2/+4
| | | | | | | | | | | | | | | | | | | If there is no PMECC lookup table stored in ROM, or lookup table offset is not specified, PMECC driver should build it in DDR by itself. That make the PMECC driver work for some board which doesn't have PMECC lookup table in ROM. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. For more information can refer to section 5.4 of PMECC controller application note: http://www.atmel.com/images/doc11127.pdf Signed-off-by: Josh Wu <josh.wu@atmel.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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