Commit message (Collapse) | Author | Age | Files | Lines | |
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* | CLK: TI: APLL: add support for omap2 aplls | Tero Kristo | 2014-05-28 | 1 | -5/+19 |
| | | | | | | | This patch adds support for omap2 type aplls, which have gating and autoidle functionality. Signed-off-by: Tero Kristo <t-kristo@ti.com> | ||||
* | CLK: TI: DRA7: Add APLL support | J Keerthy | 2014-01-17 | 1 | -0/+31 |
The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |