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* dt-bindings: consolidate interrupt controller bindingsRob Herring2015-10-221-60/+0
| | | | | | | | | Move various interrupt controller bindings into the interrupt-controller/ directory. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-mediatek@lists.infradead.org
* ARM: MM: Add DT binding for Feroceon L2 cacheAndrew Lunn2014-02-221-0/+16
| | | | | | | | | | Instantiate the L2 cache from DT. Indicate in DT where the cache control register is so that it is possible to enable/disable write through on the CPU. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: cache: add dt support for tauros2 cacheChao Xie2012-08-161-0/+17
| | | | | Signed-off-by: Chao Xie <xiechao.mail@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
* ARM: Orion: DT support for IRQ and GPIO ControllersAndrew Lunn2012-07-271-0/+20
| | | | | | | | | | | | | Both IRQ and GPIO controllers can now be represented in DT. The IRQ controllers are setup first, and then the GPIO controllers. Interrupts for GPIO lines are placed directly after the main interrupts in the interrupt space. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Josh Coombs <josh.coombs@gmail.com> Tested-by: Simon Baatz <gmbnomis@gmail.com>
* Documentation: update docs for mmp dtHaojian Zhuang2012-05-053-0/+67
Append interrupt controller and timer document for mmp. Updates documents for gpio and i2c. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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