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* drm/i915: Fix gen2 mappable calculationsBen Widawsky2013-02-154-12/+22
| | | | | | | | | | | | | | | | | | When I refactored the code initially, I forgot that gen2 uses a different bar for the CPU mappable aperture. The agp-less code knows nothing of generations less than 5, so we have to expand the gtt_probe function to include the mappable base and end. It was originally broken by me: commit baa09f5fd8a6d033ec075355dda99a65b7f6a0f3 Author: Ben Widawsky <ben@bwidawsk.net> Date: Thu Jan 24 13:49:57 2013 -0800 drm/i915: Add probe and remove to the gtt ops Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: add ibx_irq_postinstallPaulo Zanoni2013-02-151-43/+25
| | | | | | | | | | | So we can remove duplicated code. Note that this function is used not only on IBX, but also CPT and LPT. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> [danvet: Also bikeshed s/ironlake_enable_pch_hotplug/ibx_enable_hotplug to keep consistent with our ibx for pch naming scheme.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Fix sprite_scaling_enabled for multiple spritesVille Syrjälä2013-02-152-12/+17
| | | | | | | | | | | | | | We have more than one sprite, so a boolean simply won't cut it. Turn sprite_scaling_enabled into a bitmask and track the state of sprite scaler for each sprite independently. Also don't re-enable LP watermarks until the sprite registers have actually been written, and thus sprite scaling has really been disabled. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: unify HDMI/DP hpd definitionsDaniel Vetter2013-02-154-48/+38
| | | | | | | | | | They're physically the same pins and also the same bits, duplicating only confuses the reader. This also makes it a bit obvious that we have quite some code duplication going on here. Squashing that is for a larger rework in our hpd handling though. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Clarify HW context size logicBen Widawsky2013-02-151-5/+2
| | | | | | | | | | | | This was a rebase error from when the patches originally landed. Since the context size is unsigned, there is also no use in checking if it's less than 0. The existing code is not really wrong, but it's not simple as it should be. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: write backlight harderDaniel Vetter2013-02-151-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | 770c12312ad617172b1a65b911d3e6564fc5aca8 is the first bad commit commit 770c12312ad617172b1a65b911d3e6564fc5aca8 Author: Takashi Iwai <tiwai@suse.de> Date: Sat Aug 11 08:56:42 2012 +0200 drm/i915: Fix blank panel at reopening lid changed the register write sequence for restoring the backlight, which helped prevent non-working backlights on some machines. Turns out that the original sequence was the right thing to do for a different set of machines. Worse, setting the backlight level _after_ enabling it seems to reset it somehow. So we need to make that one conditional upon the backlight having been reset to zero, and add the old one back. Cargo-culting at it's best, but it seems to work. Cc: stable@vger.kernel.org Cc: Takashi Iwai <tiwai@suse.de> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=47941 Reviewed-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* i915: ignore lid open event when resumingZhang Rui2013-02-144-20/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i915 driver needs to do modeset when 1. system resumes from sleep 2. lid is opened In PM_SUSPEND_MEM state, all the GPEs are cleared when system resumes, thus it is the i915_resume code does the modeset rather than intel_lid_notify(). But in PM_SUSPEND_FREEZE state, this will be broken because system is still responsive to the lid events. 1. When we close the lid in Freeze state, intel_lid_notify() sets modeset_on_lid. 2. When we reopen the lid, intel_lid_notify() will do a modeset, before the system is resumed. here is the error log, [92146.548074] WARNING: at drivers/gpu/drm/i915/intel_display.c:1028 intel_wait_for_pipe_off+0x184/0x190 [i915]() [92146.548076] Hardware name: VGN-Z540N [92146.548078] pipe_off wait timed out [92146.548167] Modules linked in: hid_generic usbhid hid snd_hda_codec_realtek snd_hda_intel snd_hda_codec parport_pc snd_hwdep ppdev snd_pcm_oss i915 snd_mixer_oss snd_pcm arc4 iwldvm snd_seq_dummy mac80211 snd_seq_oss snd_seq_midi fbcon tileblit font bitblit softcursor drm_kms_helper snd_rawmidi snd_seq_midi_event coretemp drm snd_seq kvm btusb bluetooth snd_timer iwlwifi pcmcia tpm_infineon i2c_algo_bit joydev snd_seq_device intel_agp cfg80211 snd intel_gtt yenta_socket pcmcia_rsrc sony_laptop agpgart microcode psmouse tpm_tis serio_raw mxm_wmi soundcore snd_page_alloc tpm acpi_cpufreq lpc_ich pcmcia_core tpm_bios mperf processor lp parport firewire_ohci firewire_core crc_itu_t sdhci_pci sdhci thermal e1000e [92146.548173] Pid: 4304, comm: kworker/0:0 Tainted: G W 3.8.0-rc3-s0i3-v3-test+ #9 [92146.548175] Call Trace: [92146.548189] [<c10378e2>] warn_slowpath_common+0x72/0xa0 [92146.548227] [<f86398b4>] ? intel_wait_for_pipe_off+0x184/0x190 [i915] [92146.548263] [<f86398b4>] ? intel_wait_for_pipe_off+0x184/0x190 [i915] [92146.548270] [<c10379b3>] warn_slowpath_fmt+0x33/0x40 [92146.548307] [<f86398b4>] intel_wait_for_pipe_off+0x184/0x190 [i915] [92146.548344] [<f86399c2>] intel_disable_pipe+0x102/0x190 [i915] [92146.548380] [<f8639ea4>] ? intel_disable_plane+0x64/0x80 [i915] [92146.548417] [<f8639f7c>] i9xx_crtc_disable+0xbc/0x150 [i915] [92146.548456] [<f863ebee>] intel_crtc_update_dpms+0x5e/0x90 [i915] [92146.548493] [<f86437cf>] intel_modeset_setup_hw_state+0x42f/0x8f0 [i915] [92146.548535] [<f8645b0b>] intel_lid_notify+0x9b/0xc0 [i915] [92146.548543] [<c15610d3>] notifier_call_chain+0x43/0x60 [92146.548550] [<c105d1e1>] __blocking_notifier_call_chain+0x41/0x80 [92146.548556] [<c105d23f>] blocking_notifier_call_chain+0x1f/0x30 [92146.548563] [<c131a684>] acpi_lid_send_state+0x78/0xa4 [92146.548569] [<c131aa9e>] acpi_button_notify+0x3b/0xf1 [92146.548577] [<c12df56a>] ? acpi_os_execute+0x17/0x19 [92146.548582] [<c12e591a>] ? acpi_ec_sync_query+0xa5/0xbc [92146.548589] [<c12e2b82>] acpi_device_notify+0x16/0x18 [92146.548595] [<c12f4904>] acpi_ev_notify_dispatch+0x38/0x4f [92146.548600] [<c12df0e8>] acpi_os_execute_deferred+0x20/0x2b [92146.548607] [<c1051208>] process_one_work+0x128/0x3f0 [92146.548613] [<c1564f73>] ? common_interrupt+0x33/0x38 [92146.548618] [<c104f8c0>] ? wake_up_worker+0x30/0x30 [92146.548624] [<c12df0c8>] ? acpi_os_wait_events_complete+0x1e/0x1e [92146.548629] [<c10524f9>] worker_thread+0x119/0x3b0 [92146.548634] [<c10523e0>] ? manage_workers+0x240/0x240 [92146.548640] [<c1056e84>] kthread+0x94/0xa0 [92146.548647] [<c1060000>] ? ftrace_raw_output_sched_stat_runtime+0x70/0xf0 [92146.548652] [<c15649b7>] ret_from_kernel_thread+0x1b/0x28 [92146.548658] [<c1056df0>] ? kthread_create_on_node+0xc0/0xc0 three different modeset flags are introduced in this patch MODESET_ON_LID_OPEN: do modeset on next lid open event MODESET_DONE: modeset already done MODESET_SUSPENDED: suspended, only do modeset when system is resumed In this way, 1. when lid is closed, MODESET_ON_LID_OPEN is set so that we'll do modeset on next lid open event. 2. when lid is opened, MODESET_DONE is set so that duplicate lid open events will be ignored. 3. when system suspends, MODESET_SUSPENDED is set. In this case, we will not do modeset on any lid events. Plus, locking mechanism is also introduced to avoid racing. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Fix RC6VIDS encode/decodeBen Widawsky2013-02-141-2/+2
| | | | | | | | | | | | | | | | | | | | The RC6 VIDS has a linear ramp starting at 250mv, which means any values below 250 are invalid. The old buggy macros tried to adjust for this to be more flexible, but there is no need. As Dan pointed out the ENCODE only ever has one value. The only invalid value for decode is an input of 0 which means something is really wonky, and the cases where DECODE are used either don't matter (debug values), or would be implicitly correct (the check for less than 450). This patch makes simpler, easier to read macros which are actually correct. Maybe this patch can actually fix some bugs now. Thanks to Dan for catching this. /me hides Cc: stable@kernel.org Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* Revert "drm: Add EDID_QUIRK_FORCE_REDUCED_BLANKING for ASUS VW222S"Daniel Vetter2013-02-131-3/+0
| | | | | | | | | | | | | | This reverts commit 6f33814bd4d9cfe76033a31b1c0c76c960cd8e4b. The quirk cause a regression, and it looks like the original bug was simply a lack of FIFO bandwidth on the i915G of the reporter. Which should eventually be fixed as soon as we get around to implemented DSPARB FIFO reassignment on gen 3. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=52281 Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge branch 'for-airlied' of git://people.freedesktop.org/~mlankhorst/linux ↵Dave Airlie2013-02-085-88/+178
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next TTM reservations changes, preparing for new reservation mutex system. * 'for-airlied' of git://people.freedesktop.org/~mlankhorst/linux: drm/ttm: unexport ttm_bo_wait_unreserved drm/nouveau: use ttm_bo_reserve_slowpath in validate_init, v2 drm/ttm: use ttm_bo_reserve_slowpath_nolru in ttm_eu_reserve_buffers, v2 drm/ttm: add ttm_bo_reserve_slowpath drm/ttm: cleanup ttm_eu_reserve_buffers handling drm/ttm: remove lru_lock around ttm_bo_reserve drm/nouveau: increase reservation sequence every retry drm/vmwgfx: always use ttm_bo_is_reserved
| * drm/ttm: unexport ttm_bo_wait_unreservedMaarten Lankhorst2013-01-152-14/+2
| | | | | | | | | | | | | | | | All legitimate users of this function outside ttm_bo.c are gone, now it's only an implementation detail. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| * drm/nouveau: use ttm_bo_reserve_slowpath in validate_init, v2Maarten Lankhorst2013-01-151-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | Similar rationale to the identical commit in drm/ttm. Instead of only waiting for unreservation, we make sure we actually own the reservation, then retry to get the rest. Changes since v1: - Increase the seqno before calling ttm_bo_reserve_slowpath Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| * drm/ttm: use ttm_bo_reserve_slowpath_nolru in ttm_eu_reserve_buffers, v2Maarten Lankhorst2013-01-151-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This requires re-use of the seqno, which increases fairness slightly. Instead of spinning with a new seqno every time we keep the current one, but still drop all other reservations we hold. Only when we succeed, we try to get back our other reservations again. This should increase fairness slightly as well. Changes since v1: - Increase val_seq before calling ttm_bo_reserve_slowpath_nolru and retrying to take all entries to prevent a race. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| * drm/ttm: add ttm_bo_reserve_slowpathMaarten Lankhorst2013-01-152-0/+77
| | | | | | | | | | | | | | | | | | | | Instead of dropping everything, waiting for the bo to be unreserved and trying over, a better strategy would be to do a blocking wait. This can be mapped a lot better to a mutex_lock-like call. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| * drm/ttm: cleanup ttm_eu_reserve_buffers handlingMaarten Lankhorst2013-01-151-32/+21
| | | | | | | | | | | | | | | | | | With the lru lock no longer required for protecting reservations we can just do a ttm_bo_reserve_nolru on -EBUSY, and handle all errors in a single path. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| * drm/ttm: remove lru_lock around ttm_bo_reserveMaarten Lankhorst2013-01-153-35/+40
| | | | | | | | | | | | | | | | | | | | There should no longer be assumptions that reserve will always succeed with the lru lock held, so we can safely break the whole atomic reserve/lru thing. As a bonus this fixes most lockdep annotations for reservations. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| * drm/nouveau: increase reservation sequence every retryMaarten Lankhorst2013-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | This is temporary until the fence framework can be used. With the lru/reservation atomicity removal it is possible to see your old sequence number and the buffer being reserved, leading to erroneously reporting -EDEADLK. Workaround it by bumping the sequence number every retry. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
| * drm/vmwgfx: always use ttm_bo_is_reservedMaarten Lankhorst2013-01-151-2/+2
| | | | | | | | | | | | Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
* | drm: make frame duration time calculation more preciseDaniel Kurtz2013-02-081-1/+5
| | | | | | | | | | | | | | | | | | It is a bit more precise to compute the total number of pixels first and then divide, rather than multiplying the line pixel count by the already-rounded line duration. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/pci: Use PCI Express Capability accessorsBjorn Helgaas2013-02-081-16/+5
| | | | | | | | | | | | | | | | | | | | | | | | Use PCI Express Capability access functions to simplify this code a bit. For non-PCIe devices or pre-PCIe 3.0 devices that don't implement the Link Capabilities 2 register, pcie_capability_read_dword() reads a zero. Since we're only testing whether the bits we care about are set, there's no need to mask out the other bits we *don't* care about. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/pci: Set all supported speeds in speed cap mask for pre-3.0 devicesBjorn Helgaas2013-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For devices that conform to PCIe r3.0 and have a Link Capabilities 2 register, we test and report every bit in the Supported Link Speeds Vector field. For a device that supports both 2.5GT/s and 5.0GT/s, we set both DRM_PCIE_SPEED_25 and DRM_PCIE_SPEED_50 in the returned mask. For pre-r3.0 devices, the Link Capabilities 0010b encoding (PCI_EXP_LNKCAP_SLS_5_0GB) means that both 5.0GT/s and 2.5GT/s are supported, so set both DRM_PCIE_SPEED_25 and DRM_PCIE_SPEED_50 in this case as well. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/pci: Use the standard #defines for PCIe Link Capability bitsBjorn Helgaas2013-02-081-2/+2
| | | | | | | | | | | | | | | | Use the standard #defines rather than bare numbers for the PCIe Link Capabilities speed bits. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm: Allow vblank support without DRIVER_HAVE_IRQThierry Reding2013-02-081-2/+3
| | | | | | | | | | | | | | | | | | | | Drivers that register interrupt handlers without the DRM core helpers don't initialize the .irq_enabled field and drm_dev_to_irq() may fail when called on them. This shouldn't preclude them from implementing the vblank IOCTL. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon: use prime helpersAaron Plattner2013-02-083-157/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the Radeon prime implementation by using the default behavior provided by drm_gem_prime_import and drm_gem_prime_export. v2: - Rename functions to radeon_gem_prime_get_sg_table and radeon_gem_prime_import_sg_table. - Delete the now-unused vmapping_count variable. Signed-off-by: Aaron Plattner <aplattner@nvidia.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/nouveau: use prime helpersAaron Plattner2013-02-085-161/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the Nouveau prime implementation by using the default behavior provided by drm_gem_prime_import and drm_gem_prime_export. v2: Rename functions to nouveau_gem_prime_get_sg_table and nouveau_gem_prime_import_sg_table. Signed-off-by: Aaron Plattner <aplattner@nvidia.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm: add prime helpersAaron Plattner2013-02-083-1/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of reimplementing all of the dma_buf functionality in every driver, create helpers drm_prime_import and drm_prime_export that implement them in terms of new, lower-level hook functions: gem_prime_pin: callback when a buffer is created, used to pin buffers into GTT gem_prime_get_sg_table: convert a drm_gem_object to an sg_table for export gem_prime_import_sg_table: convert an sg_table into a drm_gem_object gem_prime_vmap, gem_prime_vunmap: map and unmap an object These hooks are optional; drivers can opt in by using drm_gem_prime_import and drm_gem_prime_export as the .gem_prime_import and .gem_prime_export fields of struct drm_driver. v2: - Drop .begin_cpu_access. None of the drivers this code replaces implemented it. Having it here was a leftover from when I was trying to include i915 in this rework. - Use mutex_lock instead of mutex_lock_interruptible, as these three drivers did. This patch series shouldn't change that behavior. - Rename helpers to gem_prime_get_sg_table and gem_prime_import_sg_table. Rename struct sg_table* variables to 'sgt' for clarity. - Update drm.tmpl for these new hooks. v3: - Pass the vaddr down to the driver. This lets drivers that just call vunmap on the pointer avoid having to store the pointer in their GEM private structures. - Move documentation into a /** DOC */ comment in drm_prime.c and include it in drm.tmpl with a !P line. I tried to use !F lines to include documentation of the individual functions from drmP.h, but the docproc / kernel-doc scripts barf on that file, so hopefully this is good enough for now. - apply refcount fix from commit be8a42ae60addd8b6092535c11b42d099d6470ec ("drm/prime: drop reference on imported dma-buf come from gem") Signed-off-by: Aaron Plattner <aplattner@nvidia.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/i2c: give i2c it's own KconfigRob Clark2013-02-083-23/+24
| | | | | | | | | | | | | | | | | | Move this out of nouveau directory. As we start to add more encoder slaves used by other drivers, it makes sense to put the Kconfig bits in one place. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-next-3.9' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2013-02-0843-1887/+2199
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Alex writes: - CS ioctl cleanup and unification. Unification of a lot of functionality that was duplicated across multiple generates of hardware. - Add support for Oland GPUs - Deprecate UMS support. Mesa and the ddx dropped support for UMS and apparently very few people still use it since the UMS CS ioctl was broken for several kernels and no one reported it. It was fixed in 3.8/stable. - Rework GPU reset. Use the status registers to determine what blocks to reset. This better matches the recommended reset programming model. This also allows us to properly reset blocks besides GFX and DMA. - Switch the VM set page code to use an IB rather than the ring. This fixes overflow issues when doing large page table updates using a small ring like DMA. - Several small cleanups and bug fixes. * 'drm-next-3.9' of git://people.freedesktop.org/~agd5f/linux: (38 commits) drm/radeon/dce6: fix display powergating drm/radeon: add Oland pci ids drm/radeon: radeon-asic updates for Oland drm/radeon: add ucode loading support for Oland drm/radeon: fill in gpu init for Oland drm/radeon: add Oland chip family drm/radeon: switch back to using the DMA ring for VM PT updates drm/radeon: use IBs for VM page table updates v2 drm/radeon: don't reset the MC on IGPs/APUs drm/radeon: use the reset mask to determine if rings are hung drm/radeon: halt engines before disabling MC (si) drm/radeon: halt engines before disabling MC (cayman/TN) drm/radeon: halt engines before disabling MC (evergreen) drm/radeon: halt engines before disabling MC (6xx/7xx) drm/radeon: use status regs to determine what to reset (si) drm/radeon: use status regs to determine what to reset (cayman) drm/radeon: use status regs to determine what to reset (evergreen) drm/radeon: use status regs to determine what to reset (6xx/7xx) drm/radeon: rework GPU reset on cayman/TN drm/radeon: rework GPU reset on cayman/TN ...
| * | drm/radeon/dce6: fix display powergatingAlex Deucher2013-02-051-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only enable it when we disable the display rather than at DPMS time since enabling it requires a full modeset to restore the display state. Fixes blank screens in certain cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: add Oland pci idsAlex Deucher2013-02-011-0/+13
| | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: radeon-asic updates for OlandAlex Deucher2013-02-011-1/+5
| | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: add ucode loading support for OlandAlex Deucher2013-02-011-0/+59
| | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: fill in gpu init for OlandAlex Deucher2013-02-011-1/+19
| | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: add Oland chip familyAlex Deucher2013-02-013-0/+3
| | | | | | | | | | | | | | | | | | Oland is a new asic in the SI family. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: switch back to using the DMA ring for VM PT updatesAlex Deucher2013-02-011-3/+3
| | | | | | | | | | | | | | | | | | | | | Now that we have switched to using IBs for page table updates, we can switch back the using the DMA ring. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: use IBs for VM page table updates v2Alex Deucher2013-02-017-92/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For very large page table updates, we can exceed the size of the ring. To avoid this, use an IB to perform the page table update. v2(ck): cleanup the IB infrastructure and the use it instead of filling the struct ourself. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: don't reset the MC on IGPs/APUsAlex Deucher2013-01-313-6/+12
| | | | | | | | | | | | | | | | | | The MC isn't part of the GPU per se. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: use the reset mask to determine if rings are hungAlex Deucher2013-01-316-80/+173
| | | | | | | | | | | | | | | | | | | | | fetch the reset mask and check if the relevant ring flags are set to determine whether the ring is hung or not. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: halt engines before disabling MC (si)Alex Deucher2013-01-311-5/+7
| | | | | | | | | | | | | | | | | | It's better to halt the engines before we disable the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: halt engines before disabling MC (cayman/TN)Alex Deucher2013-01-311-7/+7
| | | | | | | | | | | | | | | | | | It's better to halt the engines before we disable the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: halt engines before disabling MC (evergreen)Alex Deucher2013-01-311-5/+7
| | | | | | | | | | | | | | | | | | It's better to halt the engines before we disable the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: halt engines before disabling MC (6xx/7xx)Alex Deucher2013-01-311-5/+5
| | | | | | | | | | | | | | | | | | It's better to halt the engines before we disable the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: use status regs to determine what to reset (si)Alex Deucher2013-01-312-34/+132
| | | | | | | | | | | | | | | | | | | | | When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: use status regs to determine what to reset (cayman)Alex Deucher2013-01-313-32/+136
| | | | | | | | | | | | | | | | | | | | | When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: use status regs to determine what to reset (evergreen)Alex Deucher2013-01-313-32/+145
| | | | | | | | | | | | | | | | | | | | | When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: use status regs to determine what to reset (6xx/7xx)Alex Deucher2013-01-313-32/+136
| | | | | | | | | | | | | | | | | | | | | When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: rework GPU reset on cayman/TNAlex Deucher2013-01-311-92/+90
| | | | | | | | | | | | | | | | | | | | | Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: rework GPU reset on cayman/TNAlex Deucher2013-01-312-108/+92
| | | | | | | | | | | | | | | | | | | | | Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: rework GPU reset on evergreenAlex Deucher2013-01-311-76/+85
| | | | | | | | | | | | | | | | | | | | | Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: rework GPU reset on r6xx/r7xxAlex Deucher2013-01-312-122/+129
| | | | | | | | | | | | | | | | | | | | | Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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