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* ARM: S3C: CPUFREQ: Add debugfs support for cpufreqBen Dooks2009-07-3010-0/+317
| | | | | | | | | Add debugfs support for the cpufreq driver to allow information about the system state to be exported to the user. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: CPUFREQ: Add documentation for systemBen Dooks2009-07-301-0/+75
| | | | | | | Add documentation for the S3C24XX style CPUFREQ driver. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: Add armclk for cpufreq supportBen Dooks2009-07-301-0/+9
| | | | | | | | | Add armclk for use with the cpufreq support and anything else that may want it. This clock is just a direct descendant of fclk. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: BAST: CPUFREQ: Add board supportBen Dooks2009-07-301-0/+9
| | | | | | | | Add board support for CPUFREQ with the Simtec BAST board registering the necessary information with the core. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: Add S3C2410A sysdev.Ben Dooks2009-07-307-2/+60
| | | | | | | | | | Add a sysdev S3C2410A sysdev to allow the differentiation of the S3C2410A from the S3C2410. This is needed for the CPUFREQ code to enable the extra features and update cpu specific information. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C24XX: CPUFREQ: S3C2412/S3C2443 IO timing supportBen Dooks2009-07-306-1/+329
| | | | | | | Add IO bank timing support for S3C2412/S3C2443. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2412: Update memory register mapping and definitionsBen Dooks2009-07-303-2/+40
| | | | | | | | | | | | Update the mapping of the memory controler registers and add the missing definitions of the register block for the SSMC. The register contents definitions can be found in the pl093 header. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: Update CPU register mapping practices.Ben Dooks2009-07-302-3/+9
| | | | | | | | | | | | Currently map-base.h defines the main virtual address mappings made for all the support S3C SoC series, but does not then define any base for per-cpu mappings to be made from. Add S3C_ADDR_CPU() macro to define an virtual address as an offset from the last of the core mappings. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: PL093: Header file for PL093 SSMC PrimeCellBen Dooks2009-07-301-0/+80
| | | | | | | | Header to define the standard registers for an PL093 SSMC memory controller. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2412: CPUFREQ: Add core support.Ben Dooks2009-07-303-0/+258
| | | | | | | Add core support for frequency scaling on the S3C2412 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: OSIRIS: CPUFREQ: Add CPU frequency scaling supportBen Dooks2009-07-302-0/+10
| | | | | | | Add CPU frequency scalling support to the Simtec Osiris. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2440: CPUFREQ: Add crystal frequency Kconfig entries.Ben Dooks2009-07-302-2/+20
| | | | | | | | | Add entries to select the crystal to select for each different supported board. This information is then available for anything else requiring this, such as the CPUFreq PLL tables. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2440: CPUFREQ: Add PLL tablesBen Dooks2009-07-304-0/+241
| | | | | | | Add PLL tables for the S3C2440. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2440: CPUFREQ: Add core support.Ben Dooks2009-07-303-0/+318
| | | | | | | Add core support for frequency scaling on the S3C2440 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: CPUFREQ: Add PLL tableBen Dooks2009-07-303-0/+103
| | | | | | | Add PLL table for the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: CPUFREQ: Add core support.Ben Dooks2009-07-306-0/+241
| | | | | | | Add core support for frequency scaling on the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: CPUFREQ: Add io-timing support.Ben Dooks2009-07-303-0/+442
| | | | | | | Add io-timing support for frequency scaling on the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: Add S3C24XX to CPUFreq KConfigBen Dooks2009-07-301-0/+41
| | | | | | | Add the S3C24XX to the main ARM CPUFreq Kconfig support list. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: Add ARCH_HAS_CPUFREQ for presence of CPUFREQ driverBen Dooks2009-07-301-1/+13
| | | | | | | | | | Add ARCH_HAS_CPUFREQ so that each machine config can select it if they have CPUFREQ driver support. This means that the CPUFREQ specific area does not need the if statement updating each time a new machine is added. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.hBen Dooks2009-07-302-20/+25
| | | | | | | | | Move the structure s3c_cpufreq_config from cpu-freq.h to the less advertised cpu-freq-core.h as it is not needed by anything outside the core drivers. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: CPUFREQ: Documentation for cpufreq headerBen Dooks2009-07-301-10/+81
| | | | | | | | Update arch/arm/plat-s3c/include/plat/cpu-freq.h to include kerneldoc style documentation. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C24XX: CPUFREQ: Add core support.Ben Dooks2009-07-303-0/+889
| | | | | | | | Add the core of the support for enabling the CPUFreq driver on all S3C24XX based systems. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C24XX: Add BWSCON per-bank information.Ben Dooks2009-07-301-0/+10
| | | | | | | | | Add definitions and an accessor macro to deal with reading bus information from S3C2410_BWSCON for any given numbered bank. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* S3C64XX: Fix ARMCLK configurationMark Brown2009-07-291-1/+1
| | | | | | | | | | | The value of armclk_mask needs to be inverted for use as a mask on the register value when updating ARM_RATIO. This is critical for cpufreq support, without it attempts to scale the frequency of the core trash pretty much the entire clock tree. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* S3C64XX: Fix get_rate() for ARMCLKMark Brown2009-07-291-1/+1
| | | | | | | | | If the requested clock is faster than the parent clock then the parent clock is the closest we can get to the request so we need to return that instead of the requested clock. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* S3C24XX: GPIO: Fix pin range check in s3c_gpiolib_getchipLars-Peter Clausen2009-07-291-1/+1
| | | | | | | | | | In the s3c_gpiolib_getchip implementation for s3c24xx the check whether a pin is in the gpio banks range is reversed. Thus the function returns NULL for valid pins and the gpio chip if its not valid. As a result gpio states are not saved/restored properly during suspend/resume. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* kmemleak: Protect the seq start/next/stop sequence by rcu_read_lock()Catalin Marinas2009-07-291-3/+1
| | | | | | | | | | Objects passed to kmemleak_seq_next() have an incremented reference count (hence not freed) but they may point via object_list.next to other freed objects. To avoid this, the whole start/next/stop sequence must be protected by rcu_read_lock(). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'drm-radeon-kms' of ↵Linus Torvalds2009-07-2946-1529/+3576
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-radeon-kms' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (35 commits) drm/radeon: set fb aperture sizes for framebuffer handoff. drm/ttm: fix highuser vs dma32 confusion. drm/radeon: Fix size used for benchmarking BO copies. drm/radeon: Add radeon.test parameter for running BO GPU copy tests. drm/radeon/kms: allow interruptible waits for objects. drm/ttm: powerpc: Fix Highmem cache flushing. x86: Export kmap_atomic_prot() needed for TTM. drm/ttm: Fix ttm in-kernel copying of pages with non-standard caching attributes. drm/ttm: Fix an oops and sync object leak. drm/radeon/kms: vram sizing on certain r100 chips needs workaround. drm/radeon: Pay more attention to object placement requested by userspace. drm/radeon: Fall back to evicting BOs with memcpy if necessary. drm/radeon: Don't unreserve twice on failure to validate. drm/radeon/kms: fix bandwidth computation on avivo hardware drm/radeon/kms: add initial colortiling support. drm/radeon/kms: fix hotspot handling on pre-avivo chips drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740 drm/radeon/kms: add PLL flag to prefer frequencies <= the target freq drm/radeon/kms: block RN50 from using 3D engine. drm/radeon/kms: fix VRAM sizing like DDX does it. ...
| * drm/radeon: set fb aperture sizes for framebuffer handoff.Dave Airlie2009-07-291-0/+5
| | | | | | | | | | | | This will allow efi/vesa to handoff to radeon. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/ttm: fix highuser vs dma32 confusion.Dave Airlie2009-07-291-1/+3
| | | | | | | | | | | | | | | | DMA32 and highmem are sort of exclusive. Noticed by AndrewR on #radeon. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Fix size used for benchmarking BO copies.Michel Dänzer2009-07-291-2/+2
| | | | | | | | | | | | | | The incorrect size caused benchmark results to be inflated by a factor of 4. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Add radeon.test parameter for running BO GPU copy tests.Michel Dänzer2009-07-295-1/+225
| | | | | | | | | | | | | | | | | | | | | | If enabled, during initialization BO GTT->VRAM and VRAM->GTT GPU copies are tested across the whole GTT aperture. This has helped uncover the benchmark copy size bug and verify the maximum aperture size supported by the AGP bridge in my PowerBook. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: allow interruptible waits for objects.Dave Airlie2009-07-292-2/+2
| | | | | | | | | | | | | | | | | | Blocking here isn't something the X server mouse appreciates, avoid the block and let userspace retry the waits. libdrm_radeon userspace library is also expecting EBUSY not ERESTART Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/ttm: powerpc: Fix Highmem cache flushing.Thomas Hellstrom2009-07-291-4/+10
| | | | | | | | | | | | | | | | Temporarily maps highmem pages while flushing to get a valid virtual address to flush. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * x86: Export kmap_atomic_prot() needed for TTM.Thomas Hellstrom2009-07-291-0/+1
| | | | | | | | | | | | | | | | | | This functionality is needed to kmap_atomic() highmem pages that may potentially have or are about to set up other mappings with non-standard caching attributes. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/ttm: Fix ttm in-kernel copying of pages with non-standard caching ↵Thomas Hellstrom2009-07-291-11/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | attributes. For x86 this affected highmem pages only, since they were always kmapped cache-coherent, and this is fixed using kmap_atomic_prot(). For other architectures that may not modify the linear kernel map we resort to vmap() for now, since kmap_atomic_prot() generally uses the linear kernel map for lowmem pages. This of course comes with a performance impact and should be optimized when possible. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/ttm: Fix an oops and sync object leak.Thomas Hellstrom2009-07-291-2/+4
| | | | | | | | | | | | | | | | The code was potentially dereferencig a NULL sync object pointer. At the same time a sync object reference was potentially leaked. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: vram sizing on certain r100 chips needs workaround.Dave Airlie2009-07-2912-42/+56
| | | | | | | | | | | | | | | | | | | | | | If an rn50/r100/m6/m7 GPU has < 64MB RAM, i.e. 8/16/32, the aperture used to calculate the MC_FB_LOCATION needs to be worked out from the CONFIG_APER_SIZE register, and not the actual vram size. TTM VRAM size was also being initialised wrong, use actual vram size to initialise it. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Pay more attention to object placement requested by userspace.Michel Dänzer2009-07-291-14/+11
| | | | | | | | | | | | | | | | Previously we were basically always setting the GTT and VRAM flags regardless of what userspace requested. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Fall back to evicting BOs with memcpy if necessary.Michel Dänzer2009-07-291-6/+9
| | | | | | | | | | | | | | | | Otherwise if there's no GTT space we would fail the eviction, leading to cascaded failure. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Don't unreserve twice on failure to validate.Michel Dänzer2009-07-291-1/+0
| | | | | | | | | | | | | | | | This is done later in radeon_object_list_unvalidate(). Doing it twice triggers a BUG in TTM, rendering X on KMS unusable until reboot. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix bandwidth computation on avivo hardwareJerome Glisse2009-07-2919-1354/+2377
| | | | | | | | | | | | | | | | | | Fix bandwidth computation and crtc priority in memory controller so that crtc memory request are fullfill in time to avoid display artifact. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add initial colortiling support.Dave Airlie2009-07-2917-19/+427
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds new set/get tiling interfaces where the pitch and macro/micro tiling enables can be set. Along with a flag to decide if this object should have a surface when mapped. The only thing we need to allocate with a mapped surface should be the frontbuffer. Note rotate scanout shouldn't require one, and back/depth shouldn't either, though mesa needs some fixes. It fixes the TTM interfaces along Thomas's suggestions, and I've tested the surface stealing code with two X servers and not seen any lockdep issues. I've stopped tiling the fbcon frontbuffer, as I don't see there being any advantage other than testing, I've left the testing commands in there, just flip the fb_tiled to true in radeon_fb.c Open: Can we integrate endian swapping in with this? Future features: texture tiling - need to relocate texture registers TXOFFSET* with tiling info. This also merges Michel's cleanup surfaces regs at init time patch even though it makes sense on its own, this patch really relies on it. Some PowerMac firmwares set up a tiling surface at the beginning of VRAM which messes us up otherwise. that patch is: Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix hotspot handling on pre-avivo chipsAlex Deucher2009-07-152-2/+8
| | | | | | | | | | | | | | Need to adjust CUR_OFFSET for yorigin Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740Alex Deucher2009-07-151-0/+6
| | | | | | | | | | | | | | | | | | | | Allows us to hit dot clocks much closer, especially on chips with non-27 Mhz reference clocks like most IGP chips. This fixes most flickering and blanking problems with non-exact dot clocks on these chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add PLL flag to prefer frequencies <= the target freqAlex Deucher2009-07-152-1/+6
| | | | | | | | | | | | | | | | This is needed when using fractional feedback dividers on some IGP chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: block RN50 from using 3D engine.Dave Airlie2009-07-152-0/+7
| | | | | | | | | | | | | | | | RN50/ES1000 is a cut-down rv100 chip used in the server market. The 3D engine on these is either not there or unverified so refuse any attempt to configure registers on it. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix VRAM sizing like DDX does it.Dave Airlie2009-07-157-31/+71
| | | | | | | | | | | | | | | | | | | | Doing this like the DDX seems like the most sure fire way to avoid having to reinvent it slowly and painfully. At the moment we keep getting things wrong with aper vs vram, so we know the DDX does it right. booted on PCI r100, PCIE rv370, IGP rs400. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/ttm/radeon: add dma32 support.Dave Airlie2009-07-156-7/+35
| | | | | | | | | | | | | | | | | | This add support for using dma32 memory on gpus that really need it. Currently IGPs are left without DMA32 but we might need to change that unless we can fix rs690. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Endianness fixes for radeondrmfb.Michel Dänzer2009-07-151-3/+50
| | | | | | | | | | | | | | | | For now handle it via r/g/b offsets and disallow 16 bpp modes on big endian machines. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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