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* xen: move Xen-testing predicates to common headerJeremy Fitzhardinge2009-11-0415-27/+54
| | | | | | | | Move xen_domain and related tests out of asm-x86 to xen/xen.h so they can be included whenever they are necessary. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: allow MMCONFIG above 4GBBjorn Helgaas2009-11-041-11/+20
| | | | | | | | | | | | | | | | | | The current whitelist requires a kernel change for every machine that has MMCONFIG regions above 4GB, even if BIOS provides a correct MCFG table. This patch expands the whitelist to include machines with a rev 1 or newer MCFG table and a DMI_BIOS_DATE of 2010 or later. That way, we only need kernel changes for new machines that provide incorrect MCFG tables. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> CC: Matthew Wilcox <willy@linux.intel.com> CC: John Keller <jpk@sgi.com> CC: Yinghai Lu <yhlu.kernel@gmail.com> CC: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> CC: Andi Kleen <andi@firstfloor.org> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI/PAT: return EINVAL for pci mmap WC request for !pat_enabledSuresh Siddha2009-11-041-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Thomas Schlichter reported: > X.org uses libpciaccess which tries to mmap with write combining enabled via > /sys/bus/pci/devices/*/resource0_wc. Currently, when PAT is not enabled, the > kernel does fall back to uncached mmap. Then libpciaccess thinks it succeeded > mapping with write combining enabled and does not set up suited MTRR entries. > ;-( Instead of silently mapping pci mmap region as UC minus in the case of !pat_enabled and wc request, we can return error. Eric Anholt mentioned that caller (like X) typically follows up with UC minus pci mmap request and if there is a free mtrr slot, caller will manage adding WC mtrr. Jesse Barnes says: > Older versions of libpciaccess will behave better if we do it that way > (iirc it only allocates an MTRR if the resource_wc file doesn't exist or > fails to get mapped). Reported-by: Thomas Schlichter <thomas.schlichter@web.de> Signed-off-by: Thomas Schlichter <thomas.schlichter@web.de> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PNP: print resources consistently with %pRtBjorn Helgaas2009-11-044-61/+18
| | | | | | | | This uses %pRt and %pRf to print additional resource information (type, size, prefetchability, etc.) consistently. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* ia64/PCI: print resources consistently with %pRtBjorn Helgaas2009-11-041-5/+16
| | | | | | | | This uses %pRt to print additional resource information (type, size, prefetchability, etc.) consistently. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: print resources consistently with %pRtBjorn Helgaas2009-11-042-10/+16
| | | | | | | | This uses %pRt to print additional resource information (type, size, prefetchability, etc.) consistently. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: print resources consistently with %pRtBjorn Helgaas2009-11-044-43/+24
| | | | | | | | This uses %pRt to print additional resource information (type, size, prefetchability, etc.) consistently. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* vsprintf: add %pRt, %pRf to print struct resource detailsBjorn Helgaas2009-11-041-7/+44
| | | | | | | | | This adds support for printing struct resource type and flag information. For example, "%pRt" looks like "[mem 0x80080000000-0x8008001ffff 64bit pref]", and "%pRf" looks like "[mem 0xff5e2000-0xff5e2007 pref flags 0x1]". Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* vsprintf: add %pR support for IRQ and DMA resourcesBjorn Helgaas2009-11-041-10/+21
| | | | | | | | | Print addresses (IO port numbers and memory addresses) in hex, but print others (IRQs and DMA channels) in decimal. Only print the end if it's different from the start. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* vsprintf: fix io/mem resource widthBjorn Helgaas2009-11-041-2/+2
| | | | | | | | | The leading "0x" consumes field width, so leave space for it in addition to the 4 or 8 hex digits. This means we'll print "0x0000-0x01df" rather than "0x00-0x1df", for example. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI hotplug: acpiphp should be linked after vendor driversMatthew Garrett2009-11-041-4/+8
| | | | | | | | | | | | | As a followup to 71a082efc9fdc12068a3cee6cebb1330b00ebeee, it's conceivable that some vendors may expose PCI hotplug functionality through both vendor mechanisms and ACPI. The native mechanism will generally be a superset of any functionality provided via ACPI, so the acpiphp driver should always be initialised after any others. Change the link order such that acpiphp will not be initialised until any other statically linked drivers have had an opportunity to claim the hardware. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI hotplug: change PCI nomenclatureStefan Assmann2009-11-041-11/+11
| | | | | | | | Change PCI nomenclature according to http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf. Signed-off-by: Stefan Assmann <sassmann@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: Use generic cacheline sizing instead of per-vendor tests.Dave Jones2009-11-041-7/+11
| | | | | | | | | | | | | | | | | Instead of the PCI code needing to have code to determine the cacheline size of each processor, use the data the cpu identification code should have already determined during early boot. (The vendor checks are also incomplete, and don't take into account modern CPUs) I've been carrying a variant of this code in Fedora for a while, that prints debug information. There are a number of cases where we are currently setting the PCI cacheline size to 32 bytes, when the CPU cacheline size is 64 bytes. With this patch, we set them both the same. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pci_dfl_cache_line_size is __devinitdataTejun Heo2009-11-041-1/+1
| | | | | | | | | | pci_dfl_cache_line_size is marked as __initdata but referenced by pci_init() which is __devinit. Make it __devinitdata instead of __initdata. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* pccard: configure CLS on attachTejun Heo2009-11-043-28/+36
| | | | | | | | | | | | | | | | | | | | | | | For non hotplug PCI devices, the system firmware usually configures CLS correctly. For pccard devices system firmware can't do it and Linux PCI layer doesn't do it either. Unfortunately this leads to poor performance for certain devices (sata_sil). Unless MWI, which requires separate configuration, is to be used, CLS doesn't affect correctness, so the configuration should be harmless. This patch makes pci_set_cacheline_size() always built and export it and make pccard call it during attach. Please note that some other PCI hotplug drivers (shpchp and pciehp) also configure CLS on hotplug. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Daniel Ritz <daniel.ritz@gmx.ch> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Cc: Greg KH <greg@kroah.com> Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Axel Birndt <towerlexa@gmx.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* sparc64/PCI: drop PCI_CACHE_LINE_BYTESTejun Heo2009-11-043-7/+8
| | | | | | | | | | sparc64 is now the only user of PCI_CACHE_LINE_BYTES. Drop it and set pci_dfl_cache_line_size from pcibios_init() instead and drop PCI_CACHE_LINE_BYTES handling from generic pci code. Orignally-From: David Miller <davem@davemloft.net> Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: determine CLS more intelligentlyJesse Barnes2009-11-045-19/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Till now, CLS has been determined either by arch code or as L1_CACHE_BYTES. Only x86 and ia64 set CLS explicitly and x86 doesn't always get it right. On most configurations, the chance is that firmware configures the correct value during boot. This patch makes pci_init() determine CLS by looking at what firmware has configured. It scans all devices and if all non-zero values agree, the value is used. If none is configured or there is a disagreement, pci_dfl_cache_line_size is used. arch can set the dfl value (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) or override the actual one. ia64, x86 and sparc64 updated to set the default cls instead of the actual one. While at it, declare pci_cache_line_size and pci_dfl_cache_line_size in pci.h and drop private declarations from arch code. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: David Miller <davem@davemloft.net> Acked-by: Greg KH <gregkh@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: read root resources from IOH on IntelYinghai Lu2009-11-044-27/+135
| | | | | | | | For intel systems with multi IOH, we should read peer root resources directly from PCI config space, and don't trust _CRS. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2009-11-048-95/+486
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Ironlake suspend/resume support drm/i915: kill warning in intel_find_pll_g4x_dp drm/i915: update watermarks before enabling PLLs drm/i915: add FIFO watermark support for G4x drm/i915: quiet DP i2c init drm/i915: fix panel fitting filter coefficient select for Ironlake drm/i915: fix to setup display reference clock control on Ironlake drm/i915: Install a fence register for fbc on g4x drm/i915: save/restore BLC histogram control reg across suspend/resume drm/i915: Fix FDI M/N setting according with correct color depth drm/i915: disable powersave feature for Ironlake currently drm/i915: Fix render reclock availability detection. drm/i915: Save and restore the GM45 FBC regs on suspend and resume. drm/i915: Set the LVDS_BORDER when using LVDS scaling mode drm/i915: disable FBC for Pineview, fixing a boot hang.
| * drm/i915: Ironlake suspend/resume supportZhenyu Wang2009-10-232-55/+256
| | | | | | | | | | | | | | | | | | | | This adds registers save/restore for Ironlake to make suspend work. Signed-off-by: Guo, Chaohong <chaohong.guo@intel.com> [zhenyuw: some code re-orgnization, and add more save/restore for FDI link and transcoder registers, also fix palette register for Ironlake] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: kill warning in intel_find_pll_g4x_dpJesse Barnes2009-10-231-0/+1
| | | | | | | | | | | | | | Initialize clock.vco to silence gcc. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: update watermarks before enabling PLLsJesse Barnes2009-10-231-1/+2
| | | | | | | | | | | | | | | | | | | | When coming back from DPMS or turning on a display, make sure we have the watermarks set up before turning on the display plane, otherwise we may get underruns. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: add FIFO watermark support for G4xJesse Barnes2009-10-232-8/+84
| | | | | | | | | | | | | | | | | | Turns out G4x needs to have sensible watermarks set, especially for self-refresh enabled modes. Add support for it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: quiet DP i2c initZhenyu Wang2009-10-191-1/+1
| | | | | | | | | | Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: fix panel fitting filter coefficient select for IronlakeZhenyu Wang2009-10-192-1/+6
| | | | | | | | | | | | | | | | | | | | | | Must set filter selection as hardcoded coefficients for medium 3x3 filtering, which matches vbios setting for Ironlake. This fixes display corrupt issue on HP arrandale with new vbios. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: fix to setup display reference clock control on IronlakeZhenyu Wang2009-10-192-2/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For new stepping of PCH, the display reference clock is fully under driver's control. This one trys to setup all needed reference clock for different outputs. Older stepping of PCH chipset should be ignoring this. This fixes output failure issue on newer PCH which requires driver to take control of reference clock enabling. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Install a fence register for fbc on g4xChris Wilson2009-10-151-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable framebuffer compression on a g4x, we not only need the buffer to tiled (X only), we also need to hold a fence register for the buffer. Currently we only install a fence register for pre-i965s when setting up the scanout buffer. Rather than adding some convoluted logic to g4x_enable_fbc() to acquire a fence register, and perhaps to g4x_disable_fbc() to release it again, we can extend the acquisition during setup to all chipsets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: save/restore BLC histogram control reg across suspend/resumeJesse Barnes2009-10-153-0/+5
| | | | | | | | | | | | | | | | Turns out some machines, like the ThinkPad X40 don't come back if you don't save/restore this register. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Fix FDI M/N setting according with correct color depthZhenyu Wang2009-10-132-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | FDI M/N calculation hasn't taken the current pipe color depth into account, but always set as 24bpp. This one checks current pipe color depth setting, and change FDI M/N calculation a little to use bits_per_pixel first, then convert to bytes_per_pixel later. This fixes display corrupt issue on Arrandle LVDS with 1600x900 panel in 18bpp dual-channel mode. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: disable powersave feature for Ironlake currentlyZhenyu Wang2009-10-132-3/+13
| | | | | | | | | | | | | | | | | | | | | | Until we figure out the right setting for powersave features on Ironlake, disable it for now. Also disable watermark update, which has new registers for it on Ironlake too. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: Resolved against the Pineview FBC changes] Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Fix render reclock availability detection.Andy Lutomirski2009-10-131-8/+6
| | | | | | | | | | | | | | | | | | If the device didn't support EDP, we would bail out too soon. Signed-off-by: Andy Lutomirski <luto@mit.edu> [anholt: Pulled this patch out of the patch for adding quirks to enable reclocking.] Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Save and restore the GM45 FBC regs on suspend and resume.Jesse Barnes2009-10-132-8/+19
| | | | | | | | | | | | | | | | This hasn't fixed the regressions we were testing against, but clearly should be required. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Set the LVDS_BORDER when using LVDS scaling modeZhao Yakui2009-10-134-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the spec the LVDS_BORDER_ENABLE bit decides whether the border data should be included in the active display and data sent to the panel. Border should be used when in VGA centered (un-scaled) mode or when scaling a 4:3 source image to a wide screen panel (typical 16:9). So when the LVDS scaling is used, decide whether the LVDS_BORDER should be enabled or not according to the current scaling mode. At the same time fix the typo error in LVDS center scaling mode. https://bugs.freedesktop.org/show_bug.cgi?id=23789 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> tested-by: Zhao Jian <jian.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: disable FBC for Pineview, fixing a boot hang.Shaohua Li2009-10-132-3/+2
| | | | | | | | | | | | | | Pineview doesn't have this FBC mechanism, so this code doesn't apply. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | Merge branch 'for-linus' of git://git.kernel.dk/linux-2.6-blockLinus Torvalds2009-11-033-18/+32
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git.kernel.dk/linux-2.6-block: cfq-iosched: limit coop preemption cfq-iosched: fix bad return value cfq_should_preempt() backing-dev: bdi sb prune should be in the unregister path, not destroy Fix bio_alloc() and bio_kmalloc() documentation bio_put(): add bio_clone() to the list of functions in the comment
| * | cfq-iosched: limit coop preemptionShaohua Li2009-11-031-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CFQ has an optimization for cooperated applications. if several io-context have close requests, they will get boost. But the optimization get abused. Considering thread a, b, which work on one file. a reads sectors s, s+2, s+4, ...; b reads sectors s+1, s+3, s +5, ... Both a and b are sequential read, so they can open idle window. a reads a sector s and goes to idle window and wakeup b. b reads sector s+1, since in current implementation, cfq_should_preempt() thinks a and b are cooperators, b will preempt a. b then reads sector s+1 and goes to idle window and wakeup a. for the same reason, a will preempt b and reads s+2. a and b will continue the circle. The circle will be very long, and a and b will occupy whole disk queue. Other applications will nearly have no chance to run. Fix this limiting coop preempt until a queue is scheduled normally again. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Acked-by: Jeff Moyer <jmoyer@redhat.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | cfq-iosched: fix bad return value cfq_should_preempt()Jens Axboe2009-11-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Commit a6151c3a5c8e1ff5a28450bc8d6a99a2a0add0a7 inadvertently reversed a preempt condition check, potentially causing a performance regression. Make the meta check correct again. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | backing-dev: bdi sb prune should be in the unregister path, not destroyJens Axboe2009-11-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 592b09a42fc3ae6737a0f3ecf4fee42ecd0296f8 was different from the tested path, in that it moved the bdi super_block prune from unregister to destroy context. This doesn't fully fix the sync hang bug on unexpected device removal, as need to prune the bdi cache pointer before killing flusher thread. Tested-by: Artur Skawina <art.08.09@gmail.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | Fix bio_alloc() and bio_kmalloc() documentationAlberto Bertogli2009-11-021-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 451a9ebf accidentally broke bio_alloc() and bio_kmalloc() comments by (almost) swapping them. This patch fixes that, by placing the comments in the right place. Signed-off-by: Alberto Bertogli <albertito@blitiri.com.ar> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | bio_put(): add bio_clone() to the list of functions in the commentAlberto Bertogli2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | In bio_put()'s comment, add bio_clone() to the list of functions that can give you a bio reference. Signed-off-by: Alberto Bertogli <albertito@blitiri.com.ar> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* | | Merge branch 'upstream-linus' of ↵Linus Torvalds2009-11-033-9/+41
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev * 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: sata_via: Remove redundant device ID for VIA VT8261 drivers/ata/libata: Move dereference after NULL test ahci: Enable SB600 64bit DMA on MSI K9A2 Platinum v2
| * | | sata_via: Remove redundant device ID for VIA VT8261JosephChan@via.com.tw2009-11-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just remove redundant device ID for VIA VT8261. The device ID 0x9000 and 0x9040 are redundant (for VT8261). The 0x9040 is reserved for other usage. Signed-off-by: Joseph Chan <josephchan@via.com.tw> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | | drivers/ata/libata: Move dereference after NULL testJulia Lawall2009-11-031-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In each case, if the NULL test on qc is needed, then the derefernce should be after the NULL test. A simplified version of the semantic match that detects this problem is as follows (http://coccinelle.lip6.fr/): // <smpl> @match exists@ expression x, E; identifier fld; @@ * x->fld ... when != \(x = E\|&x\) * x == NULL // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | | ahci: Enable SB600 64bit DMA on MSI K9A2 Platinum v2Mark Nelson2009-11-031-5/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like the Asus M2A-VM, MSI's K9A2 Platinum (MS-7376) can also support 64bit DMA. It is a new enough board that all the BIOS releases work correctly with 64bit DMA enabled. Signed-off-by: Mark Nelson <mdnelson8@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* | | | Linux 2.6.32-rc6v2.6.32-rc6Linus Torvalds2009-11-031-1/+1
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* | | | Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds2009-11-032-0/+12
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://github.com/at91linux/linux-2.6-at91: at91: at91sam9g45 family: identify several chip versions avr32: add two new at91 to cpu.h definition
| * | | | at91: at91sam9g45 family: identify several chip versionsNicolas Ferre2009-11-032-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds the capacity to differentiate Engineering Samples and final lots through the inclusion of at91_cpu_fully_identify() and the related chip IDs with chip version field preserved. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
| * | | | avr32: add two new at91 to cpu.h definitionNicolas Ferre2009-11-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Somme common drivers will need those at91 cpu_is_xxx() definitions. As at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch that adds those chips to cpu.h in AVR32 architecture. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | | | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2009-11-0354-440/+544
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits) MIPS: O32: Fix ppoll MIPS: Oprofile: Rename cpu_type from godson2 to loongson2 MIPS: Alchemy: Fix hang with high-frequency edge interrupts MIPS: TXx9: Fix spi-baseclk value MIPS: bcm63xx: Set the correct BCM3302 CPU name MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store MIPS: Avoid potential hazard on Context register MIPS: Octeon: Use lockless interrupt controller operations when possible. MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache MIPS: SMTC: Avoid queing multiple reschedule IPIs MIPS: GCMP: Avoid accessing registers when they are not present MIPS: GIC: Random fixes and enhancements. MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands MIPS: SPRAM: Clean up support code a little MIPS: 1004K: Enable SPRAM support. MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4 MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT. MIPS: MTI: Fix accesses to device registers on MIPS boards ...
| * | | | MIPS: O32: Fix ppollArnaud Patard2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sys_ppoll syscall needs to use a compat handler on 64bit kernels with o32 user-space. Signed-off-by: Arnaud Patard <apatard@mandriva.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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