summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* pinctrl: msm: Check for ngpios > MAX_NR_GPIOStephen Boyd2014-03-121-1/+5
| | | | | | | | | | Fail the probe and print a warning if SoC specific drivers have more GPIOs than there can be accounted for in the static bitmaps. This should avoid silent corruption/failures in the future. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: msm: Silence recursive lockdep warningStephen Boyd2014-03-121-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a driver calls enable_irq_wake() on a gpio turned interrupt from the msm pinctrl driver we'll get a lockdep warning like so: ============================================= [ INFO: possible recursive locking detected ] 3.14.0-rc3 #2 Not tainted --------------------------------------------- modprobe/52 is trying to acquire lock: (&irq_desc_lock_class){-.....}, at: [<c026aea0>] __irq_get_desc_lock+0x48/0x88 but task is already holding lock: (&irq_desc_lock_class){-.....}, at: [<c026aea0>] __irq_get_desc_lock+0x48/0x88 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&irq_desc_lock_class); lock(&irq_desc_lock_class); *** DEADLOCK *** May be due to missing lock nesting notation 4 locks held by modprobe/52: #0: (&__lockdep_no_validate__){......}, at: [<c04f2864>] __driver_attach+0x48/0x98 #1: (&__lockdep_no_validate__){......}, at: [<c04f2874>] __driver_attach+0x58/0x98 #2: (&irq_desc_lock_class){-.....}, at: [<c026aea0>] __irq_get_desc_lock+0x48/0x88 #3: (&(&pctrl->lock)->rlock){......}, at: [<c04bb4b8>] msm_gpio_irq_set_wake+0x20/0xa8 Silence it by putting the gpios into their own lock class. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mvebu: silence WARN to dev_warnSebastian Hesselbarth2014-03-121-1/+2
| | | | | | | | Pinctrl will WARN on missing DT resources, which is a little bit too noisy. Use dev_warn with FW_BUG instead. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: msm: drop wake_irqs bitmapJosh Cartwright2014-03-121-13/+1
| | | | | | | | | | | | | | | | | | Currently, the wake_irqs bitmap is used to track whether there are any gpio's which are configured as wake irqs, and uses this to determine whether or not to call enable_irq_wake()/disable_irq_wake() on the summary interrupt. However, the genirq core already handles this case, by maintaining a 'wake_count' per irq_desc, and only calling into the controlling irq_chip when wake_count transitions 0 <-> 1. Drop this bitmap, and unconditionally call irq_set_irq_wake() on the summary interrupt. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl-baytrail: add function mux checking in gpio pin requestChew, Kean Ho2014-03-111-3/+39
| | | | | | | | | | | | | The requested gpio pin must has the func_pin_mux field set to GPIO function by BIOS/FW in advanced. Else, the gpio pin request would fail. This is to ensure that we do not expose any gpio pins which shall be used for alternate functions, for eg: wakeup pin, I/O interfaces for LPSS, etc. Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: Darren Hart <dvhart@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: fix some typos and inconsistenciesStephen Warren2014-03-112-29/+17
| | | | | | | | | | | | drive_dev3_pins in pinctrl-tegra114.c wasn't used; delete it. pinctrl-tegra124.c had quite a few typos. Fix those. pinctrl-tegra124.c had a few mismatches between the *_groups[] ararys and the function lists in tegra124_groups[]. Fix those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* devicetree: bindings: Make msm8974-pinctrl documentation match codeStephen Boyd2014-03-071-7/+7
| | | | | | | | | | The compatible string doesn't have an x in it. Fix it. Also remove the "qcom" prefix from pins and functions as this binding uses the generic pinctrl bindings for the pins and functions. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7791: Add alternative MSIOF pin groupsGeert Uytterhoeven2014-03-051-0/+469
| | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7790: Add alternative MSIOF pin groupsGeert Uytterhoeven2014-03-051-0/+129
| | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'pinctrl-mvebu' into develLinus Walleij2014-03-0318-291/+1480
|\
| * Merge tag 'mvebu-pinctrl-3.15' of git://git.infradead.org/linux-mvebu into ↵Linus Walleij2014-03-0318-291/+1480
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pinctrl-mvebu mvebu pinctrl changes for v3.15 - various cleanup and refactorization - add drivers for the Armada 375, 380, and 385 SoCs - prepare dove for SoC code moving into mach-mvebu - DT documentation updates
| | * Merge tag 'tags/for-mvebu-pinctrl-3xx' into mvebu/pinctrlJason Cooper2014-03-016-0/+1093
| | |\ | | | | | | | | | | | | Sign for-mvebu/pinctrl-3xx
| | | * pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385Thomas Petazzoni2014-02-254-0/+547
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Marvell Armada 380/385 are new ARM SoCs from Marvell, part of the mvebu family, but using a Cortex-A9 CPU core. In terms of pin-muxing, it is similar to Armada 370 and XP for the register layout, only different in the number of available pins and their functions. Therefore, we simply use the existing drivers/pinctrl/mvebu/ infrastructure, with no other changes that the list of pins and corresponding functions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | | * pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375Thomas Petazzoni2014-02-254-0/+546
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Marvell Armada 375 is a new ARM SoC from Marvell, part of the mvebu family, but using a Cortex-A9 CPU core. In terms of pin-muxing, it is similar to Armada 370 and XP for the register layout, only different in the number of available pins and their functions. Therefore, we simply use the existing drivers/pinctrl/mvebu/ infrastructure, with no other changes that the list of pins and corresponding functions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| | * | Merge remote-tracking branch 'shesselba/for-mvebu/pinctrl-dove' into ↵Jason Cooper2014-03-018-113/+202
| | |\ \ | | | | | | | | | | | | | | | mvebu/pinctrl
| | | * | pinctrl: mvebu: dove: use global register regmapSebastian Hesselbarth2014-02-251-66/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have a regmap for global registers, get rid of the last remaining hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | pinctrl: mvebu: dove: use remapped pmu_mpp registersSebastian Hesselbarth2014-02-251-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have ioremapped pmu_mpp registers, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | pinctrl: mvebu: dove: use remapped mpp4 registerSebastian Hesselbarth2014-02-251-26/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have an ioremapped mpp4 register, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | pinctrl: mvebu: dove: use remapped mpp base registersSebastian Hesselbarth2014-02-251-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have ioremapped mpp base registers, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | pinctrl: mvebu: dove: request syscon regmap for global registersSebastian Hesselbarth2014-02-252-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dove pinctrl uses some global config registers to control pins. This patch requests a syscon regmap for those registers. As this changes DT to driver requirements, fallback to a self-registered regmap with hardcoded resources, if the corresponding syscon DT node is missing. Also, WARN about old DT binding usage to encourage users to update their DTBs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | pinctrl: mvebu: dove: request additional resourcesSebastian Hesselbarth2014-02-251-3/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dove pinctrl also requires additional registers to control all pins. This patch requests resources for mpp4 and pmu-mpp register ranges. As this changes DT to driver requirements, fallback to hardcoded resources, if the corresponding DT regs have not been set. Also, WARN about old DT binding usage to encourage users to update their DTBs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | devicetree: bindings: update MVEBU pinctrl binding documentationSebastian Hesselbarth2014-02-255-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dove pinctrl binding now requires three different reg properties. This updates corresponding binding and example accordingly. While at it, also document reg property as required for the other MVEBU SoC pinctrl nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | | * | devicetree: bindings: add missing Marvell Dove SoC documentationSebastian Hesselbarth2014-02-251-0/+22
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | Marvell Dove SoC binding was not documented, yet. Add the documentation and also describe Global Configuration register node in it. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * | Merge tag 'tags/for-mvebu-pinctrl-cleanup' into mvebu/pinctrlJason Cooper2014-03-016-186/+193
| | |\ \ | |/ / / | | | _ | | | Sign for-mvebu/pinctrl-cleanup
| | * pinctrl: mvebu: dove: reuse mpp_{set,get} in pmu callbacksSebastian Hesselbarth2014-02-251-20/+17
| | | | | | | | | | | | | | | | | | | | | Dove has pins that can be switched between normal and pmu functions. Rework pmu_mpp callbacks to reuse default mpp ctrl helpers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * pinctrl: mvebu: dove: consolidate auto-numbered pmu mpp rangesSebastian Hesselbarth2014-02-251-16/+1
| | | | | | | | | | | | | | | | | | | | | | | | Passing a NULL name for pin ranges will auto-generate standard names for each pin. With common pinctrl driver now checking NULL name correctly, consolidate mpp pins 0-15. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * pinctrl: mvebu: remove MPP_REG_CTRL macroThomas Petazzoni2014-02-251-16/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that each per-SoC pinctrl driver must implement its own get/set functions, there is no point in keeping the MPP_REG_CTRL macro, whose purpose was to let the core pinctrl mvebu driver use default get/set functions. While at it also update the comment about mvebu_mpp_ctrl. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * pinctrl: mvebu: remove common get/set functionsSebastian Hesselbarth2014-02-251-47/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With every SoC always providing its own get/set callbacks, we can now remove the generic ones, remove the obsolete base address, and always use the provided callbacks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * pinctrl: mvebu: move resource allocation to SoC specific driversSebastian Hesselbarth2014-02-255-16/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that mvebu pinctrl is designed, requesting mpp registers in common pinctrl driver does not allow SoC specific drivers to access this resource. Move resource allocation in each SoC pinctrl driver and enable already provided mpp_{set,get} callbacks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * pinctrl: mvebu: armada-xp: provide generic mpp callbacksSebastian Hesselbarth2014-02-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * pinctrl: mvebu: armada-370: provide generic mpp callbacksSebastian Hesselbarth2014-02-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * pinctrl: mvebu: kirkwood: provide generic mpp callbacksSebastian Hesselbarth2014-02-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
| | * pinctrl: mvebu: dove: provide generic mpp callbacksSebastian Hesselbarth2014-02-251-14/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. While at it, also make use of globally defined MPP macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * pinctrl: mvebu: add common mpp reg helper to mvebu pinctrl includeSebastian Hesselbarth2014-02-251-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds some defines and helper functions for the common mpp reg layout to mvebu pinctrl include. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
| | * pinctrl: mvebu: remove passing mvebu_mpp_ctrl to callbacksSebastian Hesselbarth2014-02-253-45/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only valuable information a special callback can derive from mvebu_mpp_ctrl passed to it, is the pin id. Instead of passing the struct, pass the pid directly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * pinctrl: mvebu: identify generic controls by nameSebastian Hesselbarth2014-02-251-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We treat unnamed controls as generic mvebu mpp register controls but we identify them by not being special controls. Flip the logic and use the name pointer as identification instead. While at it, add some comments explaining the not so obvious treatment. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * pinctrl: mvebu: remove obsolete per-control name buffer allocationSebastian Hesselbarth2014-02-251-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | With the introduction of a global name buffer, we can now remove the allocation and preparation of per-control name buffers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * pinctrl: mvebu: count unnamed controls and allocate name bufferSebastian Hesselbarth2014-02-251-5/+19
| |/ | | | | | | | | | | | | | | | | | | | | | | | | pinctrl-mvebu allows SoCs to pass unnamed controls that will get an auto-generated name of "mpp<PIN#>". Currently, we are allocating name buffers on a per-control basis while looping over passed controls. This counts the total number of unnamed controls and allocates a global name buffer instead. The new buffer is then used while assigning controls to pinctrl groups later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* | pinctrl: pfc: r8a7791: add mux data for IIC(B) coresWolfram Sang2014-02-251-0/+64
| | | | | | | | | | | | Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: at91: implement get_directionRichard Genoud2014-02-251-0/+12
| | | | | | | | | | | | | | | | This is needed for gpiod_get_direction(). Otherwise, it returns -EINVAL. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | ARM: shmobile: r8a7791 dtsi: Fix typo in msiof2 clock output nameGeert Uytterhoeven2014-02-251-1/+1
| | | | | | | | | | | | | | | | | | Introduced in commit cded80f869aef94853e056ab9c21e305b0c26138 ("ARM: shmobile: r8a7791: Add MSIOF clocks in device tree"). Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: imx: Fix pin name in debug message.Martin Fuzzey2014-02-251-1/+1
| | | | | | | | | | | | | | | | The wrong index counter was being used, causing the debug message to show an incorrect pin name. Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl-sunxi: Fix sun5i-a13 port F multiplexingHans de Goede2014-02-251-6/+6
| | | | | | | | | | | | | | | | | | | | The correct value for selecting the mmc0 function on port F pins is 2 not 4, as per the data-sheet: http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: pinctrl-adi: combine multiple groups of one function togetherSonic Zhang2014-02-254-147/+139
| | | | | | | | | | | | | | | | | | | | The data pins of some peripheral are different if connecting to different devices in one pinmux function. In the PPI case, data pins can be used in 8, 16 and 24 pin groups individually. Add these groups into one ppi function. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sirf: update copyright years to 2014Barry Song2014-02-253-3/+6
| | | | | | | | | | Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: nomadik: Convert to modern pm_opsUlf Hansson2014-02-251-8/+9
| | | | | | | | | | | | | | Use the SIMPLE_DEV_PM_OPS macro and convert to the modern pm ops. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: nomadik: Silence compiler warn for !CONFIG_PMUlf Hansson2014-02-251-1/+3
| | | | | | | | | | | | | | | | The static suspend/resume functions were not being used while !CONFIG_PM. Fix it and convert to CONFIG_PM_SLEEP. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: r8a7790: Add QSPI pin groupsGeert Uytterhoeven2014-02-251-0/+33
| | | | | | | | | | | | | | | | | | | | | | A QSPI function set consists of 3 groups: - qspi_ctrl (2 control wires) - qspi_data2 (2 data wires, for Single/Dual SPI) - qspi_data4 (4 data wires, for Quad SPI) Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl-msm: Add SPI8 pin definitionsIvan T. Ivanov2014-02-251-4/+9
| | | | | | | | | | | | | | | | | | Add pin, group and function definitions for SPI#8 controller. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Quiet logging about missing DT nodes when not using DTMark Brown2014-02-241-1/+3
| | | | | | | | | | | | | | | | | | | | On systems which were not booted using DT it is entirely unsurprising that device nodes don't have any DT information and this is going to happen for every single device in the system. Make pinctrl be less chatty about this situation by only logging in the case where we have DT. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
OpenPOWER on IntegriCloud