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* arm/dt: tegra devicetree supportGrant Likely2011-07-287-0/+368
| | | | | | | | | | Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* arm/versatile: Add device tree supportGrant Likely2011-07-2811-0/+414
| | | | | | | | | | | | | | | | For testing the dt work, define a dt-enabled versatile platform. This patch adds a new versatile platform for when using the device tree. Add platform and amba devices are discovered and registered by parsing the device tree. Clocks and initial io mappings are still configured statically. This patch still depends on some static platform_data for a few devices which is passed via the auxdata structure to of_platform_populate(), but it is a viable starting point until the drivers can get all configuration data out of the device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* dt/irq: add irq_domain_generate_simple() helperGrant Likely2011-07-282-0/+68
| | | | | | | | | irq_domain_generate_simple() is an easy way to generate an irq translation domain for simple irq controllers. It assumes a flat 1:1 mapping from hardware irq number to an offset of the first linux irq number assigned to the controller Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* irq: add irq_domain translation infrastructureGrant Likely2011-07-289-19/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds irq_domain infrastructure for translating from hardware irq numbers to linux irqs. This is particularly important for architectures adding device tree support because the current implementation (excluding PowerPC and SPARC) cannot handle translation for more than a single interrupt controller. irq_domain supports device tree translation for any number of interrupt controllers. This patch converts x86, Microblaze, ARM and MIPS to use irq_domain for device tree irq translation. x86 is untested beyond compiling it, irq_domain is enabled for MIPS and Microblaze, but the old behaviour is preserved until the core code is modified to actually register an irq_domain yet. On ARM it works and is required for much of the new ARM device tree board support. PowerPC has /not/ been converted to use this new infrastructure. It is still missing some features before it can replace the virq infrastructure already in powerpc (see documentation on irq_domain_map/unmap for details). Followup patches will add the missing pieces and migrate PowerPC to use irq_domain. SPARC has its own method of managing interrupts from the device tree and is unaffected by this change. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* arm/dt: Add dtb make ruleRob Herring2011-07-252-0/+13
| | | | | | | | | Add a make rule to compile dt blobs for ARM. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* arm/dt: Add skeleton dtsi fileGrant Likely2011-07-251-0/+13
| | | | | | Contains the bare minimum template required to boot with the device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* arm/dt: Add dt machine definitionGrant Likely2011-07-251-0/+7
| | | | | | | | This patch adds a DT_MACHINE_START macro to use instead of MACHINE_START when creating a machine_desc that supports using the device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-07-24211-5754/+7199
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (237 commits) ARM: 7004/1: fix traps.h compile warnings ARM: 6998/2: kernel: use proper memory barriers for bitops ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAM ARM: Fix build errors caused by adding generic macros ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPU ARM: CPU hotplug: pass in proper affinity mask on IRQ migration ARM: GIC: avoid routing interrupts to offline CPUs ARM: CPU hotplug: fix abuse of irqdesc->node ARM: 6981/2: mmci: adjust calculation of f_min ARM: 7000/1: LPAE: Use long long printk format for displaying the pud ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ARM: ARM_DMA_ZONE_SIZE is no more ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ...
| * Merge branch 'devel-stable' into for-nextRussell King2011-07-22107-4020/+5104
| |\ | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S
| | * ARM: Fix build errors caused by adding generic macrosRussell King2011-07-218-21/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 66a625a (ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros) introduced build errors when PM_SLEEP is not enabled. The per-CPU do_suspend/do_resume functions are defined via the preprocessor to constant 0. However, the macros which use these were converted to assembly, resulting in undefined references to these functions. Fix that by moving the ! ifdef section into proc-macros.S and deleting it from all effected proc-*.S files. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * Merge branch 'dma' of http://git.linaro.org/git/people/nico/linux into ↵Russell King2011-07-1855-288/+304
| | |\ | | | | | | | | | | | | devel-stable
| | | * ARM: ARM_DMA_ZONE_SIZE is no moreNicolas Pitre2011-07-182-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | One less dependency on mach/memory.h. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-182-2/+1
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-184-4/+9
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-186-4/+15
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-182-4/+3
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-1813-4/+48
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-183-7/+2
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-1813-7/+13
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: add dma_zone_size to the machine_desc structureNicolas Pitre2011-07-182-0/+10
| | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * ARM: change ARM_DMA_ZONE_SIZE into a variableNicolas Pitre2011-07-182-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having this value defined at compile time prevents multiple machines with conflicting definitions to coexist. Move it to a variable in preparation for having a per machine value selected at run time. This is relevant only when CONFIG_ZONE_DMA is selected. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | Merge branch 'kprobes-thumb' of git://git.yxit.co.uk/linux into devel-stableRussell King2011-07-15436-3923/+31057
| | |\ \
| | | * | ARM: kprobes: Remove now unused codeJon Medhurst2011-07-131-738/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Decode ARM preload (immediate) instructionsJon Medhurst2011-07-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These were missing from the previous implementation. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Reject probing of unprivileged load and store instructionsJon Medhurst2011-07-131-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These occur extremely rarely in the kernel and writing test cases for them is difficult. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Use new versions of emulate_ldr() and emulate_str()Jon Medhurst2011-07-131-14/+30
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add new versions of emulate_ldr() and emulate_str()Jon Medhurst2011-07-131-3/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These use the register calling conventions required by the new decoding table framework for calling simulated instructions. We rename the old versions of these functions to *_old for now. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()Jon Medhurst2011-07-131-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the emulation function for the instruction format used by the ARM multiply long instructions. It replaces use of prep_emulate_rdhi16rdlo12rs8rm0_wflags(). Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add emulate_rd12rm0_noflags_nopc()Jon Medhurst2011-07-131-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the emulation function for the instruction format used by the ARM bit-field manipulation instructions. Various other instruction forms can also make use of this and it is used to replace use of prep_emulate_rd12{rm0}{_modify} Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Replace use of prep_emulate_rd12rn16rm0_wflags()Jon Medhurst2011-07-131-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These can now use emulate_rd12rn16rm0_rwflags_nopc(). Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add emulate_rd16rn12rm0rs8_rwflags_nopc()Jon Medhurst2011-07-131-7/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the emulation function for the instruction format used by the ARM multiply-accumulate instructions. These don't allow use of PC so we don't have to add special cases for this. This function is used to replace use of prep_emulate_rd16rs8rm0_wflags and prep_emulate_rd16rn12rs8rm0_wflags. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate remaining instruction decoding functions to tablesJon Medhurst2011-07-131-80/+90
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_cccc_100x to decoding tablesJon Medhurst2011-07-131-20/+13
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_cccc_01xx to decoding tablesJon Medhurst2011-07-131-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_cccc_0111__1 to decoding tablesJon Medhurst2011-07-131-46/+36
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_cccc_0110__1 to decoding tablesJon Medhurst2011-07-131-126/+91
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add emulate_rd12rn16rm0_rwflags_nopc()Jon Medhurst2011-07-131-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the emulation function for the instruction format used by the ARM media instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_cccc_001x to decoding tablesJon Medhurst2011-07-131-66/+50
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_cccc_000x to decoding tablesJon Medhurst2011-07-131-136/+116
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM LDRD and STRD to decoding tablesJon Medhurst2011-07-131-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add emulate_ldrdstrd()Jon Medhurst2011-07-131-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an emulation function for the LDRD and STRD instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM data-processing (register) instructions to ↵Jon Medhurst2011-07-131-48/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | decoding tables Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add emulate_rd12rn16rm0rs8_rwflags()Jon Medhurst2011-07-131-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the emulation function for the instruction format used by the ARM data-processing instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add BLX macroJon Medhurst2011-07-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is for use by inline assembler which will be added to kprobes-arm.c It saves memory when used on newer ARM architectures and also provides correct interworking should ARM probes be required on Thumb kernels in the future. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Add alu_write_pc()Jon Medhurst2011-07-132-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This writes a new value to PC which was obtained as the result of an ARM ALU instruction. For ARMv7 and later this performs interworking. On ARM kernels we shouldn't encounter any ALU instructions trying to switch to Thumb mode so support for this isn't strictly necessary. However, the approach taken in all other instruction decoding is for us to avoid unpredictable modification of the PC for security reasons. This is usually achieved by rejecting insertion of probes on problematic instruction, but for ALU instructions we can't do this as it depends on the contents of the CPU registers at the time the probe is hit. So, as we require some form of run-time checking to trap undesirable PC modification, we may as well simulate the instructions correctly, i.e. in the way they would behave in the absence of a probe. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Migrate ARM space_1111 to decoding tablesJon Medhurst2011-07-131-31/+25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Decode 32-bit Thumb multiply and absolute difference instructionsJon Medhurst2011-07-131-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Decode 32-bit Thumb long multiply and divide instructionsJon Medhurst2011-07-131-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Decode 32-bit Thumb data-processing (register) instructionsJon Medhurst2011-07-131-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | | * | ARM: kprobes: Decode 32-bit Thumb load/store single data item instructionsJon Medhurst2011-07-131-0/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will reject probing of unprivileged load and store instructions. These rarely occur and writing test cases for them is difficult. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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