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* MIPS: ath25: add common partsSergey Ryazanov2014-11-2412-0/+296
| | | | | | | | | Add common code for Atheros AR5312 and Atheros AR2315 SoCs families. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8237 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: FW: Use kstrtoul() to parse unsigned long from the fw environmentAlban Bedel2014-11-241-3/+3
| | | | | | | | | | | Fix some value corruptions with values that can't be represented in a signed long. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8358/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: FW: Fix parsing u-boot environmentAlban Bedel2014-11-241-1/+1
| | | | | | | | | | | When reading u-boot's key=value pairs it should skip the '=' and not use the next argument. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8357/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* TC: Error handling clean-upsMaciej W. Rozycki2014-11-241-17/+19
| | | | | | | | | | | Rewrite TURBOchannel error handling to use a common failure path, making sure put_device is called for devices that failed initialization. While at it update printk calls to use pr_err rather than KERN_ERR. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add rt2880 pci driverJohn Crispin2014-11-243-0/+287
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8034/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: allow loading irq registers from the devicetreeJohn Crispin2014-11-241-10/+25
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add mt7628an supportJohn Crispin2014-11-243-46/+243
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8031/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add support for MT7620nJohn Crispin2014-11-242-12/+15
| | | | | | | | This is the small version of MT7620a. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: cleanup early_printkJohn Crispin2014-11-241-15/+30
| | | | | | | | | Add support for the new MT7621/8 SoC and kill ifdefs. Cleanup some whitespace error while we are at it. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: cleanup the soc specific pinmux dataJohn Crispin2014-11-2410-420/+294
| | | | | | | | | | Before we had a pinctrl driver we used a custom OF api. This patch converts the soc specific pinmux data to a new set of structs. We also add some new pinmux setings. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8009/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: copy the commandline from the devicetreeJohn Crispin2014-11-241-0/+2
| | | | | | | | | | | | | | This is a regression caused by: commit afb46f7996e91aeb36e07bc92cf96e8045bec00e Author: Rob Herring <robh@kernel.org> Date: Wed Apr 2 19:07:24 2014 -0500 mips: ralink: convert to use unflatten_and_copy_device_tree Make the of init code reuse the cmdline defined inside the dts. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8008/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add a bootrom dumper moduleJohn Crispin2014-11-242-0/+50
| | | | | | | | | This patch adds a trivial driver that allows userland to extract the bootrom of a SoC via debugfs. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8002/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add rt3883 wmac clockJohn Crispin2014-11-241-0/+1
| | | | | | | | Register the wireless mac clock on rti3883. This is required by the wifi driver. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8007/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add rt2880 wmac clockJohn Crispin2014-11-241-1/+2
| | | | | | | | Register the wireleass mac clock on rt2880. This is required by the wifi driver. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8006/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add missing clk_set_rate() to clk.cJohn Crispin2014-11-241-0/+6
| | | | | | | | This function was missing causing make allmod to fail. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8005/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: allow manual memory overrideJohn Crispin2014-11-241-1/+15
| | | | | | | | | | RT5350 relies on the bootloader setting up the memc correctly. On some boards the setup is incorrect leading to 32 MB being available but only 16 MB being recognized. Allow these boards to manually override the memory range. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8004/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add illegal access driverJohn Crispin2014-11-242-0/+89
| | | | | | | | These SoCs have a special irq that fires upon an illegal memmory access. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8003/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add rt_sysc_m32 helperJohn Crispin2014-11-241-0/+7
| | | | | | | | We already have a read and write wrapper. This adds the missing mask wrapper. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8001/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add a helper for reading the ECO versionJohn Crispin2014-11-241-0/+5
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8000/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add verbose pmu infoJohn Crispin2014-11-241-0/+26
| | | | | | | | Print the PMU and LDO settings on boot. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/7999/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: add missing spi clock on falcon SoCJohn Crispin2014-11-241-0/+2
| | | | | | | Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8050/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: the detection of the gpe clock is brokenJohn Crispin2014-11-241-5/+4
| | | | | | | | | The code to detect unfused SoCs was broken due to missing register masking. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8049/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: copy the commandline from the devicetreeJohn Crispin2014-11-241-0/+2
| | | | | | | | | | | | | | This is a regression caused by: commit afb46f7996e91aeb36e07bc92cf96e8045bec00e Author: Rob Herring <robh@kernel.org> Date: Wed Apr 2 19:07:24 2014 -0500 mips: ralink: convert to use unflatten_and_copy_device_tree Make the of init code reuse the cmdline defined inside the dts. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8048/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: move eiu init after irq_domain registerJohn Crispin2014-11-241-24/+24
| | | | | | | | The eiu init failed as the irq_domain was not yet available. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8047/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: export soc typeJohn Crispin2014-11-242-0/+7
| | | | | | | | The voice and dsl drivers need to know which SoC we are running on. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/8046/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: add support for xrx200 firmware depending on soc typeJohn Crispin2014-11-241-1/+22
| | | | | | | | | | | | VR9 needs different firmware files for the various phy/soc revisions. Some boards are ship with older and newer SoC revisions. To be able to boot a single image on all versions we need to define both firmware files inside the devicetree. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8045/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: reboot gphy on restartJohn Crispin2014-11-241-1/+8
| | | | | | | | | A reboot sometimes lead to a none working phy. An explicit reboot fixes the problem. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: add reset-controller api supportJohn Crispin2014-11-242-0/+63
| | | | | | | | | Add a reset-controller binding for the reset registers found on the lantiq SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8043/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: handle vmmc memory reservationJohn Crispin2014-11-242-0/+71
| | | | | | | | | | The Lantiq SoCs have a 2nd mips core called "voice mips macro core (vmmc)" which is used to run the voice firmware. This driver allows us to register a chunk of memory that the voice driver can later use for the 2nd core. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8042/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Remove direct access to prepare_count field of struct clkTomeu Vizoso2014-11-241-4/+3
| | | | | | | | | | | | | | | Replacing it with a call to __clk_is_prepared(), which isn't entirely equivalent but in practice shouldn't matter. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8120/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Bump up rating of GIC timerAndrew Bresticker2014-11-241-1/+1
| | | | | | | | | | | | | | | | | Bump up the rating of the GIC timer so that it gets prioritized over the CP0 timer. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8141/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Use clockevents_config_and_registerAndrew Bresticker2014-11-241-9/+1
| | | | | | | | | | | | | | | | | Use clockevents_config_and_register to setup the clock_event_device based on frequency and min/max ticks instead of doing it ourselves. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8140/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Use CPU notifiers to setup the timerAndrew Bresticker2014-11-242-20/+45
| | | | | | | | | | | | | | | | | | Instead of requiring an explicit call to gic_clockevent_init in the SMP startup path, use CPU notifiers to register and enable the GIC timer on CPU startup. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8139/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Use percpu_dev_idAndrew Bresticker2014-11-241-3/+2
| | | | | | | | | | | | | | | | | Since the GIC timer IRQ is a percpu IRQ, we can use percpu_dev_id to pass the IRQ handler the correct clock_event_device. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8138/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Remove gic_event_handlerAndrew Bresticker2014-11-241-5/+0
| | | | | | | | | | | | | | | | Remove gic_event_handler since it is completely unnecessary. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8136/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Move gic_frequency to clocksource driverAndrew Bresticker2014-11-244-2/+5
| | | | | | | | | | | | | | | | | | There's no reason for gic_frequency to be global any more and it certainly doesn't belong in the GIC irqchip driver, so move it to the GIC clocksource driver. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8137/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Staticize local symbolsAndrew Bresticker2014-11-241-5/+5
| | | | | | | | | | | | | | | | | There are a number of variables and functions which are unnecessarily global. Mark them static. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8135/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic: Combine with GIC clockevent driverAndrew Bresticker2014-11-246-119/+92
| | | | | | | | | | | | | | | | | | | Combine the GIC clocksource driver with the GIC clockevent driver from arch/mips/kernel/cevt-gic.c and remove the clockevent driver's separate Kconfig symbol. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move GIC clocksource driver to drivers/clocksource/Andrew Bresticker2014-11-247-9/+9
| | | | | | | | | | | | | | | | Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Use GIC_SH_WEDGE_{SET,CLR} macrosAndrew Bresticker2014-11-241-2/+2
| | | | | | | | | | | | | | | | Use the GIC_SH_WEDGE_{SET,CLR} macros provided by mips-gic.h. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8134/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_{pending,itrmask}_regsAndrew Bresticker2014-11-241-13/+3
| | | | | | | | | | | | | | | | | | There's no reason for the pending and masked interrupt bitmasks to be global. Just declare them on the stack in gic_get_int() since they only consume (256*2)/8 = 64 bytes. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8131/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Clean up #includesAndrew Bresticker2014-11-241-5/+2
| | | | | | | | | | | | | | | | Sort the #includes and remove those which are unnecessary. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8130/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Clean up header fileAndrew Bresticker2014-11-242-104/+29
| | | | | | | | | | | | | | | | | Remove duplicate #defines and unnecessary #includes, fix parenthesization, and re-order register definitions in ascending order. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8128/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MAINTAINERS: Add entry for bcm63xx/bcm33xx UDC gadget driverKevin Cernekee2014-11-241-0/+6
| | | | | | | | | | | | | | | This hardware shows up on the newly-supported BCM3384 cable chip, as well as several old BCM63xx DSL chips. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8172/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MAINTAINERS: Add entry for BCM33xx cable chipsKevin Cernekee2014-11-241-0/+8
| | | | | | | | | | | | | | Add myself as a maintainer for the new BCM3384 board support code. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8171/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: bcm3384: Initial commit of bcm3384 platform supportKevin Cernekee2014-11-2413-0/+698
| | | | | | | | | | | | | | | | | | | | | | | | | | | This supports SMP Linux running on the BCM3384 Zephyr (BMIPS5000) application processor, with fully functional UART and USB 1.1/2.0. Device Tree is used to configure the following items: - All peripherals - Early console base address - SMP or UP mode - MIPS counter frequency - Memory size / regions - DMA offset - Kernel command line The DT-enabled bootloader and build instructions are posted at https://github.com/Broadcom/aeolus Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8170/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Documentation: DT: Add "mti" vendor prefixKevin Cernekee2014-11-241-0/+1
| | | | | | | | | | | | | | | We have a bunch of platforms using "mti,cpu-interrupt-controller" but the "mti" prefix isn't documented. Fix this. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8169/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Documentation: DT: Add entries for BCM3384 and its peripheralsKevin Cernekee2014-11-244-0/+67
| | | | | | | | | | | | | | This covers the new "brcm,*" devices added in the upcoming bcm3384 commit. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8168/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Create a helper function for DT setupKevin Cernekee2014-11-244-22/+22
| | | | | | | | | | | | | | | A couple of platforms register two buses and call of_platform_populate(). Move this into a common function to reduce duplication. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)Kevin Cernekee2014-11-242-0/+2
| | | | | | | | | | | | | | | | This is a dual core (quad thread) BMIPS5000. It needs a little extra code to boot the second core (CPU2/CPU3), but for now we can treat it the same as a single core BMIPS5000. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8166/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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