| Commit message (Collapse) | Author | Age | Files | Lines |
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Pull PCI update from Bjorn Helgaas:
"Host bridge hotplug:
- Untangle _PRT from struct pci_bus (Bjorn Helgaas)
- Request _OSC control before scanning root bus (Taku Izumi)
- Assign resources when adding host bridge (Yinghai Lu)
- Remove root bus when removing host bridge (Yinghai Lu)
- Remove _PRT during hot remove (Yinghai Lu)
SRIOV
- Add sysfs knobs to control numVFs (Don Dutile)
Power management
- Notify devices when power resource turned on (Huang Ying)
Bug fixes
- Work around broken _SEG on HP xw9300 (Bjorn Helgaas)
- Keep runtime PM enabled for unbound PCI devices (Huang Ying)
- Fix Optimus dual-GPU runtime D3 suspend issue (Dave Airlie)
- Fix xen frontend shutdown issue (David Vrabel)
- Work around PLX PCI 9050 BAR alignment erratum (Ian Abbott)
Miscellaneous
- Add GPL license for drivers/pci/ioapic (Andrew Cooks)
- Add standard PCI-X, PCIe ASPM register #defines (Bjorn Helgaas)
- NumaChip remote PCI support (Daniel Blueman)
- Fix PCIe Link Capabilities Supported Link Speed definition (Jingoo
Han)
- Convert dev_printk() to dev_info(), etc (Joe Perches)
- Add support for non PCI BAR ROM data (Matthew Garrett)
- Add x86 support for host bridge translation offset (Mike Yoknis)
- Report success only when every driver supports AER (Vijay
Pandarathil)"
Fix up trivial conflicts.
* tag 'for-3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)
PCI: Use phys_addr_t for physical ROM address
x86/PCI: Add NumaChip remote PCI support
ath9k: Use standard #defines for PCIe Capability ASPM fields
iwlwifi: Use standard #defines for PCIe Capability ASPM fields
iwlwifi: collapse wrapper for pcie_capability_read_word()
iwlegacy: Use standard #defines for PCIe Capability ASPM fields
iwlegacy: collapse wrapper for pcie_capability_read_word()
cxgb3: Use standard #defines for PCIe Capability ASPM fields
PCI: Add standard PCIe Capability Link ASPM field names
PCI/portdrv: Use PCI Express Capability accessors
PCI: Use standard PCIe Capability Link register field names
x86: Use PCI setup data
PCI: Add support for non-BAR ROMs
PCI: Add pcibios_add_device
EFI: Stash ROMs if they're not in the PCI BAR
PCI: Add and use standard PCI-X Capability register names
PCI/PM: Keep runtime PM enabled for unbound PCI devices
xen-pcifront: Handle backend CLOSED without CLOSING
PCI: SRIOV control and status via sysfs (documentation)
PCI/AER: Report success only when every device has AER-aware driver
...
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* pci/mjg-pci-roms-from-efi:
PCI: Use phys_addr_t for physical ROM address
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Use phys_addr_t rather than "void *" for physical memory address.
This removes casts and fixes a "cast from pointer to integer of different
size" warning on ppc44x_defconfig.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/daniel-numachip:
x86/PCI: Add NumaChip remote PCI support
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Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD Northbridges which shouldn't respond.
Signed-off-by: Daniel J Blueman <daniel@numascale-asia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/bjorn-pcie-cap:
ath9k: Use standard #defines for PCIe Capability ASPM fields
iwlwifi: Use standard #defines for PCIe Capability ASPM fields
iwlwifi: collapse wrapper for pcie_capability_read_word()
iwlegacy: Use standard #defines for PCIe Capability ASPM fields
iwlegacy: collapse wrapper for pcie_capability_read_word()
cxgb3: Use standard #defines for PCIe Capability ASPM fields
PCI: Add standard PCIe Capability Link ASPM field names
PCI/portdrv: Use PCI Express Capability accessors
PCI: Use standard PCIe Capability Link register field names
PCI: Add and use standard PCI-X Capability register names
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Use the standard #defines for PCIe Capability ASPM fields.
Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
these are defined for the Linux ASPM interfaces, e.g.,
pci_disable_link_state(), and only coincidentally match the actual register
bits. PCIE_LINK_STATE_CLKPM, also part of that interface, does not match
the register bit.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use the standard #defines rather than creating local definitions for
PCIe Capability ASPM fields.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Johannes Berg <johannes.berg@intel.com>
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iwl_pciexp_link_ctrl() has only one call site and no longer provides any
useful abstraction, so collapse it into the caller.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Johannes Berg <johannes.berg@intel.com>
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Use the standard #defines rather than creating local definitions for
PCIe Capability ASPM fields.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
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il_pcie_link_ctl() has only one call site and no longer provides any useful
abstraction, so collapse it into the caller.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
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Use the standard #defines rather than bare numbers for PCIe Capability
ASPM fields.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
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Add standard #defines for ASPM fields in PCI Express Link Capability and
Link Control registers.
Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
these are defined for the Linux ASPM interfaces, e.g.,
pci_disable_link_state(), and only coincidentally match the actual register
bits. PCIE_LINK_STATE_CLKPM, also part of that interface, does not match
the register bit.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
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Use PCI Express Capability access functions to simplify portdrv.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use the standard #defines for PCIe Link Status and Capability registers
rather than bare numbers.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Add and use #defines for PCI-X Capability registers and fields.
Note that the PCI-X Capability has a different layout for
type 0 (endpoint) and type 1 (bridge) devices.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/mjg-pci-roms-from-efi:
x86: Use PCI setup data
PCI: Add support for non-BAR ROMs
PCI: Add pcibios_add_device
EFI: Stash ROMs if they're not in the PCI BAR
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EFI can provide PCI ROMs out of band via boot services, which may not be
available after boot. Add support for using the data handed off to us by
the boot stub or bootloader.
[bhelgaas: added Seth's boot_params section mismatch fix]
[bhelgaas: drop "boot_params.hdr.version < 0x0209" test]
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Seth Forshee <seth.forshee@canonical.com>
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Platforms may provide their own mechanisms for obtaining ROMs. Add support
for using data provided by the platform in that case.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Seth Forshee <seth.forshee@canonical.com>
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Platforms may want to provide architecture-specific functionality during
PCI enumeration. Add a pcibios_add_device() call that architectures can
override to do so.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Seth Forshee <seth.forshee@canonical.com>
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EFI provides support for providing PCI ROMs via means other than the ROM
BAR. This support vanishes after we've exited boot services, so add support
for stashing copies of the ROMs in setup_data if they're not otherwise
available.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Seth Forshee <seth.forshee@canonical.com>
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* pci/huang-d3cold-fixes:
PCI/PM: Keep runtime PM enabled for unbound PCI devices
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For unbound PCI devices, what we need is:
- Always in D0 state, because some devices do not work again after
being put into D3 by the PCI bus.
- In SUSPENDED state if allowed, so that the parent devices can still
be put into low power state.
To satisfy these requirements, the runtime PM for the unbound PCI
devices are disabled and set to SUSPENDED state. One issue of this
solution is that the PCI devices will be put into SUSPENDED state even
if the SUSPENDED state is forbidden via the sysfs interface
(.../power/control) of the device. This is not an issue for most
devices, because most PCI devices are not used at all if unbound.
But there are exceptions. For example, unbound VGA card can be used
for display, but suspending its parents makes it stop working.
To fix the issue, we keep the runtime PM enabled when the PCI devices
are unbound. But the runtime PM callbacks will do nothing if the PCI
devices are unbound. This way, we can put the PCI devices into
SUSPENDED state without putting the PCI devices into D3 state.
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=48201
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
CC: stable@vger.kernel.org # v3.6+
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* pci/misc:
xen-pcifront: Handle backend CLOSED without CLOSING
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Backend drivers shouldn't transition to CLOSED unless the frontend is
CLOSED. If a backend does transition to CLOSED too soon then the
frontend may not see the CLOSING state and will not properly shutdown.
So, treat an unexpected backend CLOSED state the same as CLOSING.
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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* pci/don-sriov:
PCI: SRIOV control and status via sysfs (documentation)
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Add documentation of new sysfs files and new pci_driver SRIOV
configuration interface.
[bhelgaas: changelog]
Signed-off: Donald Dutile <ddutile@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/misc:
PCI/AER: Report success only when every device has AER-aware driver
Conflicts:
drivers/pci/pcie/aer/aerdrv_core.c
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When an error is detected on a PCIe device which does not have an
AER-aware driver, prevent AER infrastructure from reporting
successful error recovery.
This is because the report_error_detected() function that gets
called in the first phase of recovery process allows forward
progress even when the driver for the device does not have AER
capabilities. It seems that all callbacks (in pci_error_handlers
structure) registered by drivers that gets called during error
recovery are not mandatory. So the intention of the infrastructure
design seems to be to allow forward progress even when a specific
callback has not been registered by a driver. However, if error
handler structure itself has not been registered, it doesn't make
sense to allow forward progress.
As a result of the current design, in the case of a single device
having an AER-unaware driver or in the case of any function in a
multi-function card having an AER-unaware driver, a successful
recovery is reported.
Typical scenario this happens is when a PCI device is detached
from a KVM host and the pci-stub driver on the host claims the
device. The pci-stub driver does not have error handling capabilities
but the AER infrastructure still reports that the device recovered
successfully.
The changes proposed here leaves the device(s)in an unrecovered state
if the driver for the device or for any device in the subtree
does not have error handler structure registered. This reflects
the true state of the device and prevents any partial recovery (or no
recovery at all) reported as successful.
[bhelgaas: changelog]
Signed-off-by: Vijay Mohan Pandarathil <vijaymohan.pandarathil@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Linas Vepstas <linasvepstas@gmail.com>
Reviewed-by: Myron Stowe <myron.stowe@redhat.com>
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* for-linus:
PCI/portdrv: Don't create hotplug slots unless port supports hotplug
PCI/PM: Fix proc config reg access for D3cold and bridge suspending
PCI/PM: Resume device before shutdown
PCI/PM: Fix deadlock when unbinding device if parent in D3cold
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* pci/misc:
PCI/ACPI: Notify PCI devices when their power resource is turned on
PCI: Add GPL license for drivers/pci/ioapic module
PCI: Fix bit definitions of PCI_EXP_LNKCAP2 register
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This patch reduces power consumption by allowing idle devices to go to a
low power state after another device on the same power resource has been
awakened.
A power resource may be shared by multiple devices. When all devices
sharing a power resource are put into D3_COLD state, the power resource
will be turned off. When one of the devices is awakened, the power
resource will be turned on and all devices sharing it will be powered on to
D0uninitialized state. These devices should be resumed, so that they have
the opportunity to go to low power state later.
[bhelgaas: changelog]
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
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Config PCI_IOAPIC turned into a tristate in commit b95a7bd70046, but no
module license is specified. This adds the missing module license.
Signed-off-by: Andrew Cooks <acooks@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
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According to the PCIe 3.0 spec, PCI_EXP_LNKCAP2_SLS_2_5GB is
1st bit of PCI_EXP_LNKCAP2 register, not 0th bit. So, the bit
definition of supported link speed vector should be fixed.
[bhelgaas: change "Current" to "Supported"]
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/don-sriov:
PCI: Remove useless "!dev" tests
PCI: Use spec names for SR-IOV capability fields
PCI: Provide method to reduce the number of total VFs supported
PCI: SRIOV control and status via sysfs
PCI: Use is_visible() with boot_vga attribute for pci_dev
PCI: Add pci_device_type to pdev's device struct
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No need to check "!dev" when the caller should always supply a valid
pointer. If the caller *doesn't* supply a valid pointer, it probably
won't check for a failure return either. This way we'll oops and get a
backtrace.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use the same names (almost) as the spec for TotalVFs, InitialVFs, NumVFs.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Some implementations of SRIOV provide a capability structure
value of TotalVFs that is greater than what the software can support.
Provide a method to reduce the capability structure reported value
to the value the driver can support.
This ensures sysfs reports the current capability of the system,
hardware and software.
Example for its use: igb & ixgbe -- report 8 & 64 as TotalVFs,
but drivers only support 7 & 63 maximum.
Signed-off-by: Donald Dutile <ddutile@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Provide files under sysfs to determine the maximum number of VFs
an SR-IOV-capable PCIe device supports, and methods to enable and
disable the VFs on a per-device basis.
Currently, VF enablement by SR-IOV-capable PCIe devices is done
via driver-specific module parameters. If not setup in modprobe files,
it requires admin to unload & reload PF drivers with number of desired
VFs to enable. Additionally, the enablement is system wide: all
devices controlled by the same driver have the same number of VFs
enabled. Although the latter is probably desired, there are PCI
configurations setup by system BIOS that may not enable that to occur.
Two files are created for the PF of PCIe devices with SR-IOV support:
sriov_totalvfs Contains the maximum number of VFs the device
could support as reported by the TotalVFs register
in the SR-IOV extended capability.
sriov_numvfs Contains the number of VFs currently enabled on
this device as reported by the NumVFs register in
the SR-IOV extended capability.
Writing zero to this file disables all VFs.
Writing a positive number to this file enables that
number of VFs.
These files are readable for all SR-IOV PF devices. Writes to the
sriov_numvfs file are effective only if a driver that supports the
sriov_configure() method is attached.
Signed-off-by: Donald Dutile <ddutile@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Should make pci_create_sysfs_dev_files() simpler. Also fix possible
memleak in remove path.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Need type filled in device structure so it can be used for visible
attribute control in sysfs for pci_dev.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/mike-x86-tra:
x86/PCI: Allow x86 platforms to use translation offsets
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The memory range descriptors in the _CRS control method contain an address
translation offset for host bridges. This value is used to translate
addresses across the bridge. The support to use _TRA values is present for
other architectures but not for X86 platforms.
For existing X86 platforms the _TRA value is zero. Non-zero _TRA values
are expected on future X86 platforms. This change will register that value
with the resource.
Signed-off-by: Mike Yoknis <mike.yoknis@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/taku-prt-cleanup:
PCI/ACPI: Request _OSC control before scanning PCI root bus
PCI: Don't pass pci_dev to pci_ext_cfg_avail()
PCI/ACPI: Add _PRT interrupt routing info before enumerating devices
ACPI: Pass segment/bus to _PRT add/del so they don't depend on pci_bus
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This patch moves up the code block to request _OSC control in order to
separate ACPI work and PCI work in acpi_pci_root_add().
Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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pci_ext_cfg_avail() doesn't use the "struct pci_dev *" passed to
it, and there's no requirement that a host bridge even be represented
by a pci_dev. This drops the pci_ext_cfg_avail() parameter.
[bhelgaas: changelog]
Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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We used to add the _PRT after enumerating devices behind a new host
bridge. This moves the _PRT addition *before* the enumeration, since
it no longer depends on the struct pci_bus existing. This is one
step towards consolidating the .add/.start methods.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Taku Izumi <izumim.taku@jp.fujitsu.com>
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This effectively reverts 859a3f86ca8 ("ACPI: simplify
acpi_pci_irq_add_prt() API") and d9efae3688a ("ACPI: simplify
acpi_pci_irq_del_prt() API").
The reason is to disentangle these routines from the struct pci_bus.
We want to be able to add the _PRT before the struct pci_bus
exists, and delete the _PRT after we've removed the pci_bus.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
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* pci/yinghai-for-pci-root-bus-hotplug:
PCI/ACPI: Remove acpi_root_driver in reverse order
PCI/ACPI: Delete host bridge _PRT during hot remove path
PCI/ACPI: Make acpi_pci_root_remove() stop/remove pci root bus
PCI: Add pci_stop_and_remove_root_bus()
PCI/ACPI: Assign unassigned resource for hot-added root bus
PCI: Move out pci_enable_bridges out of assign_unsigned_bus_res
PCI: Move pci_rescan_bus() back to probe.c
PCI: Separate out pci_assign_unassigned_bus_resources()
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Call the sub-driver .remove() methods in the reverse order of the
.add() methods for symmetry.
[bhelgaas: changelog]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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