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* spi: fix spidev compilation failure when VERBOSE is definedFlorian Fainelli2009-12-081-3/+3
| | | | | | | | | | | | | | | | | When VERBOSE is defined in the spidev module, the compilation will throw an error on 'spi' not being defined: CC [M] drivers/spi/spidev.o drivers/spi/spidev.c: In function 'spidev_message': drivers/spi/spidev.c:266: error: 'spi' undeclared (first use in this function) drivers/spi/spidev.c:266: error: (Each undeclared identifier is reported only once drivers/spi/spidev.c:266: error: for each function it appears in.) instead of using spi-> we should actually use spidev->spi. This patch fixes the build failure. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/au1550_spi: fix setupxfer not to override cfg with zerosJan Nikitenko2009-12-081-2/+8
| | | | | | | | fix setupxfer() not to override generic configuration of speed_hz and bits_per_word with zeros Signed-off-by: Jan Nikitenko <jan.nikitenko@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc8xxx: don't use __exit_p to wrap plat_mpc8xxx_spi_removeUwe Kleine-König2009-12-081-1/+1
| | | | | | | | The function plat_mpc8xxx_spi_remove is defined using __devexit, so don't use __exit_p but __devexit_p to wrap it. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/i.MX: fix broken error handling for gpio_requestJohn Ogness2009-12-081-4/+5
| | | | | | | | | | | | | i.MX35-provided chipselects are represented using negative numbers. If gpio_request() fails and the previous chipselect was a negative number, the while loop is endless (i is never decremented). Also, the error loop would never call gpio_free on chipselect[0]. And finally, the error message was missing an endline. Signed-off-by: John Ogness <john.ogness@linutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/i.mx: drain MXC SPI transfer buffer when probing deviceDaniel Mack2009-12-081-0/+8
| | | | | | | | | | | | | On the MX31litekit, the bootloader seems to communicate with the MC13783 PMIC chip before booting Linux. However, it does not flush all the buffers properly after that, which makes the imx-spi driver read bogus data when probing the MC13783. Fix that by draining the SPI receive buffer on startup. Signed-off-by: Daniel Mack <daniel@caiaq.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* MAINTAINERS: add SPI co-maintainer.Grant Likely2009-12-081-0/+1
| | | | | Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Andrew Morton <akpm@linux-foundation.org>
* spi/xilinx_spi: fix incorrect castingGrant Likely2009-12-081-2/+2
| | | | | | | | | | | | This patch fixes the error exposed by the following build warning: drivers/spi/xilinx_spi.c: In function 'xilinx_spi_init': drivers/spi/xilinx_spi.c:411: warning: cast from pointer to integer of different size Fixed by change %x to %p in the format string. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc52xx-spi: minor cleanupsWolfram Sang2009-12-082-25/+11
| | | | | | | | | | | - drop own, obsolete include-file - drop IRQF_SAMPLE_RANDOM (deprecated feature) - drop 'if' above kfree() - typos, braces & whitespaces Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* xilinx_spi: add a platform driver using the xilinx_spi common module.Richard Röjfors2009-12-083-0/+110
| | | | | | | | This patch adds in a platform device driver using the xilinx_spi common module. Tested-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* xilinx_spi: add support for the DS570 IP.Richard Röjfors2009-12-084-34/+95
| | | | | | | | | | | | | | | This patch adds in support for the DS570 IP. It's register compatible with the DS464, but adds support for 8/16/32 SPI. The 8/16/32 support is added by attaching callbacks reading/writing the proper amount of data. To indicate to the driver which amount of bits to use a new field is introduced in the platform data struct. Acked-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* xilinx_spi: Switch to iomem functions and support little endian.Richard Röjfors2009-12-083-43/+57
| | | | | | | | | | | | | | This patch changes the out_(be)(8|16|32) and in_(be)(8|16|32) calls to 32 bits ioread/iowrite. The read and write function are attached to the internal struct as callbacks, callback is selected depending on endianess. This will also build on platforms not supporting the in/out calls for instance x86. Acked-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* xilinx_spi: Split into of driver and generic part.Richard Röjfors2009-12-086-121/+229
| | | | | | | | | | | This patch splits the xilinx_spi driver into a generic part and a OF driver part. The reason for this is to later add in a platform driver as well. Tested-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc52xx_spi: add gpio chipselectLuotao Fu2009-12-081-4/+60
| | | | | | | | | | | | | | | | | This one enables the mpc52xx_spi driver for usage of user defined gpio lines as chipselect. This way we can control some more spi devices than only one V2 Changes: * preinitialize the gpio as output in probe function and call gpio_set_value in the chip select function instead of calling direction_output every time. * initialize the gpio line with output high, since we don't support CS_HIGH in the driver currently any way. change gpio value setting to default active low in chip select call. * free the gpio array while error or removing. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc52xx_spi: add missing mode_bits definitionLuotao Fu2009-12-081-0/+2
| | | | | | | | | V2 changes: * remove CS_HIGH mode Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc52xx_spi: fix clearing status registerLuotao Fu2009-12-081-1/+5
| | | | | | | | | | | | | | | | | | Before reading status register to check MODF failure, we have to clear it first since the MODF flag will be set after initializing the spi master, if the hardware comes up with a low SS. The processor datasheet reads: Mode Fault flag -- bit sets if SS input goes low while SPI is configured as a master. Flag is cleared automatically by an SPI status register read (with MODF set) followed by a SPI control register 1 write. Hence simply rereading the register is not sufficient to clear the flag. We redo the write also to make sure to clear the flag. V2 Changes: * change variable type from int to u8 Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc52xx/wdt: remove obsolete old WDT implementationAlbrecht Dreß2009-12-083-295/+3
| | | | | | | | Remove the old WDT implementation. Signed-off-by: Albrecht Dreß <albrecht.dress@arcor.de> Acked-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc52xx/wdt: merge WDT code into the GPT driverAlbrecht Dreß2009-11-132-17/+307
| | | | | | | Merge the WDT code into the GPT interface. Signed-off-by: Albrecht Dreß <albrecht.dress@arcor.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc52xx/wdt: OF property to enable the WDT on bootAlbrecht Dreß2009-11-131-1/+16
| | | | | | | | Add the "fsl,wdt-on-boot" OF property as to reserve a GPT as WDT which may be a requirement in safety-related (e.g. ISO/EN 61508) applications. Signed-off-by: Albrecht Dreß <albrecht.dress@arcor.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mpc5200/gpt: tiny fix for gpt period limitationAlbrecht Dreß2009-11-122-4/+4
| | | | | | | | This patch changes the period parameter of mpc52xx_gpt_start_timer to a u64 to support larger timeout periods. Signed-off-by: Albrecht Dreß <albrecht.dress@arcor.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mmc: fix missing module license declaration in of_mmc_spi.cGrant Likely2009-11-041-0/+2
| | | | | | Driver cannot be used as a module without this patch. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* powerpc: tiny memcpy_(to|from)io optimisationAlbrecht Dreß2009-11-041-2/+2
| | | | | | | | | This trivial patch changes memcpy_(to|from)io as to transfer as many 32-bit words as possible in 32-bit accesses (in the current solution, the last 32-bit word was transferred as 4 byte accesses). Signed-off-by: Albrecht Dreß <albrecht.dress@arcor.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc52xx: replace printk with dev_errWolfram Sang2009-11-041-3/+2
| | | | | | | To easily identify which device has problems. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Xilinx: SPI: Fix bits_per_word for transfersJohn Linn2009-11-041-1/+2
| | | | | | | | | | | | The bits_per_word value can be set for each transfer, or can be set to zero in each transfer in which case it should default to the value in the driver. The driver was fixed to properly check the bits_per_word in the transfer that is passed in. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc52xx-psc-spi: check for valid PSCWolfram Sang2009-11-041-4/+8
| | | | | | | | | This driver calls mpc52xx_set_psc_clkdiv() but doesn't check its return value to see if the PSC is actually valid for SPI use. Add the check and a hint for the user. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* powerpc/5200: add LocalPlus bus FIFO device driverJohn Bonesio2009-11-044-0/+605
| | | | | | | | | This is a driver for the FIFO device on the LocalPlus bus on an mpc5200 system. The driver supports programmed I/O through the FIFO as well as setting up DMA via the BestComm engine through the FIFO. Signed-off-by: John Bonesio <bones@secretlab.ca> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* powerpc/5200: add general purpose timer API for the MPC5200Grant Likely2009-11-042-10/+130
| | | | | | | This patch adds an interface for controlling the timer function of the MPC5200 GPT devices. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* powerpc/5200: Add mpc5200-spi (non-PSC) device driverGrant Likely2009-11-044-0/+539
| | | | | | | Adds support for the dedicated SPI device on the Freescale MPC5200(b) SoC. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc5200: Register SPI devices described in device treeGrant Likely2009-11-041-1/+7
| | | | | | | | Add call to of_register_spi_devices() to register SPI devices described in the OF device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Wolfram Sang <w.sang@pengutronix.de>
* Linux 2.6.32-rc6v2.6.32-rc6Linus Torvalds2009-11-031-1/+1
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* Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds2009-11-032-0/+12
|\ | | | | | | | | | | * 'for-linus' of git://github.com/at91linux/linux-2.6-at91: at91: at91sam9g45 family: identify several chip versions avr32: add two new at91 to cpu.h definition
| * at91: at91sam9g45 family: identify several chip versionsNicolas Ferre2009-11-032-0/+10
| | | | | | | | | | | | | | | | | | | | | | cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds the capacity to differentiate Engineering Samples and final lots through the inclusion of at91_cpu_fully_identify() and the related chip IDs with chip version field preserved. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
| * avr32: add two new at91 to cpu.h definitionNicolas Ferre2009-11-031-0/+2
| | | | | | | | | | | | | | | | | | Somme common drivers will need those at91 cpu_is_xxx() definitions. As at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch that adds those chips to cpu.h in AVR32 architecture. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2009-11-0354-440/+544
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits) MIPS: O32: Fix ppoll MIPS: Oprofile: Rename cpu_type from godson2 to loongson2 MIPS: Alchemy: Fix hang with high-frequency edge interrupts MIPS: TXx9: Fix spi-baseclk value MIPS: bcm63xx: Set the correct BCM3302 CPU name MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store MIPS: Avoid potential hazard on Context register MIPS: Octeon: Use lockless interrupt controller operations when possible. MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache MIPS: SMTC: Avoid queing multiple reschedule IPIs MIPS: GCMP: Avoid accessing registers when they are not present MIPS: GIC: Random fixes and enhancements. MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands MIPS: SPRAM: Clean up support code a little MIPS: 1004K: Enable SPRAM support. MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4 MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT. MIPS: MTI: Fix accesses to device registers on MIPS boards ...
| * MIPS: O32: Fix ppollArnaud Patard2009-11-021-1/+1
| | | | | | | | | | | | | | | | sys_ppoll syscall needs to use a compat handler on 64bit kernels with o32 user-space. Signed-off-by: Arnaud Patard <apatard@mandriva.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Oprofile: Rename cpu_type from godson2 to loongson2Wu Zhangjin2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | Unify the naming method between kernel and the user-space oprofile tool. Because loongson is used instead of godson in most of the places, we agreed to use loongson instead, which will simplify future maintenance. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Acked-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Fix hang with high-frequency edge interruptsManuel Lauss2009-11-021-8/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The handle_edge_irq() flowhandler disables edge int sources which occur too fast (i.e. another edge comes in before the irq handler function had a chance to finish). Currently, the mask_ack() callback does not ack the edges in hardware, leading to an endless loop in the flowhandler where it tries to shut up the irq source. When I rewrote the alchemy IRQ code I wrongly assumed the mask_ack() callback was only used by the level flowhandler, hence it omitted the (at the time pointless) edge acks. Turned out I was wrong; so here is a complete mask_ack implementation for Alchemy IC, which fixes the above mentioned problem. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: TXx9: Fix spi-baseclk valueAtsushi Nemoto2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | TXx9 SPI bit rate is calculated by: fBR = fSPI / 2 / (n + 1) (fSPI is SPI master clock freq, i.e. imbusclk freq.) So use imbus_clk / 2 as a spi-baseclk. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: bcm63xx: Set the correct BCM3302 CPU nameFlorian Fainelli2009-11-021-0/+3
| | | | | | | | | | | | | | | | For consistency with other BCM63xx SoC set the CPU name to "Broadcom BCM6338" when actually running on that system. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_storeZhang Le2009-11-021-2/+1
| | | | | | | | | | | | | | | | | | | | Loongson 2 does not have dcache aliases when is using 16k pages. and the And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does not matter here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Avoid potential hazard on Context registerRalf Baechle2009-11-022-0/+4
| | | | | | | | | | | | | | | | | | | | set_saved_sp reads Context register. Avoid reading stale value from earlier incomplete write. Issue found and fixed for head.S by Chris Dearman <chris@mips.com>. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Octeon: Use lockless interrupt controller operations when possible.David Daney2009-11-021-36/+178
| | | | | | | | | | | | | | | | Some newer Octeon chips have registers that allow lockless operation of the interrupt controller. Take advantage of them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinityDavid Daney2009-11-021-4/+6
| | | | | | | | | | | | | | | | Since the locks are used from interrupt context we need the irqsave/irqrestore versions of the locking functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Set S-cache linesize to 64-bytes for MTI's S-cacheRalf Baechle2009-11-021-0/+1
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: SMTC: Avoid queing multiple reschedule IPIsJaidev Patwardhan2009-11-022-4/+31
| | | | | | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: GCMP: Avoid accessing registers when they are not presentJaidev Patwardhan2009-11-021-3/+13
| | | | | | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: GIC: Random fixes and enhancements.Chris Dearman2009-11-025-293/+142
| | | | | | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_startChris Dearman2009-11-021-3/+4
| | | | | | | | | | Signed-off-by: Chris Dearman (chris@mips.com) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operandsNigel Stephens2009-11-022-17/+7
| | | | | | | | | | | | | | This patch ensures that the sign bit is always updated for NaN operands. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: SPRAM: Clean up support code a littleChris Dearman2009-11-023-10/+12
| | | | | | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: 1004K: Enable SPRAM support.Ralf Baechle2009-11-021-0/+1
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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