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* [PATCH] i386: Use %gs as the PDA base-segment in the kernelJeremy Fitzhardinge2006-12-0710-50/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is the meat of the PDA change. This patch makes several related changes: 1: Most significantly, %gs is now used in the kernel. This means that on entry, the old value of %gs is saved away, and it is reloaded with __KERNEL_PDA. 2: entry.S constructs the stack in the shape of struct pt_regs, and this is passed around the kernel so that the process's saved register state can be accessed. Unfortunately struct pt_regs doesn't currently have space for %gs (or %fs). This patch extends pt_regs to add space for gs (no space is allocated for %fs, since it won't be used, and it would just complicate the code in entry.S to work around the space). 3: Because %gs is now saved on the stack like %ds, %es and the integer registers, there are a number of places where it no longer needs to be handled specially; namely context switch, and saving/restoring the register state in a signal context. 4: And since kernel threads run in kernel space and call normal kernel code, they need to be created with their %gs == __KERNEL_PDA. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: Initialize the per-CPU data areaJeremy Fitzhardinge2006-12-074-50/+172
| | | | | | | | | | | | | | | | | | | | | | | | | When a CPU is brought up, a PDA and GDT are allocated for it. The GDT's __KERNEL_PDA entry is pointed to the allocated PDA memory, so that all references using this segment descriptor will refer to the PDA. This patch rearranges CPU initialization a bit, so that the GDT/PDA are set up as early as possible in cpu_init(). Also for secondary CPUs, GDT+PDA are preallocated and initialized so all the secondary CPU needs to do is set up the ldt and load %gs. This will be important once smp_processor_id() and current use the PDA. In all cases, the PDA is set up in head.S, before a CPU starts running C code, so the PDA is always available. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Cc: James Bottomley <James.Bottomley@SteelEye.com> Cc: Matt Tolentino <matthew.e.tolentino@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: Basic definitions for i386-pdaJeremy Fitzhardinge2006-12-073-2/+100
| | | | | | | | | | | | | | | | | | This patch has the basic definitions of struct i386_pda, and the segment selector in the GDT. asm-i386/pda.h is more or less a direct copy of asm-x86_64/pda.h. The most interesting difference is the use of _proxy_pda, which is used to give gcc a model for the actual memory operations on the real pda structure. No actual reference is ever made to _proxy_pda, so it is never defined. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: Use asm-offsets for the offsets of registers into the pt_regs ↵Jeremy Fitzhardinge2006-12-072-68/+69
| | | | | | | | | | | | | | | | struct Use asm-offsets for the offsets of registers into the pt_regs struct, rather than having hard-coded constants I left the constants in the comments of entry.S because they're useful for reference; the code in entry.S is very dependent on the layout of pt_regs, even when using asm-offsets. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Keith Owens <kaos@ocs.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] x86-64: miscellaneous entry.S adjustmentsJan Beulich2006-12-071-30/+6
| | | | | | | | | | | | | | This patch: - makes ret_from_sys_call no longer global (all external users were previously switched to use int_ret_from_sys_call) - adjusts placement of a CFI_{REMEMBER,RESTORE}_STATE pair to better fit logic flow - eliminates an unnecessary pair of CFI_{REMEMBER,RESTORE}_STATE - glues together function- and unwinder-wise the previously separate system_call and int_ret_from_sys_call function fragments Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: dump_trace() atomicity fixAndrew Morton2006-12-071-3/+5
| | | | | | | | | | | | Fix BUG: using smp_processor_id() in preemptible [00000001] code: in backtracer on preemptible debug kernels. Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: add Intel Core related PMU MSRsStephane Eranian2006-12-071-0/+13
| | | | | | | | | - add Intel Precise-Event Based sampling (PEBS) related MSR - add Intel Data Save (DS) Area related MSR - add Intel Core microarchitecure performance counter MSRs Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: x86-64 add Intel Core related PMU MSRs definitionsStephane Eranian2006-12-071-0/+13
| | | | | | | | | | | | | | | Add o the x86-64 tree a bunch of MSRs related to performance monitoring for the processors based on Intel Core microarchitecture. It also adds some architectural MSRs for PEBS. A similar patch for i386 will follow. changelog: - add Intel Precise-Event Based sampling (PEBS) related MSR - add Intel Data Save (DS) Area related MSR - add Intel Core microarchitecure performance counter MSRs Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: add missing iounmap in i386 hpet clocksource codeAmol Lad2006-12-071-1/+6
| | | | | | | | | | | | | ioremap must be balanced by an iounmap and failing to do so can result in a memory leak. Tested (compilation only): - using allmodconfig - making sure the files are compiling without any warning/error due to new changes Signed-off-by: Amol Lad <amol@verismonetworks.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: Add iounmap in error paths in hpet codeAmol Lad2006-12-071-3/+12
| | | | | Signed-off-by: Amol Lad <amol@verismonetworks.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: Insert Local and IO APIC(s) into resource mapAaron Durbin2006-12-071-0/+78
| | | | | | | | | | | | | Insert the Local APIC and IO APIC(s) into the resource tree. It allows the APIC resources to be visible within /proc/iomem. The patch also takes into account IO APIC(s) mapped in the PCI space by deferring the insertion until after PCI has allocated its necessary resources. Signed-off-by: Aaron Durbin <adurbin@google.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: add sleazy FPU optimizationChuck Ebbert2006-12-073-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | i386 port of the sLeAZY-fpu feature. Chuck reports that this gives him a +/- 0.4% improvement on his simple benchmark x86_64 description follows: Right now the kernel on x86-64 has a 100% lazy fpu behavior: after *every* context switch a trap is taken for the first FPU use to restore the FPU context lazily. This is of course great for applications that have very sporadic or no FPU use (since then you avoid doing the expensive save/restore all the time). However for very frequent FPU users... you take an extra trap every context switch. The patch below adds a simple heuristic to this code: After 5 consecutive context switches of FPU use, the lazy behavior is disabled and the context gets restored every context switch. If the app indeed uses the FPU, the trap is avoided. (the chance of the 6th time slice using FPU after the previous 5 having done so are quite high obviously). After 256 switches, this is reset and lazy behavior is returned (until there are 5 consecutive ones again). The reason for this is to give apps that do longer bursts of FPU use still the lazy behavior back after some time. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: espfix cleanupStas Sergeev2006-12-077-97/+103
| | | | | | | | | | | | | | | | | | | | | | | | Clean up the espfix code: - Introduced PER_CPU() macro to be used from asm - Introduced GET_DESC_BASE() macro to be used from asm - Rewrote the fixup code in asm, as calling a C code with the altered %ss appeared to be unsafe - No longer altering the stack from a .fixup section - 16bit per-cpu stack is no longer used, instead the stack segment base is patched the way so that the high word of the kernel and user %esp are the same. - Added the limit-patching for the espfix segment. (Chuck Ebbert) [jeremy@goop.org: use the x86 scaling addressing mode rather than shifting] Signed-off-by: Stas Sergeev <stsp@aknet.ru> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Zachary Amsden <zach@vmware.com> Acked-by: Chuck Ebbert <76306.1226@compuserve.com> Acked-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] x86: all cpu backtraceAndrew Morton2006-12-076-1/+74
| | | | | | | | | | | When a spinlock lockup occurs, arrange for the NMI code to emit an all-cpu backtrace, so we get to see which CPU is holding the lock, and where. Cc: Andi Kleen <ak@muc.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Badari Pulavarty <pbadari@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: remove default_ldt, and simplify ldt-setting.Jeremy Fitzhardinge2006-12-074-39/+22
| | | | | | | | | | | | | | | | | | This patch removes the default_ldt[] array, as it has been unused since iBCS stopped being supported. This means it is now possible to actually set an empty LDT segment. In order to deal with this, the set_ldt_desc/load_LDT pair has been replaced with a single set_ldt() operation which is responsible for both setting up the LDT descriptor in the GDT, and reloading the LDT register. If there are no LDT entries, the LDT register is loaded with a NULL descriptor. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Acked-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] x86-64: use BUILD_BUG_ON in FPU codeAlexey Dobriyan2006-12-071-5/+2
| | | | | | | Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: i386 add X86_FEATURE_PEBS and detectionStephane Eranian2006-12-072-1/+9
| | | | | | | | | | | | | | | Here is a patch (used by perfmon2) to detect the presence of the Precise Event Based Sampling (PEBS) feature for i386. The patch also adds the cpu_has_pebs macro. - adds X86_FEATURE_PEBS - adds cpu_has_pebs to test for X86_FEATURE_PEBS Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: i386 rename X86_FEATURE_DTES to X86_FEATURE_DSStephane Eranian2006-12-071-1/+2
| | | | | | | | | | | | | | | Here is a patch (used by perfmon2) that renames X86_FEATURE_DTES to X86_FEATURE_DS to match Intel's documentation for the Debug Store save area on i386. The patch also adds cpu_has_ds. - rename X86_FEATURE_DTES to X86_FEATURE_DS to match documentation - adds cpu_has_ds to test for X86_FEATURE_DS Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] x86-64: remove duplicated cpu_mask_to_apicid in x86_64 smp.hYinghai Lu2006-12-071-5/+0
| | | | | | | | inline function cpu_mask_to_apicid in smp.h is duplicated with macro in mach_apic.h. Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: add X86_FEATURE_PEBS and detectionStephane Eranian2006-12-072-0/+9
| | | | | | | | | | | | | Here is a patch (used by perfmon2) to detect the presence of the Precise Event Based Sampling (PEBS) feature for Intel 64-bit processors. The patch also adds the cpu_has_pebs macro. changelog: - adds X86_FEATURE_PEBS - adds cpu_has_pebs to test for X86_FEATURE_PEBS Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: x86_64 rename X86_FEATURE_DTES to X86_FEATURE_DSStephane Eranian2006-12-071-1/+2
| | | | | | | | | | | | | Here is a patch (used by perfmon2) that renamed X86_FEATURE_DTES to X86_FEATURE_DS to match Intel's documentation for the Debug Store save area. The patch also adds cpu_has_ds. changelog: - rename X86_FEATURE_DTES to X86_FEATURE_DS to match documentation - adds cpu_has_ds to test for X86_FEATURE_DS Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: Don't keep interrupts disabled while spinning in spinlocksAndi Kleen2006-12-071-1/+28
| | | | | | | | | Follows i386. Based on patch from some folks at Google (MikeW, Edward G.?), but completely redone by AK. Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: remove pointless printk from i386 oops outputDave Jones2006-12-071-1/+0
| | | | | | | | | This just got removed on x86-64, do the same on 32bit. It always annoyed me when this ate a line of oops output pushing interesting stuff off the screen. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: fix must_checksRandy Dunlap2006-12-075-6/+16
| | | | | | | Fix __must_check warnings in i386/math-emu. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86: Compress stack unwinder outputAndi Kleen2006-12-072-9/+9
| | | | | | | | | | | | | | The unwinder has some extra newlines, which eat up loads of screen space when it spews. (See https://bugzilla.redhat.com/bugzilla/attachment.cgi?id=137900 for a nasty example). warning_symbol-> and warning-> already printk a newline, so don't add one in the strings passed to them. [AK: redone for new code] Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86: shorten lines in unwinder to be <= 80 charactersAndi Kleen2006-12-072-14/+23
| | | | | | | Andrew complained about > 80 character lines in the new unwinder. Fix that. Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: fix buggy MTRR address checksAndreas Mohr2006-12-072-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Fix checks that failed to realize that values are 4-kB-unit-sized (note the format strings in this same diff context which *do* realize the unit size, via appended "000"!). Also fix an incorrect below-1MB area check (as gathered from Jan Beulich's unapplied patch at http://www.ussg.iu.edu/hypermail/linux/kernel/0411.1/1378.html ) Update mtrr_add_page() docu to make 4-kB-sized calculation more obvious. Given several further items mentioned in Jan's patch mail, all in all MTRR code seems surprisingly buggy, for a surprisingly long period of time (many years). Further work/investigation would be useful. TBD Note that my patch is pretty much UNTESTED, since I can only verify that it TBD successfully boots my machine, but I cannot test against actual buggy TBD hardware which would require these (formerly broken) checks. Long -mm TBD simmering would make sense, especially since these now-working checks might TBD turn out to have adverse effects on unaffected hardware. Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
* [PATCH] i386: Update defconfigAndi Kleen2006-12-071-9/+13
| | | | Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] x86-64: Update defconfigAndi Kleen2006-12-071-13/+14
| | | | Signed-off-by: Andi Kleen <ak@suse.de>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6Linus Torvalds2006-12-0583-1126/+4760
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6: (73 commits) [SCSI] aic79xx: Add ASC-29320LPE ids to driver [SCSI] stex: version update [SCSI] stex: change wait loop code [SCSI] stex: add new device type support [SCSI] stex: update device id info [SCSI] stex: adjust default queue length [SCSI] stex: add value check in hard reset routine [SCSI] stex: fix controller_info command handling [SCSI] stex: fix biosparam calculation [SCSI] megaraid: fix MMIO casts [SCSI] tgt: fix undefined flush_dcache_page() problem [SCSI] libsas: better error handling in sas_expander.c [SCSI] lpfc 8.1.11 : Change version number to 8.1.11 [SCSI] lpfc 8.1.11 : Misc Fixes [SCSI] lpfc 8.1.11 : Add soft_wwnn sysfs attribute, rename soft_wwn_enable [SCSI] lpfc 8.1.11 : Removed decoding of PCI Subsystem Id [SCSI] lpfc 8.1.11 : Add MSI (Message Signalled Interrupts) support [SCSI] lpfc 8.1.11 : Adjust LOG_FCP logging [SCSI] lpfc 8.1.11 : Fix Memory leaks [SCSI] lpfc 8.1.11 : Fix lpfc_multi_ring_support ...
| * [SCSI] aic79xx: Add ASC-29320LPE ids to driverSalyzyn, Mark2006-12-053-1/+9
| | | | | | | | | | | | | | Simple patch to add the new PCIe version of the 29320 card. Signed-off: Mark Salyzyn <Mark_Salyzyn@adaptec.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: version updateEd Lin2006-12-051-4/+2
| | | | | | | | | | | | | | Update version to 3.1.0.1 Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: change wait loop codeEd Lin2006-12-051-21/+20
| | | | | | | | | | | | | | | | | | The original wait loop may be much longer than intended time. Use more accurate timer_after for it. Also adjust wait value to avoid unnecessary long waiting. Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: add new device type supportEd Lin2006-12-051-7/+21
| | | | | | | | | | | | | | | | Add support for st_vsc1 type device (st_vsc is ok because it does not require extra buffer). Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: update device id infoEd Lin2006-12-052-11/+33
| | | | | | | | | | | | | | | | | | | | | | - add comments for various devices - remove unused device ids(0xf350, 0x4301, 0x8301, 0x8302) - add new device id(0xe350) - fix vendor id of st_vsc - modify Kconfig help info Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: adjust default queue lengthEd Lin2006-12-051-1/+10
| | | | | | | | | | | | | | | | Firmware of new version may adjust default queue length. It is backward compatible. Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: add value check in hard reset routineEd Lin2006-12-051-1/+1
| | | | | | | | | | | | | | During hard reset, an all-1 value from PCI_COMMAND should be invalid. Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: fix controller_info command handlingEd Lin2006-12-051-0/+1
| | | | | | | | | | | | | | | | This command needs information from both firmware and driver. First copy information from firmware to buffer, then fill in driver information. Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] stex: fix biosparam calculationEd Lin2006-12-051-3/+3
| | | | | | | | | | | | | | Fix biosparam calculation. Signed-off-by: Ed Lin <ed.lin@promise.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] megaraid: fix MMIO castsJeff Garzik2006-12-052-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | megaraid's MMIO RD*/WR* macros directly call readl() and writel() with an 'unsigned long' argument. This throws a warning, but is otherwise OK because the 'unsigned long' is really the result of ioremap(). This setup is also OK because the variable can hold an ioremap cookie /or/ a PCI I/O port (PIO). However, to fix the warning thrown when readl() and writel() are passed an unsigned long cookie, I introduce 'void __iomem *mmio_base', holding the same value as 'base'. This will silence the warnings, and also cause an oops whenever these MMIO-only functions are ever accidentally passed an I/O address. Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] tgt: fix undefined flush_dcache_page() problemakpm@osdl.org2006-12-051-0/+2
| | | | | | | | | | | | | | | | drivers/scsi/scsi_tgt_if.c: In function 'tgt_uspace_send_event': drivers/scsi/scsi_tgt_if.c:88: warning: implicit declaration of function 'flush_dcache_page' Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] libsas: better error handling in sas_expander.cJames Bottomley2006-12-031-12/+24
| | | | | | | | | | | | | | With async scanning, we're now tripping the BUG_ON in sas_ex_discover_end_dev(), so make the error handling here correct. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Change version number to 8.1.11James Smart2006-12-031-1/+1
| | | | | | | | | | | | | | Change version number to 8.1.11 Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Misc FixesJames Smart2006-12-034-3/+35
| | | | | | | | | | | | | | | | | | | | | | Misc Fixes: - Prevent references to NULL node list element in reset routines. - Add missing IOCB types to switch tables - Reset the card on Port Error 5 - Fix infinite loop in LUN reset Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Add soft_wwnn sysfs attribute, rename soft_wwn_enableJames Smart2006-12-034-11/+80
| | | | | | | | | | | | | | The driver now allows both wwpn and wwnn to be set. Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Removed decoding of PCI Subsystem IdJames Smart2006-12-032-84/+35
| | | | | | | | | | | | | | | | | | | | To avoid continually updating the driver for new subsystem ids (as adapter modules are proliferating), remove this 2nd level decode. Genericize the reported Adapter names to be consistent across Emulex product line. Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Add MSI (Message Signalled Interrupts) supportJames Smart2006-12-033-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | Add MSI (Message Signalled Interrupts) support Actual use must be enabled via the new module parameter "lpfc_use_msi" Defaults to no use Many thanks to Frederic Temporelli who implemented the initial patch. Signed-off-by: Frederic Temporelli <frederic.temporelli@ext.bull.net> Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Adjust LOG_FCP loggingJames Smart2006-12-033-15/+24
| | | | | | | | | | | | | | Adjust LOG_FCP logging to be more meaningful. Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Fix Memory leaksJames Smart2006-12-034-7/+41
| | | | | | | | | | | | | | Fix Memory leaks associated with mbox cmds READ_LA, READ_SPARAM, REG_LOGIN Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * [SCSI] lpfc 8.1.11 : Fix lpfc_multi_ring_supportJames Smart2006-12-038-21/+67
| | | | | | | | | | | | | | | | It was not accounted for in the fast/slow rings. Genericize the implementation and control it via sysfs Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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