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* farsync: fix off-by-one bug in fst_add_oneArnd Bergmann2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc-6 finds an out of bounds access in the fst_add_one function when calculating the end of the mmio area: drivers/net/wan/farsync.c: In function 'fst_add_one': drivers/net/wan/farsync.c:418:53: error: index 2 denotes an offset greater than size of 'u8[2][8192] {aka unsigned char[2][8192]}' [-Werror=array-bounds] #define BUF_OFFSET(X) (BFM_BASE + offsetof(struct buf_window, X)) ^ include/linux/compiler-gcc.h:158:21: note: in definition of macro '__compiler_offsetof' __builtin_offsetof(a, b) ^ drivers/net/wan/farsync.c:418:37: note: in expansion of macro 'offsetof' #define BUF_OFFSET(X) (BFM_BASE + offsetof(struct buf_window, X)) ^~~~~~~~ drivers/net/wan/farsync.c:2519:36: note: in expansion of macro 'BUF_OFFSET' + BUF_OFFSET ( txBuffer[i][NUM_TX_BUFFER][0]); ^~~~~~~~~~ The warning is correct, but not critical because this appears to be a write-only variable that is set by each WAN driver but never accessed afterwards. I'm taking the minimal fix here, using the correct pointer by pointing 'mem_end' to the last byte inside of the register area as all other WAN drivers do, rather than the first byte outside of it. An alternative would be to just remove the mem_end member entirely. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlx4: add missing braces in verify_qp_parametersArnd Bergmann2016-03-141-1/+2
| | | | | | | | | | | | | | | | | | | | | The implementation of QP paravirtualization back in linux-3.7 included some code that looks very dubious, and gcc-6 has grown smart enough to warn about it: drivers/net/ethernet/mellanox/mlx4/resource_tracker.c: In function 'verify_qp_parameters': drivers/net/ethernet/mellanox/mlx4/resource_tracker.c:3154:5: error: statement is indented as if it were guarded by... [-Werror=misleading-indentation] if (optpar & MLX4_QP_OPTPAR_ALT_ADDR_PATH) { ^~ drivers/net/ethernet/mellanox/mlx4/resource_tracker.c:3144:4: note: ...this 'if' clause, but it is not if (slave != mlx4_master_func_num(dev)) >From looking at the context, I'm reasonably sure that the indentation is correct but that it should have contained curly braces from the start, as the update_gid() function in the same patch correctly does. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 54679e148287 ("mlx4: Implement QP paravirtualization and maintain phys_pkey_cache for smp_snoop") Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mediatek: check device_reset return codeArnd Bergmann2016-03-141-1/+3
| | | | | | | | | | | | | | | The device_reset() function may fail, so we have to check its return value, e.g. to make deferred probing work correctly. gcc warns about it because of the warn_unused_result attribute: drivers/net/ethernet/mediatek/mtk_eth_soc.c: In function 'mtk_probe': drivers/net/ethernet/mediatek/mtk_eth_soc.c:1679:2: error: ignoring return value of 'device_reset', declared with attribute warn_unused_result [-Werror=unused-result] This adds the trivial error check to propagate the return value to the generic platform device probe code. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mediatek: remove incorrect dma_mask assignmentArnd Bergmann2016-03-141-3/+0
| | | | | | | | | | | | | | Device drivers should not mess with the DMA mask directly, but instead call dma_set_mask() etc if needed. In case of the mtk_eth_soc driver, the mask already gets set correctly when the device is created, and setting it again is against the documented API. This removes the incorrect setting. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mediatek: use dma_addr_t correctlyArnd Bergmann2016-03-141-1/+1
| | | | | | | | | | | | | | dma_alloc_coherent() expects a dma_addr_t pointer as its argument, not an 'unsigned int', and gcc correctly warns about broken code in the mtk_init_fq_dma function: drivers/net/ethernet/mediatek/mtk_eth_soc.c: In function 'mtk_init_fq_dma': drivers/net/ethernet/mediatek/mtk_eth_soc.c:463:13: error: passing argument 3 of 'dma_alloc_coherent' from incompatible pointer type [-Werror=incompatible-pointer-types] This changes the type of the local variable to dma_addr_t. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: Fix use after free in the recvmmsg exit pathArnaldo Carvalho de Melo2016-03-141-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | The syzkaller fuzzer hit the following use-after-free: Call Trace: [<ffffffff8175ea0e>] __asan_report_load8_noabort+0x3e/0x40 mm/kasan/report.c:295 [<ffffffff851cc31a>] __sys_recvmmsg+0x6fa/0x7f0 net/socket.c:2261 [< inline >] SYSC_recvmmsg net/socket.c:2281 [<ffffffff851cc57f>] SyS_recvmmsg+0x16f/0x180 net/socket.c:2270 [<ffffffff86332bb6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 And, as Dmitry rightly assessed, that is because we can drop the reference and then touch it when the underlying recvmsg calls return some packets and then hit an error, which will make recvmmsg to set sock->sk->sk_err, oops, fix it. Reported-and-Tested-by: Dmitry Vyukov <dvyukov@google.com> Cc: Alexander Potapenko <glider@google.com> Cc: Eric Dumazet <edumazet@google.com> Cc: Kostya Serebryany <kcc@google.com> Cc: Sasha Levin <sasha.levin@oracle.com> Fixes: a2e2725541fa ("net: Introduce recvmmsg socket syscall") http://lkml.kernel.org/r/20160122211644.GC2470@redhat.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'thunderx-perf'David S. Miller2016-03-142-29/+53
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sunil Goutham says: ==================== net: thunderx: Performance enhancement changes Below patches attempts to improve performance by reducing no of atomic operations while allocating new receive buffers and reducing cache misses by adjusting nicvf structure elements. Changes from v1: No changes, resubmitting a fresh as per David's suggestion. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: thunderx: Adjust nicvf structure to reduce cache missesSunil Goutham2016-03-141-22/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | Adjusted nicvf structure such that all elements used in hot path like napi, xmit e.t.c fall into same cache line. This reduced no of cache misses and resulted in ~2% increase in no of packets handled on a core. Also modified elements with :1 notation to boolean, to be consistent with other element definitions. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: thunderx: Set recevie buffer page usage count in bulkSunil Goutham2016-03-142-8/+24
|/ | | | | | | | | Instead of calling get_page() for every receive buffer carved out of page, set page's usage count at the end, to reduce no of atomic calls. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* tipc: make sure IPv6 header fits in skb headroomRichard Alpe2016-03-141-1/+1
| | | | | | | | | | Expand headroom further in order to be able to fit the larger IPv6 header. Prior to this patch this caused a skb under panic for certain tipc packets when using IPv6 UDP bearer(s). Signed-off-by: Richard Alpe <richard.alpe@ericsson.com> Acked-by: Jon Maloy <jon.maloy@ericsson.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'mvneta-hwbm'David S. Miller2016-03-1425-47/+1568
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gregory CLEMENT says: ==================== API set for HW Buffer management This is the sixth version of the API set for HW Buffer management (that was initially submitted here: http://thread.gmane.org/gmane.linux.kernel/2125152). This version is just a rebasing onto the last net-next. I also added the Tested-by flag from Sebastian Careba : "The patch set applies successfully and it works well, no more Samba issues any longer". For the record in the previous versions I made the following changes: v4 -> v5: - Add a field with the size of the buffer of the pool was added. It then allow to fix some misused size in the mvneta_bm code when using the new framework. - Add a new patch from Marcin for sram allowing to require non-bufferable access to the memory. It was needed for the hardware buffer management of the mvneta. - Fix the build issue notified by the 0-day builder when building the drivers as module. v3 -> v4 - Fix build issue when HWBM is not selected v2 -> v3 - Make a HWBM and a SWBM version of the mvneta_rx() function in order to reduce the the conditional code. Kept a condition inside the mvneta_poll because specializing this function would have means duplicating 95% of the code. - Put back the register_netdev() call at the end of the mvneta_probe() function. In order to have a unique ID for each port, just used a global variable in the driver. - Added a fix from Marcin in the "net: mvneta: bm: add support for hardware buffer management" patch: "when dropping packets, only buffer pointers passed from BM to descriptors have to be returned to the pool. In submitted version after closing the port and mvneta_rxq_deinit(), it was very likely that a lot of fake buffers are added to the pool, because all descriptors took part in iteration." - Removed the select MVNETA_BM from the Kconfig, it will let the user the choice to use not use it if they want. v1 -> v2 - The hardware buffer management helpers are no more built by default and now depend on a hidden config symbol which has to be selected by the driver if needed - The hwbm_pool_refill() and hwbm_pool_add() now receive a gfp_t as argument allowing the caller to specify the flag it needs. - buf_num is now tested to ensure there is no wrapping - A spinlock has been added to protect the hwbm_pool_add() function in SMP or irq context. - used pr_warn instead of pr_debug in case of errors. - fixed the mvneta implementation by returning the buffer to the pool at various place instead of ignoring it. - Squashed "bus: mvenus-mbus: Fix size test for mvebu_mbus_get_dram_win_info" into bus: mvebu-mbus: provide api for obtaining IO and DRAM window information. - Added my signed-otf-by on all the patches as submitter of the series. - Renamed the dts patches with the pattern "ARM: dts: platform:" - Removed the patch "ARM: mvebu: enable SRAM support in mvebu_v7_defconfig" of this series and already applied it - Modified the order of the patches. In order to ease the test the branch mvneta-BM-framework-v6 is available at git@github.com:MISL-EBU-System-SW/mainline-public.git. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvneta: Use the new hwbm frameworkGregory CLEMENT2016-03-144-112/+49
| | | | | | | | | | | | | | | | | | Now that the hardware buffer management framework had been introduced, let's use it. Tested-by: Sebastian Careba <nitroshift@yahoo.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: add a hardware buffer management helper APIGregory CLEMENT2016-03-144-0/+119
| | | | | | | | | | | | | | | | | | | | | | This basic implementation allows to share code between driver using hardware buffer management. As the code is hardware agnostic, there is few helpers, most of the optimization brought by the an HW BM has to be done at driver level. Tested-by: Sebastian Careba <nitroshift@yahoo.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvneta: bm: add support for hardware buffer managementMarcin Wojtas2016-03-147-39/+1285
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Buffer manager (BM) is a dedicated hardware unit that can be used by all ethernet ports of Armada XP and 38x SoC's. It allows to offload CPU on RX path by sparing DRAM access on refilling buffer pool, hardware-based filling of descriptor ring data and better memory utilization due to HW arbitration for using 'short' pools for small packets. Tests performed with A388 SoC working as a network bridge between two packet generators showed increase of maximum processed 64B packets by ~20k (~555k packets with BM enabled vs ~535 packets without BM). Also when pushing 1500B-packets with a line rate achieved, CPU load decreased from around 25% without BM to 20% with BM. BM comprise up to 4 buffer pointers' (BP) rings kept in DRAM, which are called external BP pools - BPPE. Allocating and releasing buffer pointers (BP) to/from BPPE is performed indirectly by write/read access to a dedicated internal SRAM, where internal BP pools (BPPI) are placed. BM hardware controls status of BPPE automatically, as well as assigning proper buffers to RX descriptors. For more details please refer to Functional Specification of Armada XP or 38x SoC. In order to enable support for a separate hardware block, common for all ports, a new driver has to be implemented ('mvneta_bm'). It provides initialization sequence of address space, clocks, registers, SRAM, empty pools' structures and also obtaining optional configuration from DT (please refer to device tree binding documentation). mvneta_bm exposes also a necessary API to mvneta driver, as well as a dedicated structure with BM information (bm_priv), whose presence is used as a flag notifying of BM usage by port. It has to be ensured that mvneta_bm probe is executed prior to the ones in ports' driver. In case BM is not used or its probe fails, mvneta falls back to use software buffer management. A sequence executed in mvneta_probe function is modified in order to have an access to needed resources before possible port's BM initialization is done. According to port-pools mapping provided by DT appropriate registers are configured and the buffer pools are filled. RX path is modified accordingly. Becaues the hardware allows a wide variety of configuration options, following assumptions are made: * using BM mechanisms can be selectively disabled/enabled basing on DT configuration among the ports * 'long' pool's single buffer size is tied to port's MTU * using 'long' pool by port is obligatory and it cannot be shared * using 'short' pool for smaller packets is optional * one 'short' pool can be shared among all ports This commit enables hardware buffer management operation cooperating with existing mvneta driver. New device tree binding documentation is added and the one of mvneta is updated accordingly. [gregory.clement@free-electrons.com: removed the suspend/resume part] Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bus: mvebu-mbus: provide api for obtaining IO and DRAM window informationMarcin Wojtas2016-03-142-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables finding appropriate mbus window and obtaining its target id and attribute for given physical address in two separate routines, both for IO and DRAM windows. This functionality is needed for Armada XP/38x Network Controller's Buffer Manager and PnC configuration. [gregory.clement@free-electrons.com: Fix size test for mvebu_mbus_get_dram_win_info] Signed-off-by: Marcin Wojtas <mw@semihalf.com> [DRAM window information reference in LKv3.10] Signed-off-by: Evan Wang <xswang@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ARM: dts: armada-xp-openblocks-ax3-4: Add BM supportGregory CLEMENT2016-03-141-1/+18
| | | | | | | | | | | | | | Allow Openblock AX3 using hardware buffer management with mvneta. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ARM: dts: armada-xp: enable buffer manager support on Armada XP boardsMarcin Wojtas2016-03-142-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mvneta driver supports using hardware buffer management (BM), in order to use it, board files have to be adjusted accordingly. This commit enables BM on AXP-DB and AXP-GP in same manner - because number of ports on those boards is the same as number of possible pools, each port is supposed to use single pool for all kind of packets. Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" status for 'bm' and 'bm-bppi' (internal SRAM) nodes. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ARM: dts: armada-xp: add buffer manager nodesMarcin Wojtas2016-03-141-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada XP network controller supports hardware buffer management (BM). Since it is now enabled in mvneta driver, appropriate nodes can be added to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its internal SRAM (bm-bppi), which is used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ARM: dts: armada-38x: enable buffer manager support on Armada 38x boardsMarcin Wojtas2016-03-145-4/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mvneta driver supports using hardware buffer management (BM), in order to use it, board files have to be adjusted accordingly. This commit enables BM on: * A385-DB-AP - each port has its own pool for long and common pool for short packets, * A388-ClearFog - same as above, * A388-DB - to each port unique 'short' and 'long' pools are mapped, * A388-GP - same as above. Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" status for 'bm' and 'bm-bppi' (internal SRAM) nodes. [gregory.clement@free-electrons.com: add suppport for the ClearFog board] Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ARM: dts: armada-38x: add buffer manager nodesMarcin Wojtas2016-03-141-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada 38x network controller supports hardware buffer management (BM). Since it is now enabled in mvneta driver, appropriate nodes can be added to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its internal SRAM (bm-bppi), which is used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * misc: sram: add optional ioremap without write combiningMarcin Wojtas2016-03-142-1/+9
|/ | | | | | | | | | | Some SRAM users may require non-bufferable access to the memory, which is impossible, because devm_ioremap_wc() is used for setting sram->virt_base. This commit adds optional flag 'no-memory-wc', which allow to choose remap method, using DT property. Documentation is updated accordingly. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge tag 'wireless-drivers-next-for-davem-2016-03-14' of ↵David S. Miller2016-03-1438-719/+4419
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers patches for 4.6 Major changes: rtl8xxxu * add 8723bu support wl18xx * add radar_debug_mode debugfs file for DFS testing ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * rtl8xxxu: Temporarily disable 8192eu device initJes Sorensen2016-03-101-0/+4
| | | | | | | | | | | | | | To reduce the patch volume, temporariliy disable 8192eu device init. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Use correct 8051 reset function for 8723b partsJes Sorensen2016-03-102-2/+39
| | | | | | | | | | | | | | | | 8723b needs more action, so implement support for device specific reset functions. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Print a warning if flushing the FIFO failsJes Sorensen2016-03-101-1/+4
| | | | | | | | | | | | | | | | Only print a warning if the FIFO flush fails, as opposed to printing the status unconditionally. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Flush FIFO before powering down devicesJes Sorensen2016-03-102-0/+36
| | | | | | | | | | | | | | This should help when reloading the driver for 8723bu devices Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Implement device specific power_off functionJes Sorensen2016-03-103-2/+99
| | | | | | | | | | | | | | | | Implment 8723bu specific device power down, and make power_off() a fileops function. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Implement 8723bu specific disable_rf() functionJes Sorensen2016-03-102-1/+17
| | | | | | | | | | | | | | | | Powering up the 8723bu RF should probably be matched by the ability to power it down again. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Use define for REG_PWR_DATA bitsJes Sorensen2016-03-102-2/+2
| | | | | | | | | | | | | | Use the bit define rather than hard code the value for REG_PWR_DATA bits. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: convert rtl8723bu_init_bt() into rtl8723b_enable_rf()Jes Sorensen2016-03-102-11/+1
| | | | | | | | | | | | | | | | rtl8723bu_init_bt() is effectively the function enabling RF, so name it appropriately. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Remove unncessary semicolonJes Sorensen2016-03-101-1/+1
| | | | | | | | | | | | | | | | This removes an superfluous semicolon. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Pass RX rate to rx_parse_phystats and enable phystats for rtl8723buJes Sorensen2016-03-101-4/+9
| | | | | | | | | | | | | | | | | | | | rtl8xxxu_rx_parse_phystats() only needs the RX rate to determine whether to handle the stats as CCK or not. Parsing in the rate rather than the rx descriptor elimantes the need to handle multiple rx descriptor formats in the function. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Process C2H RA_REPORT events for 8723buJes Sorensen2016-03-102-0/+17
| | | | | | | | | | | | | | | | Handle RA_REPORTS events for 8723bu to not have them show up as unhandled. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Dump contents of unhandled C2H eventsJes Sorensen2016-03-101-1/+4
| | | | | | | | | | | | | | | | | | Dump the contents of unhandled C2H events. We should be handling all expected events, so this is debugging help in case an unexpected event happens. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Report media status using the correct H2C command for 8723buJes Sorensen2016-03-102-7/+47
| | | | | | | | | | | | | | | | | | | | | | | | Implement support for nextgen devices reporting connectition to the firmware. The H2C API for reporting connection to the firmware is different between the two device generations. Use the fileops structure to determine which one to call. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Implement basic 8723b specific update_rate_mask() functionJes Sorensen2016-03-102-4/+50
| | | | | | | | | | | | | | Support for setting bandwidth and VHT parameters is still missing Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Define 8723b H2C ramask command structureJes Sorensen2016-03-101-1/+10
| | | | | | | | | | | | | | Define H2C command structure for setting the rate mask. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Do not parse RX descriptor info for C2H packetsJes Sorensen2016-03-101-10/+7
| | | | | | | | | | | | | | | | | | C2H events are delivered as RX packets on 8723bu/8192eu. When receiving a C2H event, do not parse the rest of the RX descriptor as the info isn't valid. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Improve handling of txdesc32 vs txdesc40 handlingJes Sorensen2016-03-102-38/+92
| | | | | | | | | | | | | | Further correct the handling of 40 byte TX descriptors. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: TX RTS rate is word 4 for 8723aJes Sorensen2016-03-102-3/+4
| | | | | | | | | | | | | | | | | | Correct the setting of TX RTS for 8723a generation chips. In addition update documentation to match that this is part of data word 4, note data word 5. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8723au: Update TX descriptor words 4 and 5 definitionsJes Sorensen2016-03-102-15/+28
| | | | | | | | | | | | | | | | TX data words 4 and 5 differ significantly between 32 byte and 40 byte descriptors. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Set sequence number correctly for 40 byte TX descriptorsJes Sorensen2016-03-102-10/+22
| | | | | | | | | | | | | | SEQ changed location in the 40 byte TX descriptor. Set it correctly. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Set the correct TX descriptor bits for agg and break on 8723bJes Sorensen2016-03-101-3/+16
| | | | | | | | | | | | | | | | Fixup victim of the relocated bits for AGG_ENABLE/AGG_BREAK in the 40 byte TX descriptor Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Add more 40 byte TX desc bit definitionsJes Sorensen2016-03-102-6/+28
| | | | | | | | | | | | | | | | | | Add additional bit definitions for 40 byte TX descriptors, and rename bits for 32 byte descriptors that are located differently in the 40 byte descriptor format. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Add additional tx descriptor bits for data word 0Jes Sorensen2016-03-101-0/+4
| | | | | | | | | | | | | | | | This adds documentation for some additional bits in TX descriptor word 0. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Do not unconditionally print debug info in rtl8723bu_handle_c2h()Jes Sorensen2016-03-101-9/+9
| | | | | | | | | | | | | | Reduce the log level in rtl8723bu_handle_c2h() Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Handle 40 byte TX descriptors for rtl8723buJes Sorensen2016-03-102-13/+25
| | | | | | | | | | | | | | | | | | Note the descriptor checksum is still only calculated over the initial 32 bytes of the descriptor, ignoring the last 8 bytes of the descriptor. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Add definition for 8723bu tx descriptorJes Sorensen2016-03-101-0/+16
| | | | | | | | | | | | | | | | | | | | Newer generation chips use a 40 byte TX descriptor, compared to the 32 byte descriptor used on older chips. This adds the definition for the 40 byte descriptor. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Set the correct thermal meter register for 8723buJes Sorensen2016-03-101-1/+5
| | | | | | | | | | | | | | | | | | | | | | Older chips use RF register 0x24 to set the thermal meter. Newer chips use register 0x42. This change makes sure to set the correct thermal meter register depending on the chip. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| * rtl8xxxu: Set 8723bu MCS TX powerJes Sorensen2016-03-101-2/+12
| | | | | | | | | | | | | | This adds the missing support for setting MCS TX power rates on 8723bu. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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