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* svga: Make svga_set_default_gfx_regs take an iomem regbase pointer.David Miller2011-03-225-17/+17
| | | | | Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* svga: Make svga_wseq_multi take an iomem regbase pointer.David Miller2011-03-223-6/+6
| | | | | Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* svga: Make svga_wcrt_multi take an iomem regbase pointer.David Miller2011-03-225-31/+35
| | | | | Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* svga: Make svga_wattr take an iomem regbase pointer.David Miller2011-03-223-14/+14
| | | | | | | And use vga_{r,w}(). Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* svga: Use proper VGA register name macros in svga_wattr.David Miller2011-03-221-3/+3
| | | | | | | Instead of magic register location constants. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sisfb: add support for XGI Z9 DDR2 POSTAaro Koskinen2011-03-221-9/+68
| | | | | | | | | | | | Add support for ZGI Z9 DDR2 POST. The init sequence is from XGI's xgifb driver. Tested with ARM board using a PCI card with XGI Z9s and 32 MB DDR2 memory. After a cold reset the POST succeeds. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Thomas Winischhofer <thomas@winischhofer.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sisfb: move XGI POST DDR2 bootup code into subroutinesAaro Koskinen2011-03-221-55/+84
| | | | | | | | | Move DDR2 register setting code into separate subroutines. No changes in functionality. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Thomas Winischhofer <thomas@winischhofer.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sisfb: add RAM type detection for XGI Z9Aaro Koskinen2011-03-221-1/+7
| | | | | | | | Detect the XGI Z9 RAM type as "documented" by the XGI's xgifb driver. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Thomas Winischhofer <thomas@winischhofer.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sisfb: add subroutine for detecting XGI Z9Aaro Koskinen2011-03-223-0/+20
| | | | | | | | | Z7 and Z9 have the same PCI ID, so additional checking is needed to detect Z9. The method was "documented" in XGI's xgifb driver. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Thomas Winischhofer <thomas@winischhofer.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sisfb: move XGI POST RAM type detection into a subroutineAaro Koskinen2011-03-221-22/+35
| | | | | | | | | Move XGI POST RAM type detection into a separate subroutine to make further code changes easier. No changes in functionality Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Thomas Winischhofer <thomas@winischhofer.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sisfb: POST should fail if R/W test failsAaro Koskinen2011-03-221-5/+17
| | | | | | | | | | | Currently there is no indication if R/W test fails during POST. This can happen e.g. when user plugs in a card with unsupported type of memory. Since the driver will be unusable, it's better to fail the whole POST if the memory cannot be configured properly. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Thomas Winischhofer <thomas@winischhofer.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* vmlfb: use list_move() instead of list_del()/list_add() combinationKirill A. Shutemov2011-03-221-2/+1
| | | | | Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* omap: use list_move() instead of list_del()/list_add() combinationKirill A. Shutemov2011-03-222-4/+2
| | | | | | Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* mailmap: Update for OMAP DSS developers.Paul Mundt2011-03-221-0/+4
| | | | | | | | TI folks seem to have a rather schizophrenic relationship with author naming conventions, stub in mailmap entries to match with the sign-off convention. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'for-paul' of git://gitorious.org/linux-omap-dss2/linuxPaul Mundt2011-03-2251-1362/+5323
|\ | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/board-overo.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * OMAP4: PandaBoard: Adding DVI supportMurthy, Raghuveer2011-03-181-2/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding DVI support to OMAP4 PandaBoard. PandaBoard uses TFP410 DVI Framer chip http://focus.ti.com/lit/ds/symlink/tfp410.pdf The TFP410 gets its power enable and display data over GPIO lines muxed in from OMAP4430. PandaBoard supports other LCD displays through expansion connectors, following board rework. This will disable the DVI interface. However, the existing mux settings remain the same PandaBoard additionally supports display over HDMI interface. It is mutually exclusive to display over DVI. Hence the mux settings need to be configured seperately, as and when HDMI is enabled Also, I2C3 bus used for reading EDID data from DVI Monitors is registered here. Since the design is similar to BeagleBoard, the code for the same is taken from the kernel.org commit e3333f48dd5cb21 (omap: Adding beagle i2c eeprom driver to read EDID) Reviewed-by: Manjunath G Kondaiah <manjugk@ti.com> Reviewed-by: Anand Gadiyar <gadiyar@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Reviewed-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com> [tomi.valkeinen@ti.com: fixed conflicts with HDMI] Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: Implement OMAP4 DSS fclk supportMurthy, Raghuveer2011-03-181-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dss.dpll4_m4_ck (DSS FCLK) initialization for OMAP4. This is used to compute the pixel clock for DPI interface and also to reconfigure the DSS FCLK to the desired rate, corresponding to the rate computed for pixel clock. Adding these cpu_is_44xx() checks are meant to be temporary, until a cleaner implementation to manage these checks are added. Currently this is needed to get DVI display running on OMAP4 PandaBoard Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com> [tomi.valkeinen@ti.com: minor changes due to conflicts] Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: Clean up for dpll4_m4_ck handlingTomi Valkeinen2011-03-181-34/+59
| | | | | | | | | | | | | | | | | | | | | | | | OMAP2 does not have dpll4_m4_ck source clock for dss functional clock, but later OMAPs do. Currently we check for cpu type in multiple places to find out if dpll4_m4_ck is available. This patch cleans up dss.c by using the fact that dss.dpll4_m4_ck pointer is NULL on OMAP2. This allows us to remove many of the cpu checks. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: HDMI: Add HDMI structure in the board file for OMAP4 PANDAK, Mythri P2011-03-161-0/+74
| | | | | | | | | | | | | | | | | | | | Adding board file structure for display which adds the display structure with HDMI as the default driver when the display init is called. HDMI GPIO configurations are also done in this file. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: HDMI: Add HDMI structure in the board file for OMAP4 SDPMythri P K2011-03-161-0/+75
| | | | | | | | | | | | | | | | | | | | Adding board file structure for display which adds the display structure with HDMI as the default driver when the display init is called. HDMI GPIO configurations are also done in this file. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS: HDMI: Call to HDMI module init to register driver.Mythri P K2011-03-161-0/+9
| | | | | | | | | | | | | | | | calling the platform registration of HDMI driver from core during initialization. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: HDMI: Add makefile and kconfig changes to enable HDMI in OMAP4Mythri P K2011-03-162-0/+10
| | | | | | | | | | | | | | Adding kconfig and makefile changes to add support for HDMI in OMAP4. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: HDMI: HDMI panel driver addition in the DSSMythri P K2011-03-162-0/+224
| | | | | | | | | | | | | | | | The panel driver(hdmi_omap4_panel.c) in omap2/dss acts as a controller to manage the enable and disable requests and synchronize audio and video. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: HDMI: HDMI driver addition in the DSSMythri P K2011-03-163-0/+1369
| | | | | | | | | | | | | | | | | | | | Adding the hdmi interface driver(hdmi.c) to the dss driver. It configures the audio and video portion of HDMI based on functionality called by the panel driver. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Yong Zhi <y-zhi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: HDMI: HDMI driver header file additionMythri P K2011-03-161-0/+415
| | | | | | | | | | | | | | | | Adding the hdmi interface driver header file (hdmi.h) to the dss driver. Register and structure declaration done here. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: HDMI: Dispc gamma enable set/reset function for TV.Mythri P K2011-03-162-0/+15
| | | | | | | | | | | | | | | | Adding function to reset/set gamma table bit for TV interface, currently only support for disabled is added. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: HDMI: Select between HDMI VENC clock source.Mythri P K2011-03-162-0/+11
| | | | | | | | | | | | | | Adding function to select between HDMI or VENC clock source. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: Add display type HDMI to DSS2Mythri P K2011-03-165-5/+15
| | | | | | | | | | | | | | | | Adding display type HDMI in dss_features, overlay and the manager so that HDMI type of display will be recognized. Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: DSI: fix IRQ debug printsTomi Valkeinen2011-03-151-0/+9
| | | | | | | | | | | | | | | | | | print_irq_status functions can be called with empty irq status when full irq debugging is enabled. This patch makes print_irq_status functions return immediately when given an empty irq status to lessen the debug spam slightly. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: DSI: catch DSI errors in send_bta_syncTomi Valkeinen2011-03-151-4/+11
| | | | | | | | | | | | | | | | | | | | | | dsi_vc_send_bta_sync() waits for BTA interrupt with a 500ms timeout. If a DSI error happens, no BTA is received and the timeout triggers. This could be handled much faster by listening to DSI errors also. This patch uses the ISR support to notice DSI errors while waiting for the BTA, thus speeding up the fail-path considerably. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: DSI: use ISR for BTA in framedoneTomi Valkeinen2011-03-151-42/+15
| | | | | | | | | | | | | | Remove bta_callback from the interrupt handler, and use ISR support instead. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: DSI: use ISR in send_bta_syncTomi Valkeinen2011-03-151-14/+18
| | | | | | | | | | | | | | Remove bta_completion handling from the interrupt handler, and use ISR support instead. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: DSI: Add ISR supportTomi Valkeinen2011-03-151-25/+304
| | | | | | | | | | | | | | Add generic ISR support for DSI interrupts. ISRs can be used instead of custom hooks in the interrupt handler. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: DSI: Restructure IRQ handlerTomi Valkeinen2011-03-151-50/+73
| | | | | | | | | | | | | | Clean up the IRQ handler a bit by separating collection of IRQ stats and handling of IRQ errors to separate functions. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: FEATURES: DSI PLL parameter cleanupTaneja, Archit2011-03-153-50/+113
| | | | | | | | | | | | | | | | | | The DSI PLL parameters (regm, regn, regm_dispc, regm_dsi, fint) have different fields and also different Max values on OMAP3 and OMAP4. Use dss features to calculate the register fields and min/max values based on current OMAP revision. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: FEATURES: Functions to return min and max values of parametersTaneja, Archit2011-03-154-11/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | Create 2 functions dss_feat_get_param_min() and dss_feat_get_param_max() which return the minimum and maximum value of a parameter. Introduce a enum in dss_features called dss_range_param which contains parameters whose ranges we are interested in. Replace this with dss_feat_get_max_dss_fck() which is specific to the parameter DSS_FCK. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP2PLUS: DSS2: FEATURES: Fix usage of dss_reg_field and dss_clk_source_nameTaneja, Archit2011-03-153-50/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The structures dss_reg_field and dss_clk_source_name have enum members which specify the register field and the clock source respectively. These members are not used to choose the correct result in the corresponding feature functions. Remove these members and change the features array declaration to incorporate these enums. The structure dss_clk_source_name without the enum member is just a pointer to an string. Remove the structure and use a character pointer directly. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * HACK: OMAP: DSS2: VENC: disable VENC on OMAP4 to prevent crashTomi Valkeinen2011-03-141-0/+6
| | | | | | | | | | | | | | | | | | | | Something seems to be wrong with OMAP4 & VENC, and register access fails in omap_venchw_probe(). This patch skips venc driver registration on OMAP4, thus circumventing the problem for now. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: Add gpio-keys support for OveroSteve Sakoman2011-03-111-0/+42
| | | | | | | | | | | | | | | | | | This patch adds support for the standard push buttons available on Overo expansion boards. Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: Add gpio-leds support for OveroSteve Sakoman2011-03-111-0/+53
| | | | | | | | | | | | | | | | This patch adds support for the standard LEDs on the Overo COM and expansion boards Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * omap: overo: Add regulator for ads7846Steve Sakoman2011-03-111-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | The ads7846 driver now requires a regulator. This patch adds the necessary regulator to the overo board file. Without it, the following error occurs (and the touchscreen will not function): ads7846 spi1.0: unable to get regulator: -19 Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: Clock source changes for OMAP4Taneja, Archit2011-03-115-17/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP3, the pixel clock for the LCD manager was derived through DISPC_FCLK as: Lcd Pixel clock = DISPC_FCLK / lcd / pcd Where lcd and pcd are divisors in the DISPC_DIVISOR register. On OMAP4, the pixel clocks for LCD1 and LCD2 managers are derived from 2 new clocks named LCD1_CLK and LCD2_CLK. The pixel clocks are calculated as: Lcd_o Pixel clock = LCDo_CLK / lcdo /pcdo, o = 1, 2 Where lcdo and pcdo registers are divisors in DISPC_DIVISORo registers. LCD1_CLK and LCD2_CLK can have DSS_FCLK, and the M4 divider clocks of DSI1 PLL and DSI2 PLL as clock sources respectively. Introduce functions to select and get the clock source for these new clocks. Modify DISPC functions get the correct lck and pck rates based on the clock source of these clocks. Since OMAP2/3 don't have these clocks, force OMAP2/3 to always have the LCD_CLK source as DSS_CLK_SRC_FCK by introducing a dss feature. Introduce clock source names for OMAP4 and some register field changes in DSS_CTRL on OMAP4. Currently, LCD2_CLK can only have DSS_FCLK as its clock source as DSI2 PLL functionality hasn't been introduced yet. BUG for now if DSI2 PLL is selected as clock. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP2PLUS: DSS2: Cleanup clock source related codeTaneja, Archit2011-03-113-18/+34
| | | | | | | | | | | | | | | | | | | | | | | | Clean up some of the DSS functions which select/get clock sources, use switch to select the clock source members since more clock sources will be introduced later on. Remove the use of macro CONFIG_OMAP2_DSS_DSI in dispc_fclk_rate, use a dummy inline for function for dsi_get_pll_hsdiv_dispc_rate() instead for code clarity. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: Add DSS2 support for OveroSteve Sakoman2011-03-111-37/+200
| | | | | | | | | | | | | | | | This patch adds DSS2 support for DVI, S-video, the 480x272 Samsung LTE430WQ-F0C panel, and the 320x240 LG.Philips LB035Q02 panel. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: Add support for LG Philips LB035Q02 panelSteve Sakoman2011-03-113-0/+286
| | | | | | | | | | | | | | | | This patch adds support for the Gumstix Palo35 expansion board which utilizes the 320 x 240 pixel LG.Philips LB035Q02 LCD Panel Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: fix omap_dispc_register_isr() fail pathTomi Valkeinen2011-03-111-0/+3
| | | | | | | | | | | | | | | | Fix handling of error in omap_dispc_register_isr() in case there are no free isr slots available. Reported-by: Ben Tucker <btucker@mpcdata.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP4: DSS2: Using dss_features to set independent core clock dividerMurthy, Raghuveer2011-03-111-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using dss_features to select independent core clock divider and setting it. Added the register used, to DISPC context save and restore group ----------------------------------------------------------------------- In OMAP4, the minimum DISPC_CORE_CLK required can be expressed as: DISPC_CORE_CLK >= max(PCLK1*HSCALE1, PCLK2*HSCALE2, ...) Where PCLKi is the pixel clock generated by MANAGERi and HSCALEi is the maximum horizontal downscaling done through MANAGERi Based on the usecase, core clk can be increased or decreased at runtime to save power. Such mechanism are not yet implemented. Hence, we set the core clock divisor to 1, to support maximum range of resolutions ------------------------------------------------------------------------ Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: Renaming register macro DISPC_DIVISOR(ch)Murthy, Raghuveer2011-03-111-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP4 DISPC_DIVISOR1 is backward compatible to OMAP3xxx DISPC_DIVISOR. However DISPC_DIVISOR is also provided in OMAP4, to control DISPC_CORE_CLK independent of Primary and Secondary display clocks. Renamed DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch), to facilitate introduction of DISPC_DIVISOR register, which is specific for OMAP4. OMAP4 has 3 registers DISPC_DIVISOR, DISPC_DIVISOR1 and DISPC_DIVISOR2. Also updated, all the usages of DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch). Use DISPC_DIVISORo(ch) when DISPC_DIVISOR1 or DISPC_DIVISOR2 has to be configured OMAP4 TRM uses DISPC_DIVISORo generically to refer to DISPC_DIVISOR1 and DISPC_DIVISOR2 Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAP: DSS2: Adding dss_features for independent core clk dividerMurthy, Raghuveer2011-03-112-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In OMAP3xxx DISPC_DIVISOR register has a logical clock divisor (lcd_div) field. The lcd_div is common, for deciding the DISPC core functional clock frequency, and the final pixel clock frequency for LCD display. In OMAP4, there are 2 LCD channels, hence two divisor registers, DISPC_DIVISOR1 and DISPC_DIVISOR2. Also, there is a third register DISPC_DIVISOR. The DISPC_DIVISOR in OMAP4 is used to configure lcd_div exclusively for core functional clock configuration. For pixel clock configuration of primary and secondary LCDs, lcd_div of DISPC_DIVISOR1 and DISPC_DIVISOR2 are used respectively Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * HACK: OMAP: DSS2: add delay after enabling clocksTomi Valkeinen2011-03-111-0/+8
| | | | | | | | | | | | | | | | | | On omap4 the registers may not be accessible right after enabling the clocks. At some point this will be handled by pm_runtime, but, for the time begin, adding a small delay after clk_enable() should make things work. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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