| Commit message (Collapse) | Author | Age | Files | Lines |
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Semaphore to mutex conversion.
The conversion was generated via scripts, and the result was validated
automatically via a script as well.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Semaphore to mutex conversion.
The conversion was generated via scripts, and the result was validated
automatically via a script as well.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: au88x0 driver
Fixed the structures for equalizer.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ES18xx driver
Forth of 4 es18xx.c patches culminating in Zoom Video support.
This patch adds Zoom Video support for those chipsets that support it.
Testing:
This work was initially done on the source from the Debian Sarge ALSA
package, then tested
on an ES1879. I could not test the Zoom Video function for an ES1878 or
ES1869.
Patches were created against the Sarge code and then edited to apply
correctly to the
ALSA cvs code. Lastly the patched ALSA cvs code was test for successful
compilation.
No additional testing was done on the ALSA cvs version.
One quirk (noted in my comments below) is that apparently the datasheet
is wrong
for one of the ES1879 Zoom Video 'enable' bits, because
1) if you set this bit it messes up PCM playback (speaker_test play a
lower frequency)
2) even if you don't set this bit Zoom Video still works.
I added a control to toggle the bit on just in case there might be a
version of the
ES1879 that requires it, but I expect noone will need it.
Signed-off-by: Mark Salazar <markTheCoder@justmyself.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ES18xx driver
Third of 4 es18xx.c patches culminating in Zoom Video support.
This patch changes the Hardware Volume support to reflect the fact that
not all of the
supported chipsets have seperate registers dedicated to the Hardware
Volume inputs. Although
all the chipsets can generate an HWV interrupt whenever a Hardware
Volume input is received
only those with seperate HWV registers can split the HWV registers from
the Master volume
registers.
Testing:
This work was initially done on the source from the Debian Sarge ALSA
package, then tested
on an ES1879 and an ES1878 machine. Patches were created against the
Sarge code and then edited
to apply correctly to the ALSA cvs code. Lastly the patched ALSA cvs
code was test for
successful compilation. No additional testing was done on the ALSA cvs
version.
Signed-off-by: Mark Salazar <markTheCoder@justmyself.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ES18xx driver
Second of 4 es18xx.c patches culminating in Zoom Video support.
This patch changes the 'record source' mux routines to reflect the fact
that not all of the
supported chipsets have 8 possible inputs. Some have 4 and some have 5.
Testing:
This work was initially done on the source from the Debian Sarge ALSA
package, then tested
on an ES1879 and an ES1878 machine. Patches were created against the
Sarge code and then edited
to apply correctly to the ALSA cvs code. Lastly the patched ALSA cvs
code was test for
successful compilation. No additional testing was done on the ALSA cvs
version.
Signed-off-by: Mark Salazar <markTheCoder@justmyself.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ES18xx driver
First of 4 es18xx.c patches culminating in Zoom Video support.
While adding support for Zoom Video to the es18xx driver I found some of
the mixer controls
were wrong. Since you guys went to the trouble of supplying the
datasheets for the supported
chipsets I did a review of all of them and tried to get es18xx.c to
accurately reflect the
proper mixer controls for each chipset. If the datasheets are wrong then
so are my patches.
This first patch moves some controls from the common-to-all-chipsets array
'snd_es18xx_base_controls' to a chipset-specific array and adds code to
manage that new array.
Also while testing on my ES1878 test machine I discovered it needed a
couple of udelays in
the identify function so those are in this patch as well.
Testing:
This work was initially done on the source from the Debian Sarge ALSA
package, then tested
on an ES1879 and an ES1878 machine. Patches were created against the
Sarge code and then edited
to apply correctly to the ALSA cvs code. Lastly the patched ALSA cvs
code was test for
successful compilation. No additional testing was done on the ALSA cvs
version.
Signed-off-by: Mark Salazar <markTheCoder@justmyself.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: USB generic driver
Add a quirk entry for the Edirol PC-50.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
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Modules: PXA Mainstone driver,CX88 driver,SAA7134 driver
Replace snd_xxx_t typedefs with explicit structs.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: au88x0 driver
Fix the driver codes to run on 64bit architectures.
The patch taken from ALSA BTS bug#1047.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: Documentation
Updated the description of ice1724 driver.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ICE1712 driver
Added the support of Prodigy-7.1LT board.
The patch taken from ALSA BTS bug#1090.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ALSA<-OSS emulation
Clean up pcm-oss plugin codes.
Removed dead codes, and simplified route/rate plugins.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ALSA<-OSS emulation
Fixed a typo.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ALSA Core,PCM Midlevel,ALSA<-OSS emulation,USB generic driver
1) The verbose procfs code for the PCM midlevel and usb audio
can be removed now (more patches will follow).
CONFIG_SND_VERBOSE_PROCFS
2) The PCM OSS plugin system can be also compiled optionaly.
CONFIG_SND_PCM_OSS_PLUGINS
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
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Modules: YMFPCI driver
The routing of the effect 2/3 channels to the digital output is the
opposite of the rear analog output (left/right swapped).
We make the order correct for the digital output (which will make the
analog rear have the channels swapped) to make AC3 output work.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
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Modules: Documentation,HDA Intel driver
Added single_cmd module option for debugging in the case CORB/RIRB
doesn't work well (e.g. due to wrong irq routings).
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: Intel8x0 driver
Fix the detection of tertriary codec on SIS7012, including clean-ups
of relevant codes.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: ENS1370/1+ driver
Fix resume of ens1370 driver.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: USB generic driver
Move the common packet size calculation code from
prepare_startup_playback_urb() and prepare_playback_urb() to a new
function.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
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Modules: USB generic driver
Move some entries around to keep them sorted by ID.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
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Modules: USB generic driver
This is my naive attempt at adding ALSA device support. The attached
patch provides support for the EDIROL UM-3ex. This is a 3-port USB midi
interface with a built-in USB hub and the ability to chain 2 other
UM-3x's in a master-slave configuration. I only have one, so I do not
know how this works in practice.
Though this is a 3-port device, I had to throw in that 4th 'Control' interface
to the definition in order to make the 3rd port work. If I set in/out_cables
to 0x000b, a 3rd interface appears on the driver, but it does nothing.
Changing it to 0x000f allows the 3rd interface to work, but of course
interface 4 does not work because it does not exist.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Modules: Digigram PCXHR driver
Suppress debug messages.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (230 commits)
[SPARC64]: Update defconfig.
[SPARC64]: Fix 2 bugs in huge page support.
[SPARC64]: CONFIG_BLK_DEV_RAM fix
[SPARC64]: Optimized TSB table initialization.
[SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build.
[SPARC64]: Use SLAB caches for TSB tables.
[SPARC64]: Don't kill the page allocator when growing a TSB.
[SPARC64]: Randomize mm->mmap_base when PF_RANDOMIZE is set.
[SPARC64]: Increase top of 32-bit process stack.
[SPARC64]: Top-down address space allocation for 32-bit tasks.
[SPARC64] bbc_i2c: Fix cpu check and add missing module license.
[SPARC64]: Fix and re-enable dynamic TSB sizing.
[SUNSU]: Fix missing spinlock initialization.
[TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.
[SPARC64]: First cut at VIS simulator for Niagara.
[SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.
[SPARC64]: Add SMT scheduling support for Niagara.
[SPARC64]: Fix 32-bit truncation which broke sparsemem.
[SPARC64]: Move over to sparsemem.
[SPARC64]: Fix new context version SMP handling.
...
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Signed-off-by: David S. Miller <davem@davemloft.net>
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1) huge_pte_offset() did not check the page table hierarchy
elements as being empty correctly, resulting in an OOPS
2) Need platform specific hugetlb_get_unmapped_area() to handle
the top-down vs. bottom-up address space allocation strategies.
Signed-off-by: David S. Miller <davem@davemloft.net>
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init/do_mounts_rd.c depends upon CONFIG_BLK_DEV_RAM, not CONFIG_BLK_DEV_INITRD.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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We only need to write an invalid tag every 16 bytes,
so taking advantage of this can save many instructions
compared to the simple memset() call we make now.
A prefetching implementation is implemented for sun4u
and a block-init store version if implemented for Niagara.
The next trick is to be able to perform an init and
a copy_tsb() in parallel when growing a TSB table.
Signed-off-by: David S. Miller <davem@davemloft.net>
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online_page() is straightforward, and then add a dummy
remove_memory() that returns -EINVAL just like i386.
There is no point in implementing remove_memory() since
__remove_pages() has no implementation either.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Try only lightly on > 1 order allocations.
If a grow fails, we are under memory pressure, so do not try
to grow the TSB for this address space any more.
If a > 0 order TSB allocation fails on a new fork, retry using
a 0 order allocation.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Put it one page below the top of the 32-bit address space.
This gives us ~16MB more address space to work with.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Currently allocations are very constrained for 32-bit processes.
It grows down-up from 0x70000000 to 0xf0000000 which gives about
2GB of stack + dynamic mmap() space.
So support the top-down method, and we need to override the
generic helper function in order to deal with D-cache coloring.
With these changes I was able to squeeze out a mmap() just over
3.6GB in size in a 32-bit process.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Should allow cheetah_plus cpu types and don't taint
the kernel.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
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Caught by CONFIG_DEBUG_SPINLOCK.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Sun does't put an SEEPROM behind the tigon3 chip, among other things,
so accesses to these areas just give bus timeouts.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Niagara does not implement some of the VIS instructions in
hardware, so we have to emulate them.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Report 'sun4v' when appropriate in /proc/cpuinfo
Remove all the verifications of the OBP version string. Just
make sure it's there, and report it raw in the bootup logs and
via /proc/cpuinfo.
Signed-off-by: David S. Miller <davem@davemloft.net>
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The mapping is a simple "(cpuid >> 2) == core" for now.
Later we'll add more sophisticated code that will walk
the sun4v machine description and figure this out from
there.
We should also add core mappings for jaguar and panther
processors.
Signed-off-by: David S. Miller <davem@davemloft.net>
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The page->flags manipulations done by the D-cache dirty
state tracking was broken because the constants were not
marked with "UL" to make them 64-bit, which means we were
clobbering the upper 32-bits of page->flags all the time.
This doesn't jive well with sparsemem which stores the
section and indexing information in the top 32-bits of
page->flags.
This is yet another sparc64 bug which has been with us
forever.
While we're here, tidy up some things in bootmem_init()
and paginig_init():
1) Pass min_low_pfn to init_bootmem_node(), it's identical
to (phys_base >> PAGE_SHIFT) but we should use consistent
with the variable names we print in CONFIG_BOOTMEM_DEBUG
2) max_mapnr, although no longer used, was being set
inaccurately, we shouldn't subtract pfn_base any more.
3) All the games with phys_base in the zones_*[] arrays
we pass to free_area_init_node() are no longer necessary.
Thanks to Josh Grebe and Fabbione for the bug reports
and testing. Fix also verified locally on an SB2500
which had a memory layout that triggered the same problem.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This has been pending for a long time, and the fact
that we waste a ton of ram on some configurations
kind of pushed things over the edge.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Don't piggy back the SMP receive signal code to do the
context version change handling.
Instead allocate another fixed PIL number for this
asynchronous cross-call. We can't use smp_call_function()
because this thing is invoked with interrupts disabled
and a few spinlocks held.
Also, fix smp_call_function_mask() to count "cpus" correctly.
There is no guarentee that the local cpu is in the mask
yet that is exactly what this code was assuming.
Signed-off-by: David S. Miller <davem@davemloft.net>
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1) Always spin_lock_init() in init_context(). The caller essentially
clears it out, or copies the mm info from the parent. In both
cases we need to explicitly initialize the spinlock.
2) Always do explicit IRQ disabling while taking mm->context.lock
and ctx_alloc_lock.
Signed-off-by: David S. Miller <davem@davemloft.net>
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this patch converts arch/sparc64 to kzalloc usage.
Crosscompile tested with allyesconfig.
Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
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If we were aligned, but didn't have at least 256MB left
to process, we would loop forever.
Thanks to fabbione for the report and testing the fix.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Don't try to avoid putting non-base page sized entries
into the user TSB. It actually costs us more to check
this than it helps.
Eventually we'll have a multiple TSB scheme for user
processes. Once a process starts using larger pages,
we'll allocate and use such a TSB.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This cpu mondo sending interface isn't all that easy to
use correctly...
We were clearing out the wrong bits from the "mask" after getting
something other than EOK from the hypervisor.
It turns out the hypervisor can just be resent the same cpu_list[]
array, with the 0xffff "done" entries still in there, and it will do
the right thing.
So don't update or try to rebuild the cpu_list[] array to condense it.
This requires the "forward_progress" check to be done slightly
differently, but this new scheme is less bug prone than what we were
doing before.
Signed-off-by: David S. Miller <davem@davemloft.net>
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We were clobbering a base register before we were done
using it. Fix a comment typo while we're here.
Signed-off-by: David S. Miller <davem@davemloft.net>
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