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* i2c-bfin-twi: return completion in interrupt for smbus quick transfersSonic Zhang2010-05-201-11/+7
| | | | | | | | A smbus quick transfer has no data after the address byte. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-bfin-twi: remove redundant retrySonic Zhang2010-05-201-18/+2
| | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-bfin-twi: fix lost interrupts at high speedsSonic Zhang2010-05-201-24/+13
| | | | | | | | | | i2c event of next read/write byte may trigger before current int state is cleared in the interrupt handler. So, this should be done at the beginning of interrupt handler to avoid losing new i2c events. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-bfin-twi: add debug output for error statusMichael Hennerich2010-05-201-0/+12
| | | | | | | | Add some debug() code to decode the error register. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-bfin-twi: integrate timeout timer with completion interfaceSonic Zhang2010-05-201-59/+66
| | | | | | | | | | There isn't much point in managing our own custom timeout timer when the completion interface already includes support for it. This makes the resulting code much simpler and robust. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-s3c2410: Remove unconditional 1ms delay on each transferMark Brown2010-05-201-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | The S3C I2C controller indicates completion of I2C transfers before the bus has a stop condition on it. In order to ensure that we do not attempt to start a new transfer before the bus is idle the driver currently inserts a 1ms delay. This is vastly larger than is generally required and has a visible effect on performance under load, such as when bringing up audio CODECs or reading back status information with non-bulk I2C reads. Replace the sleep with a spin on the IIC status register for up to 1ms. This will busy wait but testing on my SMDK6410 system indicates that the overwhelming majority of transactions complete on the first spin, with maximum latencies of less than 10 spins so the absolute overhead of busy waiting should be at worst comprable to msleep(), and the overall system performance is dramatically improved. The main risk is poor interaction with multimaster systems where we may miss the bus going idle before the next transaction. Defend against this by falling back to the original 1ms delay after 20 spins. The overall effect in my testing is an approximately 20% improvement in kernel startup time. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Merge branch 'davinci-for-linus' of ↵Linus Torvalds2010-05-1950-664/+1813
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci * 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: (48 commits) Revert "rtc: omap: let device wakeup capability be configured from chip init logic" DM365: Added more PINMUX configurations for AEMIF DM365: Make CLKOUTx available DM365: Added PINMUX definitions for GPIO30..32 Davinci: iotable based ioremap() interception Davinci: pinmux - use ioremap() Davinci: aintc/cpintc - use ioremap() Davinci: psc - use ioremap() Davinci: timer - use ioremap() Davinci: jtag_id - use ioremap() Davinci: da8xx: rtc - use ioremap Davinci: gpio - use ioremap() davinci: edma: fix coding style issue related to breaking lines davinci: edma: use BIT() wherever possible davinci: edma: fix coding style issue related to usage of braces davinci: edma: use a more intuitive name for edma_info Davinci: serial - conditional reset via pwremu Davinci: serial - use ioremap() Davinci: serial - remove unnecessary define Davinci: watchdog reset separation across socs ... Fix up trivial conflict in arch/arm/Kconfig due to removal of "select GENERIC_TIME"
| * Revert "rtc: omap: let device wakeup capability be configured from chip init ↵Kevin Hilman2010-05-191-7/+5
| | | | | | | | | | | | | | logic" This reverts commit 9c0a342c45b2d98209ac473ea7a429ddd5c1b473 because it was included without proper signoffs from RTC maintainers.
| * DM365: Added more PINMUX configurations for AEMIFThomas Koeller2010-05-132-2/+8
| | | | | | | | | | | | | | More complete AEMIF support for boards. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DM365: Make CLKOUTx availableThomas Koeller2010-05-132-0/+9
| | | | | | | | | | | | | | | | Added PINMUX configurations for the CLKOUT0 .. CLKOUT2 functions, for boards that want to use these clocks. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DM365: Added PINMUX definitions for GPIO30..32Thomas Koeller2010-05-132-0/+6
| | | | | | | | | | | | | | Board code may want to use them. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: iotable based ioremap() interceptionCyril Chemparathy2010-05-134-12/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows for a more flexible ioremap() interception based on iotable contents. With this patch, the ioremap() interception code can properly translate addresses only after davinci_soc_info has been initialized. Consequently, in soc-specific init functions, davinci_common_init() has to happen before any ioremap() attempts. The da8xx init sequence has been suitably modified to meet this restriction. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: pinmux - use ioremap()Cyril Chemparathy2010-05-138-14/+19
| | | | | | | | | | | | | | | | This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: aintc/cpintc - use ioremap()Cyril Chemparathy2010-05-1320-80/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the following: - interrupt initialization uses ioremap() instead of passing a virtual address via davinci_soc_info. - machine definitions directly point to cp_intc_init() or davinci_irq_init() - davinci_intc_type and davinci_intc_base now get initialized in controller specific init functions instead of davinci_common_init() - minor fix in davinci_irq_init() to use intc_irq_num instead of DAVINCI_N_AINTC_IRQ Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: psc - use ioremap()Cyril Chemparathy2010-05-139-26/+23
| | | | | | | | | | | | | | | | This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: timer - use ioremap()Cyril Chemparathy2010-05-135-17/+23
| | | | | | | | | | | | | | | | This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The timer code has correspondingly been modified to ioremap() MMRs instead. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: jtag_id - use ioremap()Cyril Chemparathy2010-05-138-31/+37
| | | | | | | | | | | | | | | | | | | | | | This patch replaces the jtag id base info in davinci_soc_info with a physical address which is then ioremap()ed within common code. This patch (in combination with a similar change for PSC) will allow us to eliminate the SYSCFG nastiness in DA8xx code. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: da8xx: rtc - use ioremapCyril Chemparathy2010-05-131-2/+9
| | | | | | | | | | | | | | | | This patch modifies the RTC unlock code to use ioremap() maps instead of IO_ADDRESS() translation. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: gpio - use ioremap()Cyril Chemparathy2010-05-138-14/+18
| | | | | | | | | | | | | | | | | | This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: edma: fix coding style issue related to breaking linesSekhar Nori2010-05-131-6/+6
| | | | | | | | | | | | | | | | | | | | In the edma driver, most of the long lines in 'if condition' are broken after the logical operator '&&' except two instances. This patch fixes that to bring consistency across the file. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: edma: use BIT() wherever possibleSekhar Nori2010-05-131-21/+21
| | | | | | | | | | | | | | | | This patch replaces occurences of (1 << x) with BIT(x) as it makes for much better reading. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: edma: fix coding style issue related to usage of bracesSekhar Nori2010-05-061-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | In the edma driver, there are couple of instances where braces are used for a single statement 'if' construct. There are other instances where 'else' part of the if-else construct does not use braces even if the 'if' part is a multi-line statement. This patch fixes both. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: edma: use a more intuitive name for edma_infoSekhar Nori2010-05-061-81/+77
| | | | | | | | | | | | | | | | | | | | | | | | 'edma_info' structure inside the edma driver represents a single instance of edma channel controller. Call it 'edma_cc' instead. This also avoids readers confusing it with an instance of edma_soc_info structre which carries the platform data for a single channel controller instance. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: serial - conditional reset via pwremuCyril Chemparathy2010-05-061-1/+1
| | | | | | | | | | | | | | | | With this patch, AR7 type uart ports are not reset via pwremu registers. This allows davinci_serial_init() reuse on tnetv107x soc. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: serial - use ioremap()Cyril Chemparathy2010-05-061-7/+25
| | | | | | | | | | | | | | | | | | | | | | | | This patch implements davinci serial cleanups towards having this code reusable on tnetv107x. The change reuses the platform data membase field to hold the remapped space. By disabling the UPF_IOREMAP flag in the platform data, we prevent the 8250 driver from repeating the ioremap. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: serial - remove unnecessary defineCyril Chemparathy2010-05-062-2/+1
| | | | | | | | | | | | | | | | | | | | | | The uart pdata array is already terminated by a zero flag field. This patch reuses this terminator and eliminates DAVINCI_MAX_NR_UARTS definition. This way, future platforms can have different number of uarts initialized via davinci_serial_init(). Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: watchdog reset separation across socsCyril Chemparathy2010-05-0613-7/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The earlier watchdog reset mechanism had a couple of limitations. First, it embedded a reference to "davinci_wdt_device" inside common code. This forced all derived platforms (da8xx and tnetv107x) to define such a device. This also would have caused problems in including multiple socs in a single build due to symbol redefinition. With this patch, davinci_watchdog_reset() now takes the platform device as an argument. The davinci_soc_info struct has been extended to include a reset function and a watchdog platform_device. arch_reset() then uses these elements to reset the system in a SoC specific fashion. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: eliminate pinmux offset verbosityCyril Chemparathy2010-05-068-43/+4
| | | | | | | | | | | | | | | | | | | | | | Pinmux registers are sequential, and do not need to be enumerated out as they currently are. This reduces code volume and keeps things simple. If some future SoC comes up with a discontiguous register map, PINMUX() can then be expanded with local token pasting. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: gpio - fine grained lockingCyril Chemparathy2010-05-062-4/+8
| | | | | | | | | | | | | | | | | | | | This patch eliminates the global gpio_lock, and implements a per-controller lock instead. This also switches to irqsave/irqrestore locks in case gpios are manipulated in isr. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: gpio - controller type supportCyril Chemparathy2010-05-069-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows for gpio controllers that deviate from those found on traditional davinci socs. davinci_soc_info has an added field to indicate the soc-specific gpio controller type. The gpio initialization code then bails out if necessary. More elements (tnetv107x) to be added later into enum davinci_gpio_type. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: gpio - register layout invariant inlinesCyril Chemparathy2010-05-063-45/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renders the inlined gpio accessors in gpio.h independent of the underlying controller's register layout. This is done by including three new fields in davinci_gpio_controller to hold the addresses of the set, clear, and in data registers. Other changes: 1. davinci_gpio_regs structure definition moved to gpio.c. This structure is no longer common across all davinci socs (davinci_gpio_controller is). 2. controller base address calculation code (gpio2controller()) moved to gpio.c as this was no longer necessary for the inline implementation. 3. modified inline range checks to use davinci_soc_info.gpio_num instead of DAVINCI_N_GPIO. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: gpio - structs and functions renamedCyril Chemparathy2010-05-062-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renamed gpio types to something more sensible: struct gpio_controller --> struct davinci_gpio_regs struct davinci_gpio --> struct davinci_gpio_controller gpio2controller() --> gpio2regs() irq2controller() --> irq2regs() This change also moves davinci_gpio_controller definition to gpio.h. Eventually, the gpio registers structure will be moved to gpio.c and no longer a common cross-soc definition. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: gpio - minor cleanupCyril Chemparathy2010-05-061-23/+27
| | | | | | | | | | | | | | | | | | macroized repeated container_of()s to improve readability. unified direction in/out functions. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DaVinci: move IDE platform device to its proper placeSergei Shtylyov2010-05-067-100/+49
| | | | | | | | | | | | | | | | | | | | | | The IDE platform device is registered in three different places (2 board files for DM644x and in dm646x.c for DM646x) while both the IDE base address and the IDE IRQ are the same for both SoCs -- therefore, the proper place for the IDE platform seems to be in devices.c. Merge the IDE platform data and registration code and create davinci_init_ide() in place of dm646x_init_ide()... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: mach/common.h: add missing includesThomas Koeller2010-05-061-0/+3
| | | | | | | | | | | | | | | | linux/compiler.h is required for __iomem linux/types.h is required u32 Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: configurable pll divider maskCyril Chemparathy2010-05-062-3/+7
| | | | | | | | | | | | | | | | | | This patch allows socs to override the divider ratio mask by setting an optional field (div_ratio_mask) in the pll_data structure. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: DM365: Allow use of GPIO64_57Thomas Koeller2010-05-062-0/+2
| | | | | | | | | | | | | | | | Extended the MUX configuration to allow use of GPIO terminals 64..57. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DA830 EVM: use DA8XX_AEMIF_*_BASE #define'sSergei Shtylyov2010-05-061-7/+4
| | | | | | | | | | | | | | | | | | The board file #define's its own version of EMIFA base addresses, while there are DA8XX_AEMIF_*_BASE macros #define'd in <mach/da8xx.h>. Start using them instead. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DaVinci: move AEMIF #define's to the proper headersSergei Shtylyov2010-05-0611-52/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently each DaVinci board file #define's its own version of the EMIFA base addresses (all named DAVINCI_ASYNC_EMIF_*_BASE), which leads to duplication. Move these #define's to the SoC specific headers, changing their prefixes from 'DAVINCI' to the 'DM355', 'DM644X', and 'DM646X' since all these base addresses are SoC specific... And while at it, rename DM646X_ASYNC_EMIF_DATA_CE0_BASE to DM646X_ASYNC_EMIF_CS2_SPACE_BASE in order to match the DM646x datasheet. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x cpu typesCyril Chemparathy2010-05-061-0/+8
| | | | | | | | | | | | | | Added tnetv107x cpu type definitions and cpu identification macros. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x IRQ definitionsCyril Chemparathy2010-05-061-0/+97
| | | | | | | | | | | | | | IRQ numbers as defined for tnetv107x cp_intc. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x LPSC modulesCyril Chemparathy2010-05-061-0/+47
| | | | | | | | | | | | | | Added definitions for LPSC modules in the tnetv107x SOC Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x pin listCyril Chemparathy2010-05-061-0/+269
| | | | | | | | | | | | | | Added list of muxed pins on the tnetv107x SOC. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: promote da8xx_pinmux_setup()Cyril Chemparathy2010-05-065-24/+22
| | | | | | | | | | | | | | | | Rename da8xx_pinmux_setup() to davinci_cfg_reg_list() and promote it for use in other SOCs that may need the ability to configure multiple pins in one shot. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: support LPSC SwRstDisable stateCyril Chemparathy2010-05-064-9/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current clock control code always gates the clock (PSC state Disable = 2) on clk_disable(). Some on-chip peripherals (e.g. LCD controller on TNETV107X) need to be put into SwRstDisable = 0 on clock disable, to maintain hardware sanity. This patch extends the davinci_psc_config() arguments to pass in the desired module state instead of a boolean enable/disable. Further, clk_disable() now checks for the PSC_SWRSTDISABLE clk flag before selecting the target state. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: cpintc host map configurationCyril Chemparathy2010-05-064-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Host map configuration instructs the interrupt controller to route interrupt channels to FIQ or IRQ lines. Currently, DA8xx family of devices leave these registers at their reset-default values. TNETV107X however does not have sane reset defaults, and therefore this architecture needs to reconfigure the host-map such that channels 0 and 1 go to FIQ, and the remaining channels raise IRQs. This patch adds an optional host map argument to cp_intc_init() for this. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: enable timer clock before useCyril Chemparathy2010-05-061-3/+3
| | | | | | | | | | | | | | | | timer_init() programs timer64 hardware. The module should ideally be brought out of reset before this happens. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: allow SOCs based on other ARM CPUsCyril Chemparathy2010-05-062-1/+2
| | | | | | | | | | | | | | | | | | Preliminary modification prior to adding support for TNETV107X based on ARM1176. This change allows for CPUs other than ARM926T to be used for Davinci derivative SoCs. Existing devices (DA8x and DMx) operate unchanged. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * rtc: omap: let device wakeup capability be configured from chip init logicSekhar Nori2010-05-061-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rtc-omap driver currently hardcodes the RTC wakeup capability to be "not capable". While this seems to be true for existing OMAP1 boards which are not wired for this, the DA850/OMAP-L138 SoC, the RTC can always be wake up source from its "deep sleep" mode. This patch lets the wakeup capability to be set from platform data and does not override the setting from the driver. For DA850/OMAP-L138, this is done from arch/arm/mach-davinci/devices-da8xx.c:da8xx_register_rtc() Note that this patch does not change the behavior on any existing OMAP1 board since the platform device registration sets the wakeup capability to 0 by default. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * RTC: DaVinci RTC driverMiguel Aguilar2010-05-063-0/+684
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver features: * Alarm support. * Periodic interrupt by using a timer include into the RTC module. * The update interrupt is not supported by this RTC module. This driver was tested on a DM365 EVM by using the rtc-test application from the Documentation/rtc.txt. Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Alessandro Zummo <a.zummo@towertech.it>
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