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The powerpc kernel always requires an Open Firmware like device tree
to supply device information. On systems without OF, this comes from
a flattened device tree blob. This blob is usually generated by dtc,
a tool which compiles a text description of the device tree into the
flattened format used by the kernel. Sometimes, the bootwrapper makes
small changes to the pre-compiled device tree blob (e.g. filling in
the size of RAM). To do this it uses the libfdt library.
Because these are only used on powerpc, the code for both these tools
is included under arch/powerpc/boot (these were imported and are
periodically updated from the upstream dtc tree).
However, the microblaze architecture, currently being prepared for
merging to mainline also uses dtc to produce device tree blobs. A few
other archs have also mentioned some interest in using dtc.
Therefore, this patch moves dtc and libfdt from arch/powerpc into
scripts, where it can be used by any architecture.
The vast bulk of this patch is a literal move, the rest is adjusting
the various Makefiles to use dtc and libfdt correctly from their new
locations.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/configfs
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/configfs:
configfs: Fix Trivial Warning in fs/configfs/symlink.c
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I observed the following build warning with fs/configfs/symlink.c:
fs/configfs/symlink.c: In function 'configfs_symlink':
fs/configfs/symlink.c:138: warning: 'target_item' may be used uninitialized in this function
Here is a small fix for this.
Cc: Patrick Mochel <mochel@osdl.org>
Cc: Balbir Singh <balbir@linux.vnet.ibm.com>
Cc: Sachin P Sant <sachinp@linux.vnet.ibm.com>
Signed-Off-By: Subrata Modak <subrata@linux.vnet.ibm.com>
Signed-off-by: Joel Becker <joel.becker@oracle.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6:
ide-cd: fix REQ_QUIET tests in cdrom_decode_status
Fix up trivial conflicts in include/linux/blkdev.h
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Original patch (dfa4411cc3a690011cab90e9a536938795366cf9) was buggy.
This is a more proper fix which introduces blk_rq_quiet() macro
alleviating the need for dumb, too short caching variables.
Thanks to Helge Deller and Bart for debugging this.
Signed-off-by: Borislav Petkov <petkovbb@gmail.com>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Reported-and-tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)
[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data
[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is created
[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch
[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail
davinci: DM644x: NAND: update partitioning
davinci: update DM644x support in preparation for more SoCs
davinci: DM644x: rename board file
davinci: update pin-multiplexing support
davinci: serial: generalize for more SoCs
davinci: DM355 IRQ Definitions
davinci: DM646x: add interrupt number and priorities
davinci: PSC: Clear bits in MDCTL reg before setting new bits
davinci: gpio bugfixes
davinci: add EDMA driver
davinci: timers: use clk_get_rate()
[ARM] pxa/littleton: add missing da9034 touchscreen support
[ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expanders
[ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not working
[ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNC
[ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbol
...
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with stale data
This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds a workaround for the 458693 Cortex-A8 (r2p0)
erratum. It sets the corresponding bits in the auxiliary control
register so that the PLD instruction becomes a NOP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2)
erratum. The BTAC/BTB is now flushed at every context switch.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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can fail
This patch implements the recommended workaround for erratum 411920
(ARM1136, ARM1156, ARM1176).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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GPIO17_SDATA_IN_1 and GPIO36_SDATA_IN_1 are originally designed for the 2nd
codec but unused on the board, yet they are initialized incorrectly by the
bootloader as the SDATA_IN_1 alternate function, thus causing AC97 fail to
work. Fix this issue by configuring these pins as normal GPIO to avoid the
noise from these pins being treated as signals from the 2nd codec.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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cpufreq drivers for pxa2xx/3xx are now built-in automatically as soon as
CPU_FREQ is enabled.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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ARCH_PXA selects HAVE_CLK and COMMON_CLKDEV twice in arch/arm/Kconfig.
Remove the second entry.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs
(0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect.
Actually, only those bits should get updated if the corresponding bits are
set in c->irq_mask as well. Fix this by updating only those relevant bits.
Reported-and-tested-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
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Update NAND partitioning for the dm6446 evm, unmasking the hidden
data at the beginning and letting the kernel be updated from Linux.
- This is boot-compatible with TI's software (U-Boot 1.20 and both
the 2.6.10 and 2.6.18 kernels), in terms of startup and loading
kernels from flash.
- In the same way, it's also boot-compatible with mainline U-Boot,
which stores U-Boot params in block 0 not block 16.
- It's not quite compatible with systems that previously used NAND
partitions to hold (filesystem) data. The compatibilities are a
bit different based on which kernel was used previously
+ Users of TI/MV kernels no longer see mtd2 "params"
(mainline u-boot env is in a different place)
* Filesystem is now mtd2 ... vs mtd3
+ Users of GIT kernels now see mtd0 and mtd1 partitions
* Filesystem partition starts 640 KBytes earlier
* Filesystem is now mtd2 ... vs mtd0
* Linux now *uses* the flash-resident BBT
* Removes annoying slowdown/hiccup during boot
* Potentially ~64KB less space available with TI/MV kernels
If you *used* NAND partitions from Linux, there is no solution that's
fully compatible with all previous kernels in those respects ... ergo
this "best compromise". It'd be good to back back up the filesystem
data; or, carry your own backwards-compatibility patch for awhile.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Rework DM644x code into SoC specific and board specific parts.
This is also to generalize the structure a bit so it's easier to add
support for new SoCs in the DaVinci family.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Rename DM6446 EVM board file, no functional changes. Code is updated
and reworked in following patch.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Update MUX support to be more general and useful across multiple
SoCs in the DaVinci family.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Adding IRQ defintions for DaVinci DM355 and default interrupt
priorities for DM355
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Clear any set bits in the 'NEXT' field of the MDCTL register in the
Power and Sleep Controller (PSC) before setting any new bits.
This also allows some minor cleanup by removing some no longer
needed lines of code.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Update the DaVinci GPIO code to work better on non-dm6446 parts,
notably the dm355:
- Only handle the number of GPIOs the chip actually has. So
for example on dm6467, GPIO-42 is the last GPIO, and trying
to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446.
- Enable GPIO interrupts on each 16-bit GPIO-irq bank ...
previously, only the first five were enabled, so GPIO-80
and above (on dm355) wouldn't trigger IRQs.
- Use the right IRQ for each GPIO bank. The wrong values were
used for dm355 chips, so GPIO IRQs got routed incorrectly.
- Handle up to four pairs of 16-bit GPIO banks ... previously
only three were handled, so accessing GPIO-96 and up (e.g. on
dm355) would oops.
- Update several comments that were dm6446-specific.
Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs
on the DM355 EVM.
One thing this doesn't do is handle the way some of the GPIO
numbers on dm6467 are reserved but aren't valid as GPIOs. Some
bitmap logic could fix that if needed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Original code for 2.6.10 and 2.6.28 series done by Texas Instruments
and MontaVista, but major updates and rework done by Troy Kisky and
David Brownell.
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Use clock framework instead of hard-coded CLOCK_TICK_RATE for
determining timer tick frequencies.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Add arch-specific ioremap() which uses any existing static mappings in
place of doing a new mapping. From now on, drivers should always use
ioremap() instead of IO_ADDRESS().
In addition, remove the davinci_[read|write]* macros in favor of using
ioremap.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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This is a significant rework of the low-level clock, PLL and Power
Sleep Controller (PSC) implementation for the DaVinci family. The
primary goal is to have better modeling if the hardware clocks and
features with the aim of DVFS functionality.
Highlights:
- model PLLs and all PLL-derived clocks
- model parent/child relationships of PLLs and clocks
- convert to new clkdev layer
- view clock frequency and refcount via /proc/davinci_clocks
Special thanks to significant contributions and testing by David
Brownell.
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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arch/arm/mach-sa1100/lart.c:36: error: 'PAGE_SHIFT' undeclared here (not in a function)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
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Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
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All GP timers on OMAP2/3 can generate wakeup events. The wakeup status is
cleared in the PRCM interrupt handler.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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GPTIMER12 IRQ is at IRQ 95 on OMAP3, unlike OMAP2. (ref: OMAP34xx
Multimedia High Security (HS) Device Silicon Revision 3.0 Security
Addendum Rev. B, SWPU119B)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Typo error when requesting for clock for dsp in omap1
Signed-off-by: Arun KS <arunks@mistralsolutions.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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This patch avoids waiting for the camera module to become ready,
since it doesn't have IDLEST bit.
Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on
linux-omap tree.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Commit 8ad8ff6548f1c0bcbeaa02f274b3927c5015a921 breaks the OMAP2xxx
cpu_mask code, which causes OMAP2xxx to panic on boot. Fix by
removing the cpu_mask auto variable and by changing CK_242X
and CK_243X to use RATE_IN_242X/RATE_IN_243X.
Resolves
<1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c
<1>pgd = c0004000
<1>[0000000c] *pgd=00000000
Internal error: Oops: 5 [#1]
Modules linked in:
CPU: 0 Not tainted (2.6.29-omap1 #32)
PC is at omap2_clk_set_parent+0x104/0x120
LR is at omap2_clk_set_parent+0x28/0x120
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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Commit 3f0a820c4c0b4670fb5f164baa5582e23c2ef118 breaks OMAP2xxx boot
during initial propagate_rate() on osc_ck and sys_ck. Fix by
pre-initializing all struct clks before running any other clock init
code. Incorporates review comments from Russell King
<rmk+kernel@arm.linux.org.uk>.
Resolves
<1>Unable to handle kernel NULL pointer dereference at virtual address 00000000
<1>pgd = c0004000
<1>[00000000] *pgd=00000000
Internal error: Oops: 5 [#1]
Modules linked in:
CPU: 0 Not tainted (2.6.29-omap1 #37)
PC is at propagate_rate+0x10/0x60
LR is at omap2_clk_init+0x30/0x218
...
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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SPURIOUSIRQ is contained in bits 31:7 of INTC_SIR, so
INTC_SIR must be right shifted by 7, not 6.
No change in logic, only changes for better readability.
Refer to register definition of INTCPS_SIR_IRQ in OMAP3 Manual.
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Flush posted write to IRQSTATUS register in GPIO IRQ handler.
This eliminates the below error for all peripherals that use GPIO interrupts.
<4>Spurious irq 95: 0xffffffdf, please flush posted write for irq 31
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Removed duplicated #include in arch/arm/mach-omap2/board-rx51.c.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The GPIO IRQ enable/disable path attempts to also enable IRQ wake
support for the parent GPIO bank IRQ as well. However, since there is
no 'set_wake' hook for the bank IRQs, these calls will always fail.
Also, since the enable will fail on the suspend path, the disable on
the resume path will trigger unbalanced enable/disable warnings.
This was discovered in the suspend/resume path on OMAP3/Beagle using
the gpio-keys driver which disables/re-enables GPIO IRQ wakeups in the
suspend/resume path.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In linus' git tree the functions can be found at:
vi arch/arm/mach-omap2/usb-tusb6010.c +200 - tusb6010_platform_retime()
vi arch/arm/mach-omap2/gpmc.c +94 - gpmc_get_fclk_period()
vi arch/arm/mach-omap2/usb-tusb6010.c +53 - tusb_set_async_mode()
vi arch/arm/mach-omap2/usb-tusb6010.c +111 - tusb_set_sync_mode()
is -ENODEV appropriate when sysclk_ps == 0?
This was found by code analysis, please review.
------------------------------>8-------------8<---------------------------------
gpmc_get_fclk_period() may return 0 when gpmc_l3_clk is not enabled. This is
not checked in tusb6010_platform_retime() nor in tusb_set_async_mode() it
seems. In tusb_set_sync_mode() this may result in a division by zero.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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There is no anymore legacy driver for OMAP24XX Enhanced Audio Controller
in linux-omap and it was newer in mainline so cleanup these unneeded
defines and initialization code.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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