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* sh: Terminate .eh_frame in VDSO with a 4-byte 0.Kaz Kojima2007-11-021-1/+4
| | | | | | | | | | | | | It's assumed that .eh_frame is terminated with 4-byte 0 in shared libraries and executable. It seems to be the case for VDSOs too. Without this terminator, I saw failures when unwinding from VDSO, though I don't know how other architectures handle this issue. For the normal libs, crtendS.o gives this terminator. We can use such terminating objects. Or we can add a 4-byte 0 with modifying the linker script like as the patch below. Signed-off-by: Kaz Kojima <kkojima@rr.iij4u.or.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Correct SUBARCH matching.Paul Mundt2007-11-021-1/+2
| | | | | | | | | When configuring the kernel natively the uname matching is off, so fix up the uname mangling to get the proper SUBARCH. Needs an explicit range so that SH-5 doesn't break. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Decouple 4k and soft/hardirq stacks.Paul Mundt2007-11-023-5/+13
| | | | | | | | | | | While using separate IRQ stacks can cut down on stack consumption, many users can also use 4k stacks directly without the additional need of separate stacks for soft and hardirqs. With this split, we support the same rationale for 4KSTACKS as m68knommu, with the IRQSTACKS abstraction as per ppc64. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix optimized __copy_user() movca.l usage.Stuart Menefy2007-11-021-0/+4
| | | | | | | | | | | movca.l is restricted to SH-4 and up only, though compilers that are unable to support ISA tuning (especially older versions of binutils) will happily compile in the bogus opcode on older parts. Conditionalize it to fix SH-3 regressions noted by Kristoffer. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Clean up SR.RB Kconfig mess.Paul Mundt2007-10-311-3/+1
| | | | | | | | | | | | | CPU_HAS_SR_RB is selected by both CPU_SH3 and CPU_SH4, so having a dependency and default y on those additionally doesn't make much sense. The select also has to be special cased for CPUs that don't support this. This is also something that has been abused too much as a result of being user-visible, hence the addition of the select in the first place. So just kill the user-visibility entirely while we're at it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off dead ipr_irq_demux().Paul Mundt2007-10-311-9/+0
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Make SH7750 oprofile compile again.Paul Mundt2007-10-301-15/+7
| | | | | | | | | Converts from the profile notifier to the timer hook. Follows the generic timer interrupt-based change. This really wants to be converted to perfmon.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Provide a __read_mostly section wrapper.Paul Mundt2007-10-301-0/+2
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: linker script tidying.Paul Mundt2007-10-301-93/+104
| | | | | | | | Some cleanups to the SH linker script. This reorders some of the data sections for more optimal placement, general tabification, and plugging in omitted generic definitions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move zero page param defs somewhere sensible.Paul Mundt2007-10-302-16/+23
| | | | | | Follows s390 and others. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use generic SMP_CACHE_BYTES/L1_CACHE_ALIGN.Paul Mundt2007-10-302-4/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off legacy embedded ramdisk section.Paul Mundt2007-10-302-22/+1
| | | | | | | | | When the SH kernel used to support embedding a ramdisk in the pre-initramfs days it was placed in a special section and made to look like a regular initrd. Since that was removed ages ago, kill off the remaining cruft that was missed. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up early mem cmdline parsing.Paul Mundt2007-10-301-3/+3
| | | | | | | | | memory_end was being clobbered by whatever the kernel config had specified, rather than obeying the setup option. Fix this up so that memory_end is only initialized if nothing has been set on the command line. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Enable USBF on MS7722SE.Yoshihiro Shimoda2007-10-301-2/+2
| | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add resource of USBF for SH7722.Yoshihiro Shimoda2007-10-301-0/+27
| | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* maple: Fix maple bus compiler warningAdrian McMenamin2007-10-301-2/+1
| | | | | | | | The uevent API has changed from 2.6.22 and this patch eliminates annoying compiler errors Signed off by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix zImage build with >=binutils-2.18Manuel Lauss2007-10-301-1/+1
| | | | | | | | | | Starting with binutils somewhere around 2.17.50.14 the vmlinux file contains a ".note.gnu.build-id" section which doesn't get removed when the zImage is built; resulting in a 2GB intermediate file and a broken zImage. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: ARRAY_SIZE() cleanupAlejandro Martinez Ruiz2007-10-301-2/+2
| | | | | | | | I'm converting most array size calculations under arch/ to use the ARRAY_SIZE() macro. This is the (tiny) patch for sh. Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Correct pte_page() breakage.Paul Mundt2007-10-302-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As noted by David: pte_page() is a macro defined as follows; include/asm-sh/pgtable.h #define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) include/asm-sh/page.h #define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) So as you can see the phys_to_page() macro doesn't wrap the 'phys' parameter in parentheses so we end up with; pte_val(x)&PTE_PHYS_MASK >> PAGE_SHIFT Which is not what we wanted as '>>' has a higher precedence than bitwise AND. I dug into the git repository and I believe this bug was added with this commit (104b8deaa5c0144cccfc7d914413ff80c7176af1); 2006-03-27 KAMEZAWA Hiroyuki [PATCH] unify pfn_to_page: sh pfn_to_page -#define phys_to_page(phys) (mem_map + (((phys)-__MEMORY_START) >> PAGE_SHIFT)) -#define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START) +#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) +#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) Reported-by: David ADDISON <david.addison@st.com> Reported-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Clean up Kconfig entry for Dreamcast.Adrian McMenamin2007-10-301-3/+1
| | | | | | | Remove reference to out of date/rotting websites. Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add support for ax88796 and 93cx6 to highlander boardsMagnus Damm2007-10-301-0/+40
| | | | | | | | | | This patch adds support for the ax88796 driver on highlander boards. Implemented using the 93cx6 EEPROM support introduced by commit-id 89e536a190f90d038bae7905a0c582cb7089b739. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-10-2956-514/+773
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (34 commits) [MIPS] tb0219: Update copyright message. [MIPS] MT: Fix bug in multithreaded kernels. [MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs. Author: Ralf Baechle <ralf@linux-mips.org> [MIPS] sb1250: Enable GenBus IDE in defconfig. [MIPS] vmlinux.ld.S: correctly indent .data section [MIPS] c-r3k: Implement flush_cache_range() [MIPS] Store sign-extend register values for PTRACE_GETREGS [MIPS] Alchemy: Register platform devices [MIPS] Add len and addr validation for MAP_FIXED mappings. [MIPS] IRIX: Fix off-by-one error in signal compat code. [MIPS] time: Replace plat_timer_setup with modern APIs. [MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver. [MIPS] time: Make c0_compare_int_usable faster [MIPS] time: Fix cevt-r4k.c for 64-bit kernel [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq(). [MIPS] txx9tmr clockevent/clocksource driver [MIPS] Add mips_hpt_frequency check to mips_clockevent_init(). [MIPS] IP32: Fixes after interrupt renumbering. [MIPS] IP27: Fix slice logic to work for arbitrary number of slices. ...
| * [MIPS] tb0219: Update copyright message.Ralf Baechle2007-10-291-1/+1
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] MT: Fix bug in multithreaded kernels.Ralf Baechle2007-10-291-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When GDB writes a breakpoint into address area of inferior process the kernel needs to invalidate the modified memory in the inferior which is done by calling flush_cache_page which in turns calls r4k_flush_cache_page and local_r4k_flush_cache_page for VSMP or SMTC kernel via r4k_on_each_cpu(). As the VSMP and SMTC SMP kernels for 34K are running on a single shared caches it is possible to get away without interprocessor function calls. This optimization is implemented in r4k_on_each_cpu, so local_r4k_flush_cache_page is only ever called on the local CPU. This is where the following code in local_r4k_flush_cache_page() strikes: /* * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ if (cpu_context(smp_processor_id(), mm) == 0) return; On VSMP and SMTC had a function of cpu_context() for each CPU(TC). So in case another CPU than the CPU executing local_r4k_cache_flush_page has not accessed the mm but one of the other CPUs has there may be data to be flushed in the cache yet local_r4k_cache_flush_page will falsely return leaving the I-cache inconsistent for the breakpoint. While the issue was discovered with GDB it also exists in local_r4k_flush_cache_range() and local_r4k_flush_cache(). Fixed by introducing a new function has_valid_asid which on MT kernels returns true if a mm is active on any processor in the system. This is relativly expensive since for memory acccesses in that loop cache misses have to be assumed but it seems the most viable solution for 2.6.23 and older -stable kernels. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.Ralf Baechle2007-10-298-8/+0
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * Author: Ralf Baechle <ralf@linux-mips.org>Ralf Baechle2007-10-293-3/+3
| | | | | | | | | | | | [MIPS] MSP71xx: Fix bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] sb1250: Enable GenBus IDE in defconfig.Maciej W. Rozycki2007-10-291-1/+1
| | | | | | | | | | | | | | Enable the onboard GenBus IDE interface in the default configuration. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] vmlinux.ld.S: correctly indent .data sectionFranck Bui-Huu2007-10-291-15/+17
| | | | | | | | | | Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] c-r3k: Implement flush_cache_range()Maciej W. Rozycki2007-10-291-28/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Contrary to the belief of some, the R3000 and related processors did have caches, both a data and an instruction cache. Here is an implementation of r3k_flush_cache_page(), which is the processor-specific back-end for flush_cache_range(), done according to the spec in Documentation/cachetlb.txt. While at it, remove an unused local function: get_phys_page(), do some trivial formatting fixes and modernise debugging facilities. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Store sign-extend register values for PTRACE_GETREGSAtsushi Nemoto2007-10-292-11/+11
| | | | | | | | | | | | | | | | | | A comment on ptrace_getregs() states "Registers are sign extended to fill the available space." but it is not true. Fix code to match the comment. Also fix casts on each caller to get rid of some warnings. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Alchemy: Register platform devicesFlorian Fainelli2007-10-292-0/+87
| | | | | | | | | | | | | | | | | | | | This patch separates the platform devices registration for the MTX-1 specific devices: GPIO leds and watchdog. [Minor fixup and formatting change -- Ralf] Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Add len and addr validation for MAP_FIXED mappings.David Daney2007-10-291-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mmap with MAP_FIXED was not validating the addr and len parameters. This leads to the failure of GCC's gcc.c-torture/execute/loop-2[fg].c testcases when using the o32 ABI on a 64 bit kernel. These testcases try to mmap 65536 bytes at 0x7fff8000 and then access all the memory. In 2.6.18 and 2.6.23.1 (and likely other versions as well) the kernel maps the requested memory, but since half of it is above 0x80000000 a SIGBUS is generated when it is accessed. This patch moves the len validation above the MAP_FIXED processing so that it is always validated. It also adds validation to the addr parameter for MAP_FIXED mappings. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] IRIX: Fix off-by-one error in signal compat code.Ralf Baechle2007-10-291-2/+6
| | | | | | | | | | | | Based on original patch by Roel Kluin <12o3l@tiscali.nl>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Replace plat_timer_setup with modern APIs.Ralf Baechle2007-10-294-67/+63
| | | | | | | | | | | | plat_timer_setup is no longer getting called. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.Ralf Baechle2007-10-292-2/+2
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Make c0_compare_int_usable fasterAtsushi Nemoto2007-10-291-4/+10
| | | | | | | | | | | | | | Try increasingly longer time periods starting of at 0x10 cycles. This should be fast on hardware and work nicely with emulators. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Fix cevt-r4k.c for 64-bit kernelAtsushi Nemoto2007-10-291-2/+2
| | | | | | | | | | | | | | | | The expression "(long)(read_c0_count() - cnt)" can never be a negative value on 64-bit kernel. Cast to "int" before comparison. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().Ralf Baechle2007-10-294-54/+0
| | | | | | | | | | | | | | | | | | They break the timer interrupt initialization and only seem to be a kludge for initialization happening in the wrong order. Further testing done by Thiemo confirms the suspicion that the other invocations also seem to have useless. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] txx9tmr clockevent/clocksource driverAtsushi Nemoto2007-10-2912-145/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert jmr3927_clock_event_device to more generic txx9tmr_clock_event_device which supports one-shot mode. The txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer interrupt was not available. Convert jmr3927_hpt_read to txx9_clocksource driver which does not depends jiffies anymore. The txx9_clocksource itself can be used for TX49, but normally TX49 uses higher precision clocksource_mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Add mips_hpt_frequency check to mips_clockevent_init().Yoichi Yuasa2007-10-291-1/+1
| | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] IP32: Fixes after interrupt renumbering.Ralf Baechle2007-10-292-52/+80
| | | | | | | | | | | | And general untangling. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] IP27: Fix slice logic to work for arbitrary number of slices.Ralf Baechle2007-10-291-4/+7
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] SNI: Convert a20r timer to clockevent device.Ralf Baechle2007-10-291-16/+64
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Merge eXcite plat_timer_setup into plat_time_init.Ralf Baechle2007-10-291-11/+10
| | | | | | | | | | | | | | Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how to handle the alternate timer interrupt of the RM9000. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Merge lasat plat_timer_setup into plat_time_init.Ralf Baechle2007-10-291-5/+2
| | | | | | | | | | | | | | | | Since the cp0 compare interrupt handler isn't initialized by the time plat_time_init is called don't set IE_IRQ5 anymore, cevt-r4k.c will do that a little later itself. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Remove wrppmc's definition of plat_timer_setup.Ralf Baechle2007-10-291-6/+0
| | | | | | | | | | | | The only thing it used to do is now done by cevt-r4k.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Cause platform definitions of plat_timer_setup to cause error.Ralf Baechle2007-10-291-5/+12
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] time: Remove declaration of plat_timer_setup, there is no caller.Ralf Baechle2007-10-291-1/+0
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Alchemy: Convert from plat_timer_setup to plat_time_init.Ralf Baechle2007-10-291-1/+1
| | | | | | | | | | | | | | The old plat_timer_setup hook is no longer getting called so the Alchemy time initialization was getting skipped. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] vpe: Use p_paddr instead of p_vaddr loader.Ralf Baechle2007-10-291-2/+2
| | | | | | | | | | | | This subtle difference makes ELF overlays work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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