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* Merge branch 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6Linus Torvalds2007-08-183-26/+36
|\ | | | | | | | | | | | | | | * 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6: hwmon: (smsc47m1) restore missing name attribute hwmon: (w83627ehf) don't assume bank 0 hwmon: (w83627ehf) read fan_div values during probe hwmon: fix w83781d temp sensor type setting
| * hwmon: (smsc47m1) restore missing name attributeJean Delvare2007-08-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smsc47m1 driver no longer creates the name attribute used by libsensors to identify chip types. It was lost during the conversion to a platform driver. I was fooled by the fact that we do have a group with all attributes, but only to delete them all at once. The group is not used to create the attributes, so we have to explicitly create the name attribute. This fixes lm-sensors ticket #2236: http://lm-sensors.org/ticket/2236 Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
| * hwmon: (w83627ehf) don't assume bank 0Jean Delvare2007-08-121-5/+3
| | | | | | | | | | | | | | | | | | | | | | Don't assume that the default bank is 0. For one thing, we don't even set it to 0 when the driver is loaded, so the initial state might be different. For another, something (say, the BIOS) might access the chip and leave with the bank set to something different, so assuming that the bank value is 0 is not safe. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
| * hwmon: (w83627ehf) read fan_div values during probeMark M. Hoffman2007-08-121-19/+29
| | | | | | | | | | | | | | | | This patch forces the driver to read the fan divider values during early init. Otherwise, a call to store_fan_min() could access uninitialized variables. Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
| * hwmon: fix w83781d temp sensor type settingMark M. Hoffman2007-08-111-2/+2
| | | | | | | | | | | | | | | | Commit 348753379a7704087603dad403603e825422fd9a introduced a regression that caused temp2 and temp3 sensor type settings to be written to temp1 instead. The result is that temp sensor readings could be way off. Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
* | Merge branch 'release' of ↵Linus Torvalds2007-08-1824-57/+105
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: Cross-compilation between e.g. i386 -> 64bit could break -> work around it [IA64] Enable early console for Ski simulator [IA64] forbid ptrace changes psr.ri to 3 [IA64] Failure to grow RBS [IA64] Fix processor_get_freq [IA64] SGI Altix : fix a force_interrupt bug on altix [IA64] Update arch/ia64/configs/* s/SLAB/SLUB/ [IA64] get back PT_IA_64_UNWIND program header [IA64] need NOTES in vmlinux.lds.S [IA64] make unwinder stop at last frame of the bootloader [IA64] Clean up CPE handler registration [IA64] Include Kconfig.preempt [IA64] SN2 needs platform specific irq_to_vector() function. [IA64] Use atomic64_read to read an atomic64_t. [IA64] disable irq's and check need_resched before safe_halt
| * | Cross-compilation between e.g. i386 -> 64bit could break -> work around itThomas Renninger2007-08-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adrian Bunk: scripts/mod/file2alias.c is compiled with HOSTCC and ensures that kernel_ulong_t is correct, but it can't cope with different padding on different architectures. Signed-off-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Enable early console for Ski simulatorPeter Chubb2007-08-171-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using Ski to debug early startup, it's a bit of a pain not to have printk. This patch enables the simulated console very early. It may be worth conditionalising on the command line... but this is enough for now. Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] forbid ptrace changes psr.ri to 3Shaohua Li2007-08-171-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | The "ri" field in the processor status register only has defined values of 0, 1, 2. Do not let ptrace set this to 3. As with other reserved fields in registers we silently discard the value. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Failure to grow RBSAndrew Burgess2007-08-161-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a bug in the ia64_do_page_fault code that can cause a failure to grow the register backing store, or any mapping that is marked as VM_GROWSUP if the mapping is the highest mapped area of memory. When the address accessed is below the first mapping the previous mapping is returned as NULL, and this case is handled. However, when the address accessed is above the highest mapping the vma returned is NULL, this case is not handled correctly, and it fails to spot that this access might require an existing mapping to grow upwards. Signed-off-by: Andrew Burgess <andrew@transitive.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Fix processor_get_freqAlex Williamson2007-08-151-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core cpufreq code doesn't appear to understand returning -EAGAIN for the get() function of the cpufreq_driver. If PAL_GET_PSTATE returns -1, such as when running on Xen, scaling_cur_freq is happy to return 4294967285 kHz (ie. (unsigned)-11). The other drivers appear to return 0 for a failure, and doing so gives me the max frequency from scaling_cur_frequency and "<unknown>" from cpuinfo_cur_frequency. I believe that's the desired behavior. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] SGI Altix : fix a force_interrupt bug on altixMike Habeck2007-08-131-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | If the interrupt has been disabled, don't call the force_interrupt provider. Doing so can result in an infinite runaway interrupt loop. Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Update arch/ia64/configs/* s/SLAB/SLUB/Christoph Lameter2007-08-137-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The slab allocator was changed in 2.6.23 to default to SLUB. However, the config files in arch/ia64/configs still use SLAB. Switch them to SLUB. Added same change to arch/ia64/defconfig ... Tony Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] get back PT_IA_64_UNWIND program headerDavid Mosberger-Tang2007-08-131-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Explicitly put the unwind section into its own program-header. This used to be unnecessary (probably because binutils did it for us), but with current binutils (e.g., v2.17.50.20070804) we won't get the PT_IA_64_UNWIND header without this patch which will break unwinding in a debugger and simulators such as Ski. Signed-off-by: David Mosberger-Tang <dmosberger@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] need NOTES in vmlinux.lds.SDavid Mosberger-Tang2007-08-131-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NOTES to linker script such that the kernel can be built with recent versions of binutils. Without this patch, final link fails with this error: ld: .tmp_vmlinux1: section `.text' can't be allocated in segment 0 ld: final link failed: Bad value This error is due to the fact that the --build-id option is used with newer linkers to include a .notes section on the kernel, but without the NOTES macro, that section won't be included in the kernel which then leads to the above error message. Signed-off-by: David Mosberger-Tang <dmosberger@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] make unwinder stop at last frame of the bootloaderDavid Mosberger-Tang2007-08-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a dummy nop at the end of _start() to maintain the invariant that the return-pointer (rp) always point to the calling function. This makes unwinding stop at the last frame, as it should. Signed-off-by: David Mosberger-Tang <dmosberger@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Clean up CPE handler registrationRuss Anderson2007-08-131-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use local_vector_to_irq() instead of looping through all NR_IRQS. This avoids registering the CPE handler on multiple irqs. Only register if the irq is valid. If no valid irq is found, print an error message and set up polling. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Include Kconfig.preemptSatyam Sharma2007-08-131-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/ia64/Kconfig failed to include kernel/Kconfig.preempt that meant it did not support PREEMPT_VOLUNTARY and PREEMPT_BKL (inadvertently). This was recently noticed when the newly-added PREEMPT_NOTIFIERS in Kconfig.preempt that was "select"ed from drivers/kvm/Kconfig (therefore) started giving bogus warnings ('select' used by config symbol 'KVM' refers to undefined symbol 'PREEMPT_NOTIFIERS') on ia64 builds. So let's remove the open-coded definition of CONFIG_PREEMPT in arch/ia64/Kconfig and replace it with just including Kconfig.preempt instead, like the other archs do. Signed-off-by: Satyam Sharma <satyam@infradead.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] SN2 needs platform specific irq_to_vector() function.Kenji Kaneshige2007-08-136-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add base support for implementing platform_irq_to_vector(), and then use it on SN2. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Acked-by: John Keller <jpk@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Use atomic64_read to read an atomic64_t.Andreas Schwab2007-08-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The routines ia64_atomic64_{add,sub} mistakenly use atomic_read() to grab the old value instead of using atomic64_read(). Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] disable irq's and check need_resched before safe_haltDimitri Sivanich2007-08-131-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While sending interrupts to a cpu to repeatedly wake a thread, on occasion that thread will take a full timer tick cycle (4002 usec in my case) to wakeup. The problem concerns a race condition in the code around the safe_halt() call in the default_idle() routine. Setting 'nohalt' on the kernel command line causes the long wakeups to disappear. void default_idle (void) { local_irq_enable(); while (!need_resched()) { --> if (can_do_pal_halt) --> safe_halt(); else A timer tick could arrive between the check for !need_resched and the actual call to safe_halt() (which does a pal call to PAL_HALT_LIGHT). By the time the timer tick completes, a thread that might now need to run could get held up for as long as a timer tick waiting for the halted cpu. I'm proposing that we disable irq's and check need_resched again before calling safe_halt(). Does anyone see any problem with this approach? Signed-off-by: Dimitri Sivanich <sivanich@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2007-08-181-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/selinux-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/selinux-2.6: SELinux: correct error code in selinux_audit_rule_init
| * | | SELinux: correct error code in selinux_audit_rule_initSteve G2007-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Corrects an error code so that it is valid to pass to userspace. Signed-off-by: Steve Grubb <linux_4ever@yahoo.com> Signed-off-by: James Morris <jmorris@halo.namei>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2007-08-1815-61/+77
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: IB/mlx4: Incorrect semicolon after if statement mlx4_core: Wait 1 second after reset before accessing device IPoIB: Fix leak in ipoib_transport_dev_init() error path IB/mlx4: Fix opcode returned in RDMA read completion IB/srp: Add OUI for new Cisco targets IB/srp: Wrap OUI checking for workarounds in helper functions RDMA/cxgb3: Always call low level send function via cxgb3_ofld_send() IB: Move the macro IB_UMEM_MAX_PAGE_CHUNK() to umem.c IB: Include <linux/list.h> and <linux/rwsem.h> from <rdma/ib_verbs.h> IB: Include <linux/list.h> from <rdma/ib_mad.h> IB/mad: Fix address handle leak in mad_rmpp IB/mad: agent_send_response() should be void IB/mad: Fix memory leak in switch handling in ib_mad_recv_done_handler() IB/mad: Fix error path if response alloc fails in ib_mad_recv_done_handler() IB/sa: Don't need to check for default P_Key twice IB/core: Ignore membership bit in ib_find_pkey()
| * | | | IB/mlx4: Incorrect semicolon after if statementIlpo Järvinen2007-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A stray semicolon makes us inadvertently ignore the value of err. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@helsinki.fi> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | mlx4_core: Wait 1 second after reset before accessing deviceEli Cohen2007-08-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Put a 1000 msec delay after resetting the device before attempting to do config cycles on it. Not waiting causes system hangs on some chipsets, e.g. Intel E7520, when the driver is loaded. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IPoIB: Fix leak in ipoib_transport_dev_init() error pathJack Morgenstein2007-08-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ipoib_transport_dev_init() calls ipoib_cm_dev_init(), so it needs to call ipoib_cm_dev_cleanup() to unwind that on the error path. Found by Dotan Barak of Mellanox. Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/mlx4: Fix opcode returned in RDMA read completionVu Pham2007-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code has a cut-and-paste error and returns IB_WC_SEND when it should return IB_WC_RDMA_READ. Signed-off-by: Vu Pham <vu@mellanox.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/srp: Add OUI for new Cisco targetsRaghava Kondapalli2007-08-031-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New Cisco IB SRP targets use the Cisco OUI 00-1b-0d but still need the Topspin workarounds. Add this OUI to srp_target_is_topspin(). Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/srp: Wrap OUI checking for workarounds in helper functionsRoland Dreier2007-08-031-9/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wrap the checking for Mellanox and Topspin OUIs to decide whether to use a workaround into helper functions. This will make it cleaner to add a new OUI to check (as we need to do now that some targets with a Cisco OUI still need the Topspin workarounds). Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb3: Always call low level send function via cxgb3_ofld_send()Steve Wise2007-08-031-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids deadlocks. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB: Move the macro IB_UMEM_MAX_PAGE_CHUNK() to umem.cDotan Barak2007-08-032-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After moving the definition of struct ib_umem_chunk from ib_verbs.h to ib_umem.h there isn't any reason for the macro IB_UMEM_MAX_PAGE_CHUNK to stay in ib_verbs.h. Move the macro to umem.c, the only place where it is used. Signed-off-by: Dotan Barak <dotanb@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB: Include <linux/list.h> and <linux/rwsem.h> from <rdma/ib_verbs.h>Dotan Barak2007-08-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ib_verbs.h uses struct list_head and rw_semaphore, so while the files <linux/list.h> and <linux/rwsem.h> seem to be pulled in indirectly by the other header files it includes, the right thing is to include those files directly. Signed-off-by: Dotan Barak <dotanb@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB: Include <linux/list.h> from <rdma/ib_mad.h>Dotan Barak2007-08-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ib_mad.h uses struct list_head, so while linux/list.h seems to be pulled in indirectly by one of the headers it includes, the right thing is to include linux/list.h directly. Signed-off-by: Dotan Barak <dotanb@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/mad: Fix address handle leak in mad_rmppSean Hefty2007-08-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address handle associated with dual-sided RMPP direction switch ACKs is never destroyed. Free the AH for ACKs which fall into this category. Problem was reported by Dotan Barak <dotanb@dev.mellanox.co.il>. Signed-off-by: Sean Hefty <sean.hefty@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/mad: agent_send_response() should be voidHal Rosenstock2007-08-032-17/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nothing looks at the return value of agent_send_response(), so there's no point in returning anything. Signed-off-by: Hal Rosenstock <hal.rosenstock@gmail.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/mad: Fix memory leak in switch handling in ib_mad_recv_done_handler()Hal Rosenstock2007-08-031-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If agent_send_response() returns an error, we shouldn't do anything differently than if it succeeds; setting response to NULL just means that the response buffer gets leaked. Signed-off-by: Suresh Shelvapille <suri@baymicrosystems.com> Signed-off-by: Hal Rosenstock <hal.rosenstock@gmail.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/mad: Fix error path if response alloc fails in ib_mad_recv_done_handler()Hal Rosenstock2007-08-031-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If ib_mad_recv_done_handler() fails to allocate response, then it just printed a warning and continued, which leads to an oops if the MAD is being handled for a switch device, because the switch code uses response without checking for NULL. Fix this by bailing out of the function if the allocation fails. Signed-off-by: Suresh Shelvapille <suri@baymicrosystems.com> Signed-off-by: Hal Rosenstock <hal.rosenstock@gmail.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/sa: Don't need to check for default P_Key twiceRoland Dreier2007-08-031-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that ib_find_pkey() ignores the membership bit of P_Keys, there's no need for ib_sa to look for both 0x7fff and 0xffff in a port's P_Key table. Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | IB/core: Ignore membership bit in ib_find_pkey()Moni Shoua2007-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ib_find_pkey() is used as a replacement for ib_find_cached_pkey(), and the original function ignored the membership bit when searching for a P_Key, so ib_find_pkey() should ignore the bit too. In particular, IPoIB turns on the P_Key membership bit of limited membership P_Keys when creating a child interface and looks for the full membership P_key. This broke if a port was a partial member of a partition when IPoIB switched from ib_find_cached_pkey() to ib_find_pkey(), and this change fixes things again. Signed-off-by: Moni Shoua <monis@voltaire.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
* | | | | Merge branch 'master' of ↵Linus Torvalds2007-08-1821-29/+803
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6 * 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [MATH-EMU]: Fix underflow exception reporting. [SPARC64]: Create a HWCAP_SPARC_N2 and report it to userspace on Niagara-2. [SPARC64]: SMP trampoline needs to avoid %tick_cmpr on sun4v too. [SPARC64]: Do not touch %tick_cmpr on sun4v cpus. [SPARC64]: Niagara-2 optimized copies. [SPARC64]: Allow userspace to get at the machine description. [SPARC32]: Remove superfluous 'kernel_end' alignment on sun4c. [SPARC32]: Fix bogus ramdisk image location check. [SPARC32]: Remove iommu from struct sbus_bus and use archdata like sparc64.
| * | | | | [MATH-EMU]: Fix underflow exception reporting.David S. Miller2007-08-164-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The underflow exception cases were wrong. This is one weird area of ieee1754 handling in that the underflow behavior changes based upon whether underflow is enabled in the trap enable mask of the FPU control register. As a specific case the Sparc V9 manual gives us the following description: -------------------- If UFM = 0: Underflow occurs if a nonzero result is tiny and a loss of accuracy occurs. Tininess may be detected before or after rounding. Loss of accuracy may be either a denormalization loss or an inexact result. If UFM = 1: Underflow occurs if a nonzero result is tiny. Tininess may be detected before or after rounding. -------------------- What this amounts to in the packing case is if we go subnormal, we set underflow if any of the following are true: 1) rounding sets inexact 2) we ended up rounding back up to normal (this is the case where we set the exponent to 1 and set the fraction to zero), this should set inexact too 3) underflow is set in FPU control register trap-enable mask The initially discovered example was "DBL_MIN / 16.0" which incorrectly generated an underflow. It should not, unless underflow is set in the trap-enable mask of the FPU csr. Another example, "0x0.0000000000001p-1022 / 16.0", should signal both inexact and underflow. The cpu implementations and ieee1754 literature is very clear about this. This is case #2 above. However, if underflow is set in the trap enable mask, only underflow should be set and reported as a trap. That is handled properly by the prioritization logic in arch/sparc{,64}/math-emu/math.c:record_exception(). Based upon a report and test case from Jakub Jelinek. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC64]: Create a HWCAP_SPARC_N2 and report it to userspace on Niagara-2.David S. Miller2007-08-161-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC64]: SMP trampoline needs to avoid %tick_cmpr on sun4v too.David S. Miller2007-08-161-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC64]: Do not touch %tick_cmpr on sun4v cpus.David S. Miller2007-08-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This register is not a part of the sun4v architecture. Niagara 1 and 2 happened to leave it around. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC64]: Niagara-2 optimized copies.David S. Miller2007-08-168-1/+716
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bzero/memset implementation stays the same as Niagara-1. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC64]: Allow userspace to get at the machine description.David S. Miller2007-08-151-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like the OF device tree, it's useful to let userland get at the machine description so it can pretty print the graph etc. The implementation is a simple MISC device with a read method. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC32]: Remove superfluous 'kernel_end' alignment on sun4c.Mark Fortescue2007-08-141-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In sun4c_init_clean_mmu(), aligning 'kernel_end' using SUN4C_REAL_PGDIR_ALIGN() is unnecessary since the caller does this already. In sun4c_paging_init(), 4 page sizes of "fluff" were added to the address of &end. This was necessary a long time ago when sparc32 would allocate some early data structures by carving out memory chunks after &end but that no longer occurs. Signed-off-by: Mark Fortescue <mark@mtfhpc.demon.co.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC32]: Fix bogus ramdisk image location check.Mark Fortescue2007-08-141-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mirrors sparc64 commit 715a0ecc29c850d2b2f76e1803d3f22cd5a0ac0d sparc_ramdisk_image should always be decremented by KERNBASE. Signed-off-by: Mark Fortescue <mark@mtfhpc.demon.co.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | | | [SPARC32]: Remove iommu from struct sbus_bus and use archdata like sparc64.Robert Reif2007-08-104-16/+16
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | Signed-off-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
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