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*-----. Merge remote-tracking branches 'spi/topic/fsl-cspi', 'spi/topic/fsl-dspi', ↵Mark Brown2015-04-117-10/+84
|\ \ \ \ | | | | | | | | | | | | | | | 'spi/topic/imx' and 'spi/topic/of-id' into spi-next
| | | | * spi: constify of_device_id arrayFabian Frederick2015-03-173-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: spi-imx: use correct enumeration typeStefan Agner2015-03-031-2/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fourth argument of dmaengine_prep_slave_sg needs to be of the enumeration type dma_transfer_direction instead of dma_data_direction. Since the used enumeration values actually stay the same, this is not an actual issue at runtime. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | Merge branch 'fix/fsl-dspi' of ↵Mark Brown2015-04-071-0/+2
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi Conflicts: drivers/spi/spi-fsl-dspi.c
| | * | | spi: fsl-dspi: Add ~50ns delay between cs and sckAaron Brice2015-04-061-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add delay between chip select and clock signals, before clock starts and after clock stops. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: fsl-dspi: Add cs-sck delaysAaron Brice2015-04-061-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay properties to support delays before and after starting the clock in a transfer. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: fsl-dspi: Fix clock rate scale valuesAaron Brice2015-03-311-14/+21
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous algorithm had an outer loop with the values {2,3,5,7} and an inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first value over the required scaling value (where the total scale was the two numbers multiplied). Since the inner loop went up to 32768 it would always pick a value of 2 for PBR and a much higher than necessary value for BR. The desired scale factor was being divided by two I believe to compensate for the much higher scale factors (the divide by two not specified in the reference manual). Updated to check all values and find the smallest scale factor possible without going over the desired clock rate. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: fsl-imx-cspi: add explicit compatible strings and required clock propertiesMatt Porter2015-03-051-1/+11
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fsl-imx-cspi binding contains language indicating compatible strings to be used that is not valid for all supported parts e.g. Should be "fsl,<soc>-cspi" or "fsl,<soc>-ecspi". Fix this by enumerating the set of valid compatible strings. The binding is also missing the clocks/clock-names properties so document these and the two required ipg and per clocks. Signed-off-by: Matt Porter <mporter@konsulko.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-----. \ \ Merge remote-tracking branches 'spi/topic/blackfin', 'spi/topic/cadence', ↵Mark Brown2015-04-1112-2170/+221
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/dw' and 'spi/topic/err' into spi-next
| | | | * | | spi: Make master->handle_err() callback optional to avoid crashesGeert Uytterhoeven2015-04-072-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a driver doesn't implement the master->handle_err() callback and an SPI transfer fails, the kernel will crash with a NULL pointer dereference: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0003000 [00000000] *pgd=80000040004003, *pmd=00000000 Internal error: Oops: 80000206 [#1] SMP ARM Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.0.0-rc7-koelsch-05861-g1fc9fdd4add4f783 #1046 Hardware name: Generic R8A7791 (Flattened Device Tree) task: eec359c0 ti: eec54000 task.ti: eec54000 PC is at 0x0 LR is at spi_transfer_one_message+0x1cc/0x1f0 Make the master->handle_err() callback optional to avoid the crash. Also fix a spelling mistake in the callback documentation while we're at it. Fixes: b716c4ffc6a2b0bf ("spi: introduce master->handle_err() callback") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw: fix crash on setup stageAndy Shevchenko2015-03-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 1a7b7ee72c21 (spi: Ensure that CS line is in non-active state after spi_setup()) introduces an unconditional call of spi_set_cs() before ->setup(). The dw_spi_set_cs() relies on that fact that ->setup() is already called, but it doesn't now. This patch fixes the crash by adding an additional check to dw_spi_set_cs(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | dmaengine: intel-mid-dma: remove the driverAndy Shevchenko2015-03-175-1836/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the last and the only user of this driver is converted to use dw_dmac we can remove driver from the tree. Moreover, besides the driver is unmaintained a long time, it serves for the DesignWare DMA IP, for which we have already driver in the tree. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-spi: Convert 16bit accesses to 32bit accessesThor Thayer2015-03-173-27/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Altera's Arria10 SoC interconnect requires a 32-bit write for APB peripherals. The current spi-dw driver uses 16-bit accesses in some locations. This patch converts all the 16-bit reads and writes to 32-bit reads and writes. Additional Documentation to Support this Change: The DW_apb_ssi databook states: "All registers in the DW_apb_ssi are addressed at 32-bit boundaries to remain consistent with the AHB bus. Where the physical size of any register is less than 32-bits wide, the upper unused bits of the 32-bit boundary are reserved. Writing to these bits has no effect; reading from these bits returns 0." [1] [1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a) Request for test with platforms using the DesignWare SPI IP. Tested On: Altera CycloneV development kit Altera Arria10 development kit Compile tested for build errors on x86_64 (allyesconfigs) Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Reviewed-and-tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-spi: Single Register read to clear IRQsThor Thayer2015-03-091-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of clearing the RxU, RxO, and TxO IRQs individually with 3 register reads, a single read of the ICR register will do the same thing. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-mid: convert to use dw_dmac instead of intel_mid_dmaAndy Shevchenko2015-03-093-29/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | intel_mid_dma seems to be unmaintained for a long time. Moreover, the IP block of DMA itself is the same in both dw_dmac and intel_mid_dma. This patch moves spi-dw-midpci to use dw_dmac driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-mid: move to use core SPI DMA mappingsAndy Shevchenko2015-03-093-66/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI core has a comprehensive function set to map and unmap a message when it's needed. This patch converts driver to use that advantage. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-mid: clear ongoing DMA transfers on timeoutAndy Shevchenko2015-03-093-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch shuts up any ongoing DMA transfer in case of error. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-mid: take care of FIFO overrun/underrun when do DMAAndy Shevchenko2015-03-091-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In according to documentation SPI in DMA mode may encounter underrun/overrun failures in rare cases. When such failure occurs, an error recovery protocol is expected to be implemented in the device driver so that the failed transaction can be restarted. This patch enables FIFO overrun / underrun interrupts in DMA case and adds a handler for that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-mid: split dma_setup() from dma_transfer()Andy Shevchenko2015-03-093-23/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch splits DMA preparatory code to dma_setup() callback. The change also converts transfer_one() to program DMA whenever the transfer is DMA mapped. The change is a follow up of the converion to use SPI core transfer_one_message(). Since the DMA mapped transfers can be interleaved with PIO ones the DMA related configuration should respect that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: dw-mid: convert value of dma_width to enum dma_slave_buswidthAndy Shevchenko2015-03-092-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMAEngine has a specific type to be used for bus width. This patch converts the code to use the values of the specific type when configure DMA transfer. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | Merge branch 'fix/dw' of ↵Mark Brown2015-03-093-6/+14
| | | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
| | | * | | | | spi: dw: move to SPI core message handlingAndy Shevchenko2015-03-063-164/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes a lot of duplicate code since SPI core provides a nice message handling. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | Merge branch 'topic/err' of ↵Mark Brown2015-03-062-0/+7
| | | |\ \ \ \ \ | | | | | |/ / / | | | | |/| | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
| | | * | | | | spi: dw: program registers as soon as possibleAndy Shevchenko2015-03-061-23/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refactors the code in pump_transfers() to reprogram the registers immediately when we have a new configuration data. The behaviour is slightly modified: - chip is always disabled and reenabled - CTRL0 is always reprogrammed This change allows to do a further refactoring and simplier conversion to use SPI core DMA routines in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw: make sure SPI controller is enabledAndy Shevchenko2015-03-062-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The error handling is partially broken since the controller is disabled on error and is not re-enabled until condition occurs, i.e. mode (poll, PIO/DMA), chip (cs_change), or speed (clk_div) is changed. In the result of these changes we will have a predictable state of the SPi controller independently on how successfull was a previous transfer. The patch disables interrupts and re-enables the SPI controller wherever it needs to be done. Thus most of the time the SPI controller is kept enabled. The runtime PM, when it will be implemented, must take care of the controller disabling and re-enabling. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw: always reprogram CTRL0Andy Shevchenko2015-02-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of an additional reading from the register let's update it even if the value is kept the same. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw: refactor code that handles clk_divAndy Shevchenko2015-02-241-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following changes: a) the calculation of clk_div is simplified to oneliner; b) chip->clk_div is updated if clk_div is not zero, therefore the condition is simplified by using chip->clk_div in both cases; c) while here, the redundant parentheses are removed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw: get TX level without an additional variableAndy Shevchenko2015-02-241-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to have an additional variable to get a TX level. The patch refactors this piece of code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw: move piece of code out of conditionAndy Shevchenko2015-02-241-2/+3
| | | | |_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no sense to keep a member assignment in the internal structure inside the condition which reprograms HW. It makes code readability better if kept outside of the condition. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | spi: cadence: Remove Kconfig dependencyMichal Simek2015-03-091-2/+1
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove Kconfig dependency and enable driver for all ARCHs. Also update help description. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | | spi: spi-bfin5xx: Initialize cr_width in bfin_spi_pump_transfers()Chen Gang2015-04-011-2/+1
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cr_width may be not initialized before using by cr, the related warning (with defconfig under blackfin by gcc5): CC drivers/spi/spi-bfin5xx.o drivers/spi/spi-bfin5xx.c: In function 'bfin_spi_pump_transfers': drivers/spi/spi-bfin5xx.c:655:5: warning: 'cr_width' may be used uninitialized in this function [-Wmaybe-uninitialized] cr |= cr_width; ^ Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ \ \ \ Merge remote-tracking branches 'spi/topic/atmel', 'spi/topic/bcm2385', ↵Mark Brown2015-04-116-145/+283
|\ \ \ \ \ \ \ \ \ | | | |_|_|_|/ / / | | |/| | | | | | | | | | | | | | | 'spi/topic/bcm2835', 'spi/topic/bcm53xx' and 'spi/topic/bitbang' into spi-next
| | | | | * | | | spi: bitbang: only toggle bitchangesMichael Grzeschik2015-03-311-4/+14
| | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of bitbang_txrx_be_cpha0 and bitbang_txrx_be_cpha1 always call setmosi. That runs into several unnecessary calls into the gpiolib when the level of the GPIO actually has not to be changed. This patch changes the routines to remember the last GPIO level and only calls setmosi if an change has to be made. This way it improves the transfer throughput. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: bcm53xx: use msecs_to_jiffies for conversionNicholas Mc Guire2015-02-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Converting milliseconds to jiffies by "val * HZ / 1000" is technically ok but msecs_to_jiffies(val) is the cleaner solution and handles all corner cases correctly. This is only an API consolidation and should make things more readable Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: bcm2835: enabling polling mode for transfers shorter than 30usMartin Sperl2015-04-101-26/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In cases of short transfer times the CPU is spending lots of time in the interrupt handler and scheduler to reschedule the worker thread. Measurements show that we have times where it takes 29.32us to between the last clock change and the time that the worker-thread is running again returning from wait_for_completion_timeout(). During this time the interrupt-handler is running calling complete() and then also the scheduler is rescheduling the worker thread. This time can vary depending on how much of the code is still in CPU-caches, when there is a burst of spi transfers the subsequent delays are in the order of 25us, so the value of 30us seems reasonable. With polling the whole transfer of 4 bytes at 10MHz finishes after 6.16us (CS down to up) with the real transfer (clock running) taking 3.56us. So the efficiency has much improved and is also freeing CPU cycles, reducing interrupts and context switches. Because of the above 30us seems to be a reasonable limit for polling. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: bcm2835: transform native-cs to gpio-cs on first spi_setupMartin Sperl2015-04-101-5/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Transforms the bcm-2835 native SPI-chip select to their gpio-cs equivalent. This allows for some support of some optimizations that are not possible due to HW-gliches on the CS line - especially filling the FIFO before enabling SPI interrupts (by writing to CS register) while the transfer is already in progress (See commit: e3a2be3030e2) This patch also works arround some issues in bcm2835-pinctrl which does not set the value when setting the GPIO as output - it just sets up output and (typically) leaves the GPIO as low. When a fix for this is merged then this gpio_set_value can get removed from bcm2835_spi_setup. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: bcm2835: fill FIFO before enabling interrupts to reduce interrupts/messageMartin Sperl2015-03-291-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To reduce the number of interrupts/message we fill the FIFO before enabling interrupts - for short messages this reduces the interrupt count from 2 to 1 interrupt. There have been rare cases where short (<200ns) chip-select switches with native CS have been observed during such operation, this is why this optimization is only enabled for GPIO-CS. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Tested-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: bcm2835: fix code formatting issueMartin Sperl2015-03-291-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Tested-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: bcm2835: move to the transfer_one driver modelMartin Sperl2015-03-261-88/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also allows for GPIO-CS to get used removing the limitation of 2/3 SPI devises on the SPI bus. Fixes: spi-cs-high with native CS with multiple devices on the spi-bus resetting the chip selects to "normal" polarity after a finished transfer. No other functionality/improvements added. Tested with the following 4 devices on the spi-bus: * mcp2515 with native CS * mcp2515 with gpio CS * fb_st7735r with native CS (plus spi-cs-high via transistor inverting polarity) * enc28j60 with gpio-CS Tested-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | Merge tag 'v4.0-rc5' into spi-bcm2835Mark Brown2015-03-26953-6271/+10261
| | | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux 4.0-rc5
| | | * | | | | | spi: bcm2835: enable support of 3-wire modeMartin Sperl2015-03-231-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: bcm2835: clock divider can be a multiple of 2Martin Sperl2015-03-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The official documentation is wrong in this respect. Has been tested empirically for dividers 2-1024 Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: bcm2835: fill/drain SPI-fifo as much as possible during interruptMartin Sperl2015-03-231-61/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the recommendation from the BCM2835 data-sheet with regards to polling drivers to fill/drain the FIFO as much data as possible also for the interrupt-driven case (which this driver is making use of). This means that for long transfers (>64bytes) we need one interrupt every 64 bytes instead of every 12 bytes, as the FIFO is 16 words (not bytes) wide. Tested with mcp251x (can bus), fb_st7735 (TFT framebuffer device) and enc28j60 (ethernet) drivers. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: bcm2835: fix all checkpath --strict messagesMartin Sperl2015-03-201-7/+11
| | | | |_|/ / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following errors/warnings issued by checkpatch.pl --strict have been fixed: drivers/spi/spi-bcm2835.c:182: CHECK: Alignment should match open parenthesis drivers/spi/spi-bcm2835.c:191: CHECK: braces {} should be used on all arms of this statement drivers/spi/spi-bcm2835.c:234: CHECK: Alignment should match open parenthesis drivers/spi/spi-bcm2835.c:256: CHECK: Alignment should match open parenthesis drivers/spi/spi-bcm2835.c:271: CHECK: Alignment should match open parenthesis drivers/spi/spi-bcm2835.c:346: CHECK: Alignment should match open parenthesis total: 0 errors, 0 warnings, 6 checks, 403 lines checked In 2 locations the arguments had to get split/moved to the next line so that the line width stays below 80 chars. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: introduce master->handle_err() callbackAndy Shevchenko2015-03-062-0/+7
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This callback would be useful to handle an error that occurs in the generic implementation of transfer_one_message(). The good candidate for this is to drain FIFO and / or to terminate DMA transfers when timeout happened. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | | | spi: atmel: use endian agnostic IOBen Dooks2015-03-221-1/+7
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the endian agnositc IO functions instead of the __raw ones for when the driver is in use on big-endian systems. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | | | Merge remote-tracking branch 'spi/topic/img-spfi' into spi-nextMark Brown2015-04-112-83/+101
|\ \ \ \ \ \
| * | | | | | spi: img-spfi: Control CS lines with GPIOEzequiel Garcia2015-04-082-48/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the CONTINUE bit is set, the interrupt status we are polling to identify if a transaction has finished can be sporadic. Even though the transfer has finished, the interrupt status may erroneously indicate that there is still data in the FIFO. This behaviour causes random timeouts in large PIO transfers. Instead of using the CONTINUE bit to control the CS lines, use the SPI core's CS GPIO handling. Also, now that the CONTINUE bit is not being used, we can poll for the ALLDONE interrupt to indicate transfer completion. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | | | Merge branch 'fix/img-spfi' of ↵Mark Brown2015-04-081-5/+5
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-img-spfi
| * | | | | | | spi: img-spfi: Reset controller after each messageAndrew Bresticker2015-04-081-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Imagination has recommended that the SPFI controller be reset after each message, regardless of success or failure. Do this in an unprepare_message() callback. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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