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* [POWERPC] 8xx: Work around CPU15 erratum.Scott Wood2007-10-032-0/+22
| | | | | | | | | | | | | The CPU15 erratum on MPC8xx chips can cause incorrect code execution under certain circumstances, where there is a conditional or indirect branch in the last word of a page, with a target in the last cache line of the next page. This patch implements one of the suggested workarounds, by forcing a TLB miss whenever execution crosses a page boundary. This is done by invalidating the pages before and after the one being loaded into the TLB in the ITLB miss handler. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 8xx: Add pin and clock setting functions.Scott Wood2007-10-032-0/+250
| | | | | | | | | | | These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 8xx: Infrastructure code cleanup.Scott Wood2007-10-0310-149/+88
| | | | | | | | | | | | | | | | | | | | | 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 8xx: Fix CONFIG_PIN_TLB.Scott Wood2007-10-032-2/+3
| | | | | | | | 1. Move CONSISTENT_START on 8xx so that it doesn't overlap the IMMR mapping. 2. The wrong register was being loaded into SPRN_MD_RPN. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm_uart: Issue STOP_TX command before initializing console.Scott Wood2007-10-031-0/+3
| | | | | | | This prevents some bootloader/bootwrapper characters from being lost. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm_uart: sparse fixesScott Wood2007-10-036-183/+192
| | | | | | | | Mostly a bunch of direct access to in/out conversions, plus a few cast removals, __iomem annotations, and miscellaneous cleanup. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING ↵Scott Wood2007-10-036-25/+260
| | | | | | | | | | | | | | | | is set. The existing OF glue code was crufty and broken. Rather than fix it, it has been removed, and the serial driver now talks to the device tree directly. The non-CONFIG_PPC_CPM_NEW_BINDING code can go away once CPM platforms are dropped from arch/ppc (which will hopefully be soon), and existing arch/powerpc boards that I wasn't able to test on for this patchset get converted (which should be even sooner). Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.Scott Wood2007-10-031-6/+4
| | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.Scott Wood2007-10-037-1/+273
| | | | | | | | | | | | | | | | | | | | fsl_get_immr() uses /soc/ranges to determine the immr. mpc885_get_clock() transforms a crystal frequency into a system frequency according to the PLL register settings. pq2_get_clocks() does the same as the above for the PowerQUICC II, except that it produces several different clocks. The mpc8xx/pq2 set_clocks() functions modify common properties in the device tree based on the given clock data. The mpc885/pq2 fixup_clocks() functions call get_clocks(), and pass the results to set_clocks(). Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.Scott Wood2007-10-031-17/+8
| | | | | | | | | | | | Consensus was reached to put PCI nodes at the root of the tree (and not under /soc), but the phandle to a control node was rejected in favor of simply not worrying about /pci/reg overlapping /soc/ranges. This updates cuboot-82xx to not look for the phandle. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add early debug console for CPM serial ports.Scott Wood2007-10-038-0/+92
| | | | | | | | | This code assumes that the ports have been previously set up, with buffers in DPRAM. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Introduce new CPM device bindings.Scott Wood2007-10-033-1/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | This introduces a new device binding for the CPM and other devices on these boards. Some of the changes include: 1. Proper namespace scoping for Freescale compatibles and properties. 2. Use compatible rather than things like device_type and model to determine which particular variant of a device is present. 3. Give the drivers the relevant CPM command word directly, rather than requiring it to have a lookup table based on device-id, SCC v. SMC, and CPM version. 4. Specify the CPCR and the usable DPRAM region in the CPM's reg property. Boards that do not require the legacy bindings should select CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once all existing boards are converted and tested, the config option can become default y to prevent new boards from using the old model. Once arch/ppc is gone, the config option can be removed altogether. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequencyScott Wood2007-10-033-16/+24
| | | | | | | | | | | | | As suggested by David Gibson, now that we have a separate node for the baud rate generators, it's better to use the standard clock-frequency property than a cpm-node-level fsl,brg-frequency property. This patch updates existing places where fsl,brg-frequency is used. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [PPC] Use cpu setup routines from cpu_setup_44x.S for ARCH=ppcPaul Mackerras2007-10-042-11/+1
| | | | | | | | | | | | | | Commit 8112753bb2c0045398c89d0647792b39805f6d40 made 44x in ARCH=powerpc builds use cpu setup routines in cpu_setup_44x.S, but didn't make a similar change for ARCH=ppc, and consequently the ARCH=ppc builds fail with undefined symbols (since both use the same cputable.c). This fixes it by including cpu_setup_44x.S in the ARCH=ppc builds, and by taking out the now-redundant FPU initialization in arch/ppc/kernel/head_44x.S. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Uartlite: Revert register io access changesGrant Likely2007-10-032-19/+19
| | | | | | | | | | | | Reverts commit a15da8eff3627b8368db7f5dd260e5643213d918 This driver is used by devices other than the xilinx opb-uartlite which depend on bytewise access to the registers. The change to 32 bit access does not work on these devices. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Add macros for register namesGrant Likely2007-10-031-6/+21
| | | | | | | Add macros to define register names to improve readability. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Setup default eth addr in embed_config for Xilinx Virtex platformsGrant Likely2007-10-031-0/+8
| | | | | | | | This simply adds the boilerplate default Ethernet address to embed_config for the Xilinx platform (bug fix). Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] XilinxFB: Move xilinxfb_platform_data definition to a shared ↵Grant Likely2007-10-033-8/+25
| | | | | | | | | | | header file XilnixFB can be used by more than just arch/ppc. Move the data structure definition into include/linux/xilinxfb.h so it can be used by microblaze and arch/powerpc Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Flush RX fifo in bootwrapperGrant Likely2007-10-032-1/+11
| | | | | | | | Flush the uartlite RX fifo so that characters typed before entry into the zImage wrapper do not muck up the kernel command line. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Add treeImage to .gitignoreJosh Boyer2007-10-031-0/+1
| | | | | | Tell git to ignore the generated treeImage.* files in arch/powerpc/boot Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Let the console be initialized earlierGrant Likely2007-10-031-3/+38
| | | | | | | | | By configuring it earlier we get console output sooner which is helpful for debugging when the kernel crashes before the serial drivers are initialized. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Add of-platform-bus bindingGrant Likely2007-10-031-4/+92
| | | | | | | Add of_platform bus binding so this driver can be used with arch/powerpc Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Comment block tidyGrant Likely2007-10-031-3/+40
| | | | | | | | | Tidy the comments to split the driver into logical section; the main driver, the console driver, the platform bus binding, and module initialization and teardown. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Separate the bus binding from the driver properGrant Likely2007-10-031-34/+65
| | | | | | | | Separate the bus binding code from the driver structure allocation code in preparation for adding the of_platform_bus bindings needed by arch/powerpc Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Add macro for uartlite device nameGrant Likely2007-10-031-2/+3
| | | | | | | Changed to make the following OF_platform bus binding patch a wee bit cleaner Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: change name of ports to ulite_portsGrant Likely2007-10-031-5/+5
| | | | | | | Changed to match naming convention used in the rest of the module Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Uartlite: Fix reg io to access documented register sizeGrant Likely2007-10-032-17/+17
| | | | | | | | | | | The Uartlite data sheet defines the registers as 32 bit wide. This patch changes the register access to use 32 bit transfers and eliminates the magic +3 offset which is currently required to make the device work. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: John Williams <jwilliams@itee.uq.edu.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Add PowerPC Xilinx Virtex entry to maintainersGrant Likely2007-10-031-0/+7
| | | | | Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Virtex: Add generic Xilinx Virtex board supportGrant Likely2007-10-032-0/+51
| | | | | | | | | Adds support for generic Xilinx Virtex boards. Any board which specifies "xilinx,virtex" in the compatible property will make use of this board support. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Virtex: add xilinx interrupt controller driverGrant Likely2007-10-033-0/+172
| | | | | | | Adds support for the Xilinx opb-intc interrupt controller Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Virtex: Add Kconfig macros for Xilinx Virtex board supportGrant Likely2007-10-031-13/+25
| | | | | | | Add the needed kconfig macros to enable Xilinx Virtex board support Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Virtex: Add uartlite bootwrapper driverGrant Likely2007-10-034-1/+68
| | | | | | | Allows the bootwrapper to use the uartlite device for console output. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaroundValentine Barshak2007-10-032-1/+27
| | | | | | | | | | Add a workaround for PowerPC 440EPx/GRx incorrect write to DDR SDRAM errata. Data can be written to wrong address in SDRAM when write pipelining enabled on plb0. We disable it in the cpu_setup for these processors at early init. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xxValentine Barshak2007-10-033-10/+20
| | | | | | | | | | The PowerPC 440EP(x) FPU init is currently done in head_44x under ifdefs. Since we should support more then one board in the same kernel, we move FPU initialization code from head_44x to cpu_setup_44x and add cpu_setup callbacks for 440EP(x). Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: Introduce cpu_setup functionality to 44x platformValentine Barshak2007-10-033-6/+27
| | | | | | | | | | | This adds cpu_setup functionality for ppc44x platform. Low level cpu-spefic initialization routines should be placed in cpu_setup_44x.S and a callback should be added to cputable. The cpu_setup is invoked by identify_cpu() function at early init. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: Fix Walnut wrapper compile errorsJosh Boyer2007-10-031-0/+1
| | | | | | | Pass the appropriate -mcpu flag to the treeboot-walnut.o object to prevent some toolchains from erroring out with unknown opcodes Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Enable tickless idle and high res timers for powerpcTony Breeds2007-10-033-0/+10
| | | | | Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Implement clockevents driver for powerpcTony Breeds2007-10-034-43/+94
| | | | | | | | | | | | This registers a clock event structure for the decrementer and turns on CONFIG_GENERIC_CLOCKEVENTS, which means that we now don't need most of timer_interrupt(), since the work is done in generic code. For secondary CPUs, their decrementer clockevent is registered when the CPU comes up (the generic code automatically removes the clockevent when the CPU goes down). Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'ppc-fixes' of git://git.bocc.de/dbox2 into for-2.6.24Paul Mackerras2007-10-031-0/+1
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| * [POWERPC] Fix cpm_uart driverJochen Friedrich2007-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | in cpm_uart_cpm1.h, DPRAM_BASE is assigned an address derived from cpmp. On ARC=ppc, this is a physical address with 1:1 DMA mapping which can't be used for arithmetric compare operations with virtual addresses returned by cpm_dpram_addr. This patch changes the assignment to use cpm_dpram_addr as well, like in cpm_uart_cpm2.h. Signed-off-by: Jochen Friedrich <jochen@scram.de>
| * [PPC] Compile fix for 8xx CPM Ehernet driverJochen Friedrich2007-09-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add #include <asm/cacheflush.h> for flush_dcache_range to make the driver compile again. CC arch/ppc/8xx_io/enet.o arch/ppc/8xx_io/enet.c: In function 'scc_enet_start_xmit': arch/ppc/8xx_io/enet.c:240: error: implicit declaration of function 'flush_dcache_range' make[1]: *** [arch/ppc/8xx_io/enet.o] Error 1 make: *** [arch/ppc/8xx_io] Error 2 Signed-off-by: Jochen Friedrich <jochen@scram.de>
| * [PPC] Fix cpm_dpram_addr returning phys mem instead of virt memJochen Friedrich2007-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | cpm_dpram_addr returns physical memory of the DP RAM instead of iomapped virtual memory. As there usually is a 1:1 MMU map of the IMMR area, this is often not noticed. However, cpm_dpram_phys assumes this iomapped virtual memory and returns garbage on the 1:1 mapped memory causing CPM1 uart console to fail. This patch fixes the problem (copied from the powerpc tree). Signed-off-by: Jochen Friedrich <jochen@scram.de>
| * [POWERPC] Fix copy'n'paste typo in commproc.cJochen Friedrich2007-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powerpc version of commproc.c exports cpm_dpram_addr twice and cpm_dpram_phys not at all due to a typo. This patch fixes this problem. CC arch/powerpc/sysdev/commproc.o arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kcrctab_cpm_dpram_addr' arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kcrctab_cpm_dpram_addr' was here arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kstrtab_cpm_dpram_addr' arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kstrtab_cpm_dpram_addr' was here arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__ksymtab_cpm_dpram_addr' arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__ksymtab_cpm_dpram_addr' was here make[1]: *** [arch/powerpc/sysdev/commproc.o] Error 1 make: *** [arch/powerpc/sysdev] Error 2 Signed-off-by: Jochen Friedrich <jochen@scram.de>
* | Merge branch 'linux-2.6' into for-2.6.24Paul Mackerras2007-10-03170-1599/+2323
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| * \ Merge branch 'sas-fixes' of ↵Linus Torvalds2007-10-021-2/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/misc-2.6 * 'sas-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/misc-2.6: aic94xx: fix DMA data direction for SMP requests
| | * | aic94xx: fix DMA data direction for SMP requestsJeff Garzik2007-10-021-2/+2
| | |/ | | | | | | | | | | | | | | | | | | DMA-mapped SMP (scsi management protocol) requests going /to/ the device need the PCI DMA data direction to indicate such. Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | Merge branch 'upstream-linus' of ↵Linus Torvalds2007-10-023-2/+8
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6 * 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: dm9601: Fix receive MTU mv643xx_eth: Do not modify struct netdev tx_queue_len qla3xxx: bugfix: Fix VLAN rx completion handling. qla3xxx: bugfix: Add memory barrier before accessing rx completion.
| | * | dm9601: Fix receive MTUPeter Korsgaard2007-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dm9601 didn't take the ethernet header into account when calculating RX MTU, causing packets bigger than 1486 to fail. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
| | * | mv643xx_eth: Do not modify struct netdev tx_queue_lenDale Farnsworth2007-10-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver erroneously zeros dev->tx_queue_len, since mp->tx_ring_size has not yet been initialized. Actually, the driver shouldn't modify tx_queue_len at all and should leave the value set by alloc_etherdev(), currently 1000. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
| | * | qla3xxx: bugfix: Fix VLAN rx completion handling.Ron Mercer2007-10-021-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix 4032 chip undocumented "feature" where bit-8 is set if the inbound completion is for a VLAN. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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