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* ARM: dts: qcom: Add idle states device nodes for 8084Lina Iyer2015-04-031-0/+14
| | | | | | | | | | | | Add ARM common idle states device bindings for cpuidle support for APQ 8084. Support Standalone power collapse (SPC) idle state (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dts: qcom: Add idle states device nodes for 8974/8074Lina Iyer2015-04-031-0/+14
| | | | | | | | | | | | Add ARM common idle states device bindings for cpuidle support for APQ 8974/8074. Support Standalone power collapse (SPC) idle state (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUsLina Iyer2015-04-031-8/+8
| | | | | | | | | | | Update the SAW2 DT bindings to add qcom,apq8064-saw2-v1.1-cpu compatible binding string to configure SPM registers and allow the SPM to put the core in deeper idle states when the core is idle. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUsLina Iyer2015-04-031-1/+25
| | | | | | | | | | | Each Krait CPU in the QCOM 8084 SoC has an SAW power controller to regulate the power to the cpu and aide the core in entering idle states. Reference the SAW instance and associate the instance with the CPU core. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUsLina Iyer2015-04-031-1/+25
| | | | | | | | | | | Each Krait CPU in the QCOM 8074/8974 SoC has an SAW power controller to regulate the power to the cpu and aide the core in entering idle states. Reference the SAW instance and associate the instance with the CPU core. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* devicetree: bindings: Document qcom,idle-statesLina Iyer2015-04-031-0/+84
| | | | | | | | | | | | | | | | | Document cpuidle states of QCOM cpus. In addition to arm-idle-state compatible string, the ARM idle state definition must define one of the following compatible strings - "qcom,idle-state-ret", "qcom,idle-state-spc", "qcom,idle-state-pc", The compatibles helps the SPM platform driver to use the correct idle function when the index to the idle state is passed to the platform driver. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* devicetree: bindings: Update qcom,saw2 node bindingsLina Iyer2015-04-031-9/+31
| | | | | | | | | | | | Update qcom,saw2 node bindings with compatible strings to identify nodes that provides cpuidle functionality for a particular SoC. Remove unused compatible strings. Update examples for different SAW nodes. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* dt-bindings: Add #defines for MSM8916 clocks and resetsGeorgi Djakov2015-04-033-0/+265
| | | | | | | | | Add clocks/resets defines for the global clock controller found on Qualcomm MSM8916 SoCs. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device treeKenneth Westfield2015-04-031-0/+16
| | | | | | | | | Model the Qualcomm Technologies LPASS hardware for the ipq806x SOC. Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org> Acked-by: Banajit Goswami <bgoswami@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodesIvan T. Ivanov2015-04-033-0/+20
| | | | | | | | | | PMA8084 have 2 SPMI devices per physical package. Add their configuration nodes and include them in boards which are using AQP8084 based chipset. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodesIvan T. Ivanov2015-04-034-0/+40
| | | | | | | | | | PM8841 and PM8941 have 2 SPMI devices per physical package. Add their configuration nodes and include them in boards which are using 8x74 based chipset. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974Ivan T. Ivanov2015-04-032-0/+32
| | | | | | | | Add SPMI PMIC Arbiter configuration nodes for APQ8084 and MSM8974. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add LCC nodesKumar Gala2015-04-033-0/+22
| | | | | | | | | | | | | Add the node for the LPASS clock controller found on a few qcom SoCs so that the clock driver can probe. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> [sboyd@codeaurora.org: Added apq8064 and msm8960 nodes] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add TCSR support for MSM8960Andy Gross2015-04-031-0/+8
| | | | | | | | | This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add TCSR support for MSM8660Andy Gross2015-04-031-0/+8
| | | | | | | | | This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add TCSR support for IPQ8064Andy Gross2015-04-031-0/+14
| | | | | | | | | This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add TCSR support for APQ8064Andy Gross2015-04-031-0/+14
| | | | | | | | | This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* mfd: qcom,tcsr: Add device tree binding for TCSRAndy Gross2015-04-031-0/+22
| | | | | | | | | | This patch adds the device tree binding for the Qualcomm Top Control and Status Register device. The TCSR is comprised of a set of registers that provide various control and status functions for attached peripherals. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: qcom: dts: gic: add compatible string for Qualcomm MSM GICsKumar Gala2015-04-031-0/+2
| | | | | | | | Document the Qualcomm MSM GICs implementation as compatible with the ARM GIC standard. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'omap-for-v4.1/wl12xx-dt' of ↵Olof Johansson2015-04-03597-3707/+6676
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Merge "wireless wl12xx and omap device tree changes for v4.1" from Tony Lindgren: Wireless and omap changes to make wl12xx driver to use device tree data instead of platform data from Eliad Peller <eliad@wizery.com>: - Add device-tree support to the wlcore (wl12xx/wl18xx) driver. - Update the current users to use the bindings instead of pdata-quirks. - Finally, remove the deprecated wl12xx_platform_data struct Note that da850 board file code that still uses the platform data, but we have da850.dtsi that can be used instead. So it was decided that we should try to remove the wl12xx support from the da850 board file as suggested by Sekhar Nori <nsekhar@ti.com>. As it's the last patch in the series, the last patch can be simply reverted if needed. As this series touches quite a bit of arch code, it was suggested by Kalle Valo <kvalo@codeaurora.org> that the whole series should be merged via the arm-soc tree. * tag 'omap-for-v4.1/wl12xx-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: wlcore: remove wl12xx_platform_data ARM: dts: add wl12xx/wl18xx bindings wlcore: add device-tree support dt: bindings: add TI's wilink wireless device wl12xx: use frequency instead of enumerations for pdata clocks wlcore: set irq_trigger in board files instead of hiding behind a quirk + Linux 4.0-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
| * wlcore: remove wl12xx_platform_dataEliad Peller2015-03-2410-251/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have wlcore device-tree bindings in place (for both wl12xx and wl18xx), remove the legacy wl12xx_platform_data struct, and move its members into the platform device data (that is passed to wlcore) Davinci 850 is the only platform that still set the platform data in the legacy way (and doesn't have DT bindings), so remove the relevant code/Kconfig option from the board file (as suggested by Sekhar Nori) Since no one currently uses wlcore_spi, simply remove its platform data support (DT bindings will have to be added if someone actually needs it) Signed-off-by: Luciano Coelho <luca@coelho.fi> Signed-off-by: Eliad Peller <eliad@wizery.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: dts: add wl12xx/wl18xx bindingsEliad Peller2015-03-2411-74/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | Replace all the pdata-quirks for setting wl12xx/wl18xx platform data with proper DT definitions. Signed-off-by: Eliad Peller <eliad@wizery.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * wlcore: add device-tree supportEliad Peller2015-03-241-6/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | When running with device-tree, we no longer have a board file that can set up the platform data for wlcore. Allow this data to be passed from DT. Signed-off-by: Ido Yariv <ido@wizery.com> Signed-off-by: Eliad Peller <eliad@wizery.com> Tested-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * dt: bindings: add TI's wilink wireless deviceEliad Peller2015-03-241-0/+47
| | | | | | | | | | | | | | | | | | | | Add device tree binding documentation for TI's wilink (wl12xx and wl18xx) wlan chip. Signed-off-by: Eliad Peller <eliad@wizery.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * wl12xx: use frequency instead of enumerations for pdata clocksLuciano Coelho2015-03-245-44/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of defining an enumeration with the FW specific values for the different clock rates, use the actual frequency instead. Also add a boolean to specify whether the clock is XTAL or not. Change all board files to reflect this. Signed-off-by: Luciano Coelho <luca@coelho.fi> [Eliad - small fixes, update board file changes] Signed-off-by: Eliad Peller <eliad@wizery.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * wlcore: set irq_trigger in board files instead of hiding behind a quirkLuciano Coelho2015-03-197-21/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The platform_quirk element in the platform data was used to change the way the IRQ is triggered. When set, the EDGE_IRQ quirk would change the irqflags used and treat edge trigger differently from the rest. Instead of hiding this irq flag setting behind the quirk, have the board files set the irq_trigger explicitly. This will allow us to use standard irq DT definitions later on. Signed-off-by: Luciano Coelho <luca@coelho.fi> [Eliad - rebase, add irq_trigger field and pass it, update board file changes] Signed-off-by: Eliad Peller <eliad@wizery.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * Linux 4.0-rc4v4.0-rc4Linus Torvalds2015-03-151-1/+1
| |
| * Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2015-03-151-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | Pull drm fix from Dave Airlie: "An oops snuck in in an -rc3 patch, this fixes it" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: [PATCH] drm/mm: Fix support 4 GiB and larger ranges
| | * [PATCH] drm/mm: Fix support 4 GiB and larger rangesKrzysztof Kolasa2015-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bad argument if(tmp)... in check_free_hole fix oops: kernel BUG at drivers/gpu/drm/drm_mm.c:305! [airlied: excellent, this was my task for today]. Signed-off-by: Krzysztof Kolasa <kkolasa@winsoft.pl> Reviewed-by: Chris wilson <chris@chris-wilson.co.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | Merge tag 'clk-fixes-for-linus' of ↵Linus Torvalds2015-03-1510-29/+83
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clock framework fixes from Michael Turquette: "The clk fixes for 4.0-rc4 comprise three themes. First are the usual driver fixes for new regressions since v3.19. Second are fixes to the common clock divider type caused by recent changes to how we round clock rates. This affects many clock drivers that use this common code. Finally there are fixes for drivers that improperly compared struct clk pointers (drivers must not deref these pointers). While some of these drivers have done this for a long time, this did not cause a problem until we started generating unique struct clk pointers for every consumer. A new function, clk_is_match was introduced to get these drivers working again and they are fixed up to no longer deref the pointers themselves" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: ASoC: kirkwood: fix struct clk pointer comparing ASoC: fsl_spdif: fix struct clk pointer comparing ARM: imx: fix struct clk pointer comparing clk: introduce clk_is_match clk: don't export static symbol clk: divider: fix calculation of initial best divider when rounding to closest clk: divider: fix selection of divider when rounding to closest clk: divider: fix calculation of maximal parent rate for a given divider clk: divider: return real rate instead of divider value clk: qcom: fix platform_no_drv_owner.cocci warnings clk: qcom: fix platform_no_drv_owner.cocci warnings clk: qcom: Add PLL4 vote clock clk: qcom: lcc-msm8960: Fix PLL rate detection clk: qcom: Fix slimbus n and m val offsets clk: ti: Fix FAPLL parent enable bit handling
| | * ASoC: kirkwood: fix struct clk pointer comparingShawn Guo2015-03-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 035a61c314eb ("clk: Make clk API return per-user struct clk instances"), clk API users can no longer check if two struct clk pointers are pointing to the same hardware clock, i.e. struct clk_hw, by simply comparing two pointers. That's because with the per-user clk change, a brand new struct clk is created whenever clients try to look up the clock by calling clk_get() or sister functions like clk_get_sys() and of_clk_get(). This changes the original behavior where the struct clk is only created for once when clock driver registers the clock to CCF in the first place. The net change here is before commit 035a61c314eb the struct clk pointer is unique for given hardware clock, while after the commit the pointers returned by clk lookup calls become different for the same hardware clock. That said, the struct clk pointer comparing in the code doesn't work any more. Call helper function clk_is_match() instead to fix the problem. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| | * ASoC: fsl_spdif: fix struct clk pointer comparingShawn Guo2015-03-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 035a61c314eb ("clk: Make clk API return per-user struct clk instances"), clk API users can no longer check if two struct clk pointers are pointing to the same hardware clock, i.e. struct clk_hw, by simply comparing two pointers. That's because with the per-user clk change, a brand new struct clk is created whenever clients try to look up the clock by calling clk_get() or sister functions like clk_get_sys() and of_clk_get(). This changes the original behavior where the struct clk is only created for once when clock driver registers the clock to CCF in the first place. The net change here is before commit 035a61c314eb the struct clk pointer is unique for given hardware clock, while after the commit the pointers returned by clk lookup calls become different for the same hardware clock. That said, the struct clk pointer comparing in the code doesn't work any more. Call helper function clk_is_match() instead to fix the problem. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| | * ARM: imx: fix struct clk pointer comparingShawn Guo2015-03-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 035a61c314eb ("clk: Make clk API return per-user struct clk instances"), clk API users can no longer check if two struct clk pointers are pointing to the same hardware clock, i.e. struct clk_hw, by simply comparing two pointers. That's because with the per-user clk change, a brand new struct clk is created whenever clients try to look up the clock by calling clk_get() or sister functions like clk_get_sys() and of_clk_get(). This changes the original behavior where the struct clk is only created for once when clock driver registers the clock to CCF in the first place. The net change here is before commit 035a61c314eb the struct clk pointer is unique for given hardware clock, while after the commit the pointers returned by clk lookup calls become different for the same hardware clock. That said, the struct clk pointer comparing in the code doesn't work any more. Call helper function clk_is_match() instead to fix the problem. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| | * clk: introduce clk_is_matchMichael Turquette2015-03-112-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers compare struct clk pointers as a means of knowing if the two pointers reference the same clock hardware. This behavior is dubious (drivers must not dereference struct clk), but did not cause any regressions until the per-user struct clk patch was merged. Now the test for matching clk's will always fail with per-user struct clk's. clk_is_match is introduced to fix the regression and prevent drivers from comparing the pointers manually. Fixes: 035a61c314eb ("clk: Make clk API return per-user struct clk instances") Cc: Russell King <linux@arm.linux.org.uk> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Michael Turquette <mturquette@linaro.org> [arnd@arndb.de: Fix COMMON_CLK=N && HAS_CLK=Y config] Signed-off-by: Arnd Bergmann <arnd@arndb.de> [sboyd@codeaurora.org: const arguments to clk_is_match() and remove unnecessary ternary operation] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| | * clk: don't export static symbolJulia Lawall2015-03-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ type T; identifier f; @@ static T f (...) { ... } @@ identifier r.f; declarer name EXPORT_SYMBOL_GPL; @@ -EXPORT_SYMBOL_GPL(f); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Fixes: 035a61c314eb "clk: Make clk API return per-user struct clk instances" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| | * clk: divider: fix calculation of initial best divider when rounding to closestUwe Kleine-König2015-03-091-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to the reasoning for the previous commit DIV_ROUND_CLOSEST(parent_rate, rate) might not be the best integer divisor to get a good approximation for rate from parent_rate (given the metric for CLK_DIVIDER_ROUND_CLOSEST). For example assume a parent rate of 1000 Hz and a target rate of 700. Using DIV_ROUND_CLOSEST the suggested divisor gets calculated to 1 resulting in a target rate of 1000 with a delta of 300 to the desired rate. With choosing 2 as divisor however the resulting rate is 500 which is nearer to 700. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: divider: fix selection of divider when rounding to closestUwe Kleine-König2015-03-091-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's an invalid approach to assume that among two divider values the one nearer the exact divider is the better one. Assume a parent rate of 1000 Hz, a divider with CLK_DIVIDER_POWER_OF_TWO and a target rate of 89 Hz. The exact divider is ~ 11.236 so 8 and 16 are the candidates to choose from yielding rates 125 Hz and 62.5 Hz respectivly. While 8 is nearer to 11.236 than 16 is, the latter is still the better divider as 62.5 is nearer to 89 than 125 is. Fixes: 774b514390b1 (clk: divider: Add round to closest divider) Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: divider: fix calculation of maximal parent rate for a given dividerUwe Kleine-König2015-03-091-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rate provided at the output of a clk-divider is calculated as: DIV_ROUND_UP(parent_rate, div) since commit b11d282dbea2 (clk: divider: fix rate calculation for fractional rates). So to yield a rate not bigger than r parent_rate must be <= r * div. The effect of choosing a parent rate that is too big as was done before this patch results in wrongly ruling out good dividers. Note that this is not a complete fix as __clk_round_rate might return a value >= its 2nd parameter. Also for dividers with CLK_DIVIDER_ROUND_CLOSEST set the calculation is not accurate. But this fixes the test case by Sascha Hauer that uses a chain of three dividers under a fixed clock. Fixes: b11d282dbea2 (clk: divider: fix rate calculation for fractional rates) Suggested-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: divider: return real rate instead of divider valueHeiko Stübner2015-03-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit bca9690b9426 ("clk: divider: Make generic for usage elsewhere") returned only the divider value for read-only dividers instead of the actual rate. Fixes: bca9690b9426 ("clk: divider: Make generic for usage elsewhere") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Tested-by: James Hogan <james.hogan@imgtec.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: qcom: fix platform_no_drv_owner.cocci warningskbuild test robot2015-02-251-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/clk/qcom/lcc-msm8960.c:577:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: qcom: fix platform_no_drv_owner.cocci warningskbuild test robot2015-02-251-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/clk/qcom/lcc-ipq806x.c:465:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: qcom: Add PLL4 vote clockStephen Boyd2015-02-251-0/+13
| | | | | | | | | | | | | | | | | | | | | This clock is needed for most audio clock frequencies. Add it. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: qcom: lcc-msm8960: Fix PLL rate detectionStephen Boyd2015-02-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | regmap_read() returns 0 on success, not the value of the register that is read. Fix it so we properly detect the frequency plan. Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: qcom: Fix slimbus n and m val offsetsStephen Boyd2015-02-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These shifts were copy/pasted from the pcm which is a different size RCG. Use the correct offsets so that slimbus rates are correct. Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| | * clk: ti: Fix FAPLL parent enable bit handlingTony Lindgren2015-02-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 163152cbbe32 ("clk: ti: Add support for FAPLL on dm816x") added basic support for the FAPLL on dm818x, but has a bug for the parent PLL enable bit. The FAPLL_MAIN_PLLEN is defined as BIT(3) but the code is doing a shift on it. This means the parent PLL won't get disabled even if all it's child synthesizers are disabled. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
| * | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2015-03-1571-225/+882
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "This is a rather unpleasantly large set of bug fixes for arm-soc, Most of them because of cross-tree dependencies for Exynos where we should have figured out the right path to merge things before the merge window, and then the maintainer being unable to sort things out in time during a business trip. The other changes contained here are the usual collection: MAINTAINERS file updates - Gregory Clement is now a co-maintainer for the legacy Marvell EBU platforms - A MAINTAINERS entry for the Freescale Vybrid platform that was added last year - Matt Porter no longer works as a maintainer on Broadcom SoCs Build-time issues - A compile-time error for at91 - Several minor DT fixes on at91, imx, exynos, socfpga, and omap - The new digicolor platform was not correctly enabled at all Configuration issues - Two defconfig fix for regressions using USB on versatile express and on OMAP3 - Enabling all 8 CPUs on Allwinner/SUNxi - Enabling the new STiH410 platform to be usable Bug fixes in platform code - A missing barrier for socfpga - Fixing LPDDR1 self-refresh mode on at91 - Fixing RTC interrupt numbers on Exynos3250 - Fixing a cache-coherency issues in CPU power-down on Exynos5 - Multiple small OMAP power management fixes" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (69 commits) MAINTAINERS: Add myself as co-maintainer to the legacy support of the mvebu SoCs ARM: at91: pm_slowclock: fix the compilation error ARM: at91/dt: fix USB high-speed clock to select UTMI ARM: at91/dt: fix at91 udc compatible strings ARM: at91/dt: declare matrix node as a syscon device ARM: vexpress: update CONFIG_USB_ISP1760 option ARM: digicolor: add the machine directory to Makefile ARM: STi: Add STiH410 SoC support MAINTAINERS: add Freescale Vybrid SoC MAINTAINERS: Remove self as ARM mach-bcm co-maintainer ARM: imx6sl-evk: set swbst_reg as vbus's parent reg ARM: imx6qdl-sabresd: set swbst_reg as vbus's parent reg ARM: at91/dt: at91sam9261: fix clocks and clock-names in udc definition ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot ARM: OMAP: enable TWL4030_USB in omap2plus_defconfig ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN lines ARM: dts: dra7x-evm: Don't use dcan1_rx.gpio1_15 in DCAN pinctrl ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding ARM: dts: OMAP5: fix polling intervals for thermal zones ...
| | * | MAINTAINERS: Add myself as co-maintainer to the legacy support of the mvebu SoCsGregory CLEMENT2015-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I will also take care of the legacy support(not fully converted to DT) of the mvebu SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | Merge tag 'at91-fixes3' of ↵Arnd Bergmann2015-03-118-11/+14
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes Pull "Third fixes batch for AT91 on 4.0" from Nicolas Ferre: - clock fixes for USB - compatible string changes for handling USB IP differences (+ needed AHB matrix syscon) - fix of a compilation error in PM code * tag 'at91-fixes3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: at91: pm_slowclock: fix the compilation error ARM: at91/dt: fix USB high-speed clock to select UTMI ARM: at91/dt: fix at91 udc compatible strings ARM: at91/dt: declare matrix node as a syscon device ARM: at91/dt: at91sam9261: fix clocks and clock-names in udc definition
| | | * | ARM: at91: pm_slowclock: fix the compilation errorWenyou Yang2015-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling the kernel in thumb2 (CONFIG_THUMB2_KERNEL option activated), we hit a compilation crash. The error message is listed below: ---8< ----- Error: cannot use register index with PC-relative addressing -- `str r0,.saved_lpr' --->8---- Add the .arm directive in the assembly files related to power management. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | | * | ARM: at91/dt: fix USB high-speed clock to select UTMINicolas Ferre2015-03-114-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UTMI clock must be selected by any high-speed USB IP. The logic behind it needs this particular clock. So, correct the clock in the device tree files affected. Reported-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: <stable@vger.kernel.org> #3.18
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