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* ARM: dts: r8a7793: Add SYSC PM DomainsGeert Uytterhoeven2016-04-271-0/+9
| | | | | | | | | | Add a device node for the System Controller. Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Add SYSC PM DomainsGeert Uytterhoeven2016-04-271-0/+10
| | | | | | | | | | Add a device node for the System Controller. Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7790: Add SYSC PM DomainsGeert Uytterhoeven2016-04-271-0/+17
| | | | | | | | | | Add a device node for the System Controller. Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7779: Add SYSC PM DomainsGeert Uytterhoeven2016-04-271-0/+10
| | | | | | | | | | Add a device node for the System Controller. Hook up ARM CPU cores 1-3 to their respective PM Domains. Note that ARM CPU core 0 cannot be shut off. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-rcar-sysc2-for-v4.7' into dt-pm-domain-for-v4.7Simon Horman2016-04-2733-232/+1023
|\ | | | | | | | | | | | | Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7 Introduce a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
| * soc: renesas: rcar-sysc: Add support for R-Car H3 power areasGeert Uytterhoeven2016-04-264-0/+61
| | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Add support for R-Car E2 power areasGeert Uytterhoeven2016-04-264-1/+38
| | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Add support for R-Car M2-N power areasGeert Uytterhoeven2016-04-262-1/+6
| | | | | | | | | | | | | | | | | | R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the definitions from the latter. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Add support for R-Car M2-W power areasGeert Uytterhoeven2016-04-264-1/+38
| | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Add support for R-Car H2 power areasGeert Uytterhoeven2016-04-264-1/+53
| | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Add support for R-Car H1 power areasGeert Uytterhoeven2016-04-264-1/+39
| | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Enable Clock Domain for I/O devicesGeert Uytterhoeven2016-04-261-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On R-Car H3, some power areas (e.g. A3VP) contain I/O devices, which are also part of the CPG/MSSR Clock Domain. On all R-Car SoCs, devices in the "always-on" PM Domain are part of the Clock Domain served by the CPG/MSSR or CPG/MSTP driver. Hook up the CPG/MSTP or CPG/MSSR Clock Domain attach/detach callbacks to enable power management using module clocks. Which callback to hook up depends on the presence of device nodes compatible with "renesas,cpg-mstp-clocks". This clears the path for a future migration from the CPG/MSTP to the CPG/MSSR driver on R-Car H1 and Gen2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Make rcar_sysc_power_is_off() staticGeert Uytterhoeven2016-04-222-2/+1
| | | | | | | | | | | | | | | | | | | | As of commit b12ff41658171f53 ("ARM: shmobile: r8a7779: Remove legacy PM Domain remainings"), rcar_sysc_power_is_off() is no longer used from SoC-specific code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Add DT support for SYSC PM domainsGeert Uytterhoeven2016-04-222-1/+254
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate the SYSC PM domains from DT, based on the presence of a device node for the System Controller. The actual power area hiearchy, and features of specific areas are obtained from tables in the C code. The SYSCIER and SYSCIMR register values are derived from the power areas present, which will help to get rid of the hardcoded values in R-Car H1 and R-Car Gen2 platform code later. Initialization is done from an early_initcall(), to make sure the PM Domains are initialized before secondary CPU bringup. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: rcar-sysc: Improve rcar_sysc_power() debug infoGeert Uytterhoeven2016-04-221-1/+1
| | | | | | | | | | | | | | | | Print requested power domain state. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * soc: renesas: Move pm-rcar to drivers/soc/renesas/rcar-syscGeert Uytterhoeven2016-04-2211-17/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the pm-rcar driver from arch/arm/mach-shmobile/ to drivers/soc/renesas/, and its header file to include/linux/soc/renesas/, so it can be shared between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3). Rename it to rcar-sysc as it's really a driver for the R-Car System Controller (SYSC). Kill the intermediate PM_RCAR config symbol, as it's not user configurable anymore, and to prepare for SoC-specific make rules. Add the missing #include <linux/types.h> to rcar-sysc.h, which was exposed by different include order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * Merge tag 'clk-renesas-for-v4.7-tag2' of ↵Simon Horman2016-04-228-51/+102
| |\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into rcar-sysc-for-v4.7 clk: renesas: R-Car SYSC PM Domain Preparation - Export the CPG/MSSR and CPG/MSTP attach/detach_dev callbacks, so they can be called by the R-Car SYSC PM Domain driver.
| | * clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()Geert Uytterhoeven2016-04-202-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car SYSC PM Domain driver has to power manage devices in power areas using clocks. To reuse code and to share knowledge of clocks suitable for power management, this is ideally done through the existing cpg_mssr_attach_dev() and cpg_mssr_detach_dev() callbacks. Hence these callbacks can no longer rely on their "domain" parameter pointing to the CPG/MSSR Clock Domain. To handle this, keep a pointer to the clock domain in a static variable. cpg_mssr_attach_dev() has to support probe deferral, as the R-Car SYSC PM Domain may be initialized, and devices may be added to it, before the CPG/MSSR Clock Domain is initialized. Dummy callbacks are provided for the case where CPG/MSTP support is not included, so the rcar-sysc driver won't have to care about this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
| | * clk: renesas: mstp: Provide dummy attach/detach_dev callbacksGeert Uytterhoeven2016-04-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Provide dummy cpg_mstp_{at,de}tach_dev() PM Domain callbacks if CPG/MSTP support is not included, so the rcar-sysc driver won't have to care about this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
| | * clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP supportGeert Uytterhoeven2016-04-203-12/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the decision whether to build the renesas-cpg-mssr and clk-mstp drivers is handled by Makefile logic. However, the rcar-sysc driver will need to know whether CPG/MSSR and/or CPG/MSTP support are available or not. To avoid having to duplicate this logic, move it to Kconfig. Provide non-visible CLK_RENESAS_CPG_MSSR and CLK_RENESAS_CPG_MSTP Kconfig symbols, which can be used by both Makefiles and C code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
| | * clk: renesas: mstp: Clarify cpg_mstp_{at,de}tach_dev() domain parameterGeert Uytterhoeven2016-04-072-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it clear that the "domain" parameter of the cpg_mstp_attach_dev() and cpg_mstp_detach_dev() functions is not used. The cpg_mstp_attach_dev() and cpg_mstp_detach_dev() callbacks are not only used by the CPG/MSTP Clock Domain driver, but also by the R-Mobile SYSC PM Domain driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * clk: renesas: cpg-mssr: Drop check for CONFIG_PM_GENERIC_DOMAINS_OFGeert Uytterhoeven2016-04-071-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 71d076ceb245f0d9 ("ARM: shmobile: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains"), CONFIG_PM_GENERIC_DOMAINS_OF is always enabled for SoCs with a CPG/MSSR block. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
| | * clk: renesas: mstp: Drop check for CONFIG_PM_GENERIC_DOMAINS_OFGeert Uytterhoeven2016-04-072-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 71d076ceb245f0d9 ("ARM: shmobile: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains"), CONFIG_PM_GENERIC_DOMAINS_OF is always enabled for SoCs with MSTP clocks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
| | * clk: renesas: r8a7795: add RWDT clockWolfram Sang2016-04-061-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * clk: renesas: r8a7795: add R clkWolfram Sang2016-04-061-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R can select between two parents. We deal with it like this: During initialization, check if EXTALR is populated. If so, use it for R. If not, use R_Internal. clk_mux doesn't help here because we don't want to switch parents depending on the clock rate. The clock rate (and source) should stay constant for the watchdog, so I think a setup like this during initialization makes sense. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * clk: renesas: r8a7795: add OSC and RINT clocksWolfram Sang2016-04-061-0/+5
| | | | | | | | | | | | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocksWolfram Sang2016-04-062-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Gen3 has two clocks (OSC and R) which look like a DIV6 clock but their divider value is read-only and depends on MD pins at bootup. Add support for such clocks by reading the value and adding a fixed clock. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * clk: renesas: r8a7795: make SD clk definition specific for GEN3Wolfram Sang2016-03-292-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | About SD clocks: The clock type is Gen3 specific, the callbacks are all Gen3 specific; I think the clock definition should also be Gen3 specific and not in the general header file. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * clk: renesas: r8a7795: add PWM clockUlrich Hecht2016-03-291-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | soc: renesas: Add r8a7795 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven2016-04-151-0/+42
| | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | soc: renesas: Add r8a7794 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven2016-04-151-0/+26
| | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | soc: renesas: Add r8a7793 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven2016-04-151-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the definitions from the latter. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | soc: renesas: Add r8a7791 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven2016-04-151-0/+26
| | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | soc: renesas: Add r8a7790 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven2016-04-151-0/+34
| | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | soc: renesas: Add r8a7779 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven2016-04-151-0/+27
| | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | PM / Domains: Add DT bindings for the R-Car System ControllerGeert Uytterhoeven2016-04-151-0/+48
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The Renesas R-Car System Controller provides power management for the CPU cores and various coprocessors, following the generic PM domain bindings in Documentation/devicetree/bindings/power/power_domain.txt. This supports R-Car Gen1 (H1), Gen2, and Gen3. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: gose: Enable SDHI controllersUlrich Hecht2016-04-251-0/+119
| | | | | | | | | | | | | | Includes regulator and pin assignments. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7793: Add SDHI controllersUlrich Hecht2016-04-251-0/+33
| | | | | | | | | | | | | | Same as on r8a7791. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7790: fix max-frequency for SDHIWolfram Sang2016-04-251-2/+2
| | | | | | | | | | | | | | | | | | The wrong values come from an old datasheet (H2 v0.6). Anything later has the fixed value of 195MHz (H2 v0.7 up to Gen2-common V2.0). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: kzm9g: Configure NMI key as wake-up sourceGeert Uytterhoeven2016-04-251-0/+7
| | | | | | | | | | | | | | | | | | Add a GPIO key with wake-up capability for the NMI button. This allows to wake up the system from s2ram without relying on the buttons on the optional switch board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7790: lager: Enable UHS-I SDR-50Wolfram Sang2016-04-251-2/+20
| | | | | | | | | | | | | | | | Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7790: Set maximum frequencies for SDHI clocksBen Hutchings2016-04-211-0/+4
| | | | | | | | | | | | | | | | Taken from the datasheet. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7791: Use USB3.0 fallback compatibility stringSimon Horman2016-04-201-1/+1
| | | | | | | | | | | | | | Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | ARM: dts: r8a7790: Use USB3.0 fallback compatibility stringSimon Horman2016-04-201-1/+1
| | | | | | | | | | | | | | Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | ARM: dts: r8a7779: Correct interrupt type for ARM TWDGeert Uytterhoeven2016-04-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For R-Car H1 devices the PPI type cannot be set, and so when we attempt to set the type for the ARM TWD interrupt it fails. This has gone unnoticed because it fails silently, and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Based on patches by Jon Hunter for Tegra20/30 and OMAP4. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: sh73a0: Correct interrupt type for ARM TWDGeert Uytterhoeven2016-04-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For SH-Mobile AG5 devices the PPI type cannot be set, and so when we attempt to set the type for the ARM TWD interrupt it fails. This has gone unnoticed because it fails silently, and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Based on patches by Jon Hunter for Tegra20/30 and OMAP4. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7794: Add IIC nodesSimon Horman2016-04-201-0/+28
| | | | | | | | | | | | | | | | | | Add IIC nodes to r8a7794 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | ARM: dts: r8a7794: add IIC clocksSimon Horman2016-04-202-3/+8
| | | | | | | | | | | | | | | | | | Add IIC clocks to r8a7794 device tree. Based on similar work for the r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | ARM: dts: r8a7793: add CAN nodes to device treeSimon Horman2016-04-201-0/+22
| | | | | | | | | | | | | | | | Add CAN nodes to r8a7793 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7793: add CAN clocks to device treeSimon Horman2016-04-201-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree along with the USB_EXTAL clock from which clkp2 is derived. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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