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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"This branch contains part 1 of the platform updates for 3.10. Among
the highlights:
- Support for the new Atmel Cortex-A5 based platforms (SAMA5D3)
- New support for CSR SiRFatlas6 SoCs
- A handful of updates for NVidia T114 (a.k.a. Tegra 4)
- A bunch of updates for the shmobile platforms
- A handful of updates for davinci
- A few updates for Qualcomm MSM
- Plus a handful of other patches, defconfig updates, etc."
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (135 commits)
ARM: tegra: pm: fix build error w/o PM_SLEEP
ARM: davinci: ensure global variables are declared
ARM: davinci: sram.c: fix incorrect type in assignment
ARM: davinci: da8xx dt: make file local symbols static
ARM: davinci: da8xx: add remoteproc support
ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries
ARM: socfpga: Add clock entries into device tree
ARM: socfpga: Enable soft reset
ARM: EXYNOS: replace cpumask by the corresponding macro
ARM: EXYNOS: handle properly the return values
ARM: EXYNOS: factor out the idle states
ARM: OMAP4: Enable fix for Cortex-A9 erratas
ARM: OMAP2+: Export SoC information to userspace
ARM: OMAP2+: SoC name and revision unification
ARM: OMAP2+: Move common part of late init into common function
ARM: tegra: pm: remove duplicated include from pm.c
ARM: davinci: da850: override mmc DT node device name
ARM: davinci: da850: add mmc DT entries
mmc: davinci_mmc: add DT support
ARM: SAMSUNG: check processor type before cache restoration in resume
...
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Merge in the gic cleanup since it has a handful of annoying internal conflicts
with soc development branches. All of them are delete/delete conflicts.
* gic/cleanup:
irqchip: vic: add include of linux/irq.h
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
irqchip: gic: Call handle_bad_irq() directly
arm: Move chained_irq_(enter|exit) to a generic file
arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-shmobile/smp-emev2.c
arch/arm/mach-shmobile/smp-r8a7779.c
arch/arm/mach-shmobile/smp-sh73a0.c
arch/arm/mach-socfpga/platsmp.c
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This fixes the building error when the PM_SLEEP is disabled. The fucntional
defintion of "tegra_pm_validate_suspend_mode" without "static inline"
would become a multiple definition error.
Reported-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori:
v3.10 SoC updates for DaVinci
This set of patches add support for remoteproc
used to control the DSP and also fix sparse
errors existing for quite some time.
* tag 'davinci-for-v3.10/soc-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: ensure global variables are declared
ARM: davinci: sram.c: fix incorrect type in assignment
ARM: davinci: da8xx dt: make file local symbols static
ARM: davinci: da8xx: add remoteproc support
Signed-off-by: Olof Johansson <olof@lixom.net>
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Fix the following sparse warnings by declaring relevant
global variables.
CHECK arch/arm/mach-davinci/usb.c
arch/arm/mach-davinci/usb.c:134:12: warning: symbol 'da8xx_register_usb20' was not declared. Should it be static?
arch/arm/mach-davinci/usb.c:169:12: warning: symbol 'da8xx_register_usb11' was not declared. Should it be static?
CHECK arch/arm/mach-davinci/pm.c
arch/arm/mach-davinci/pm.c:155:12: warning: symbol 'davinci_pm_init' was not declared. Should it be static?
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Fix missing __iomem attribute. This fixes the sparse warning:
CHECK arch/arm/mach-davinci/sram.c
arch/arm/mach-davinci/sram.c:75:8: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-davinci/sram.c:75:8: expected void *addr
arch/arm/mach-davinci/sram.c:75:8: got void [noderef] <asn:2>*
arch/arm/mach-davinci/sram.c:81:12: warning: incorrect type in argument 1 (different address spaces)
arch/arm/mach-davinci/sram.c:81:12: expected void volatile [noderef] <asn:2>*addr
arch/arm/mach-davinci/sram.c:81:12: got void *addr
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Make some file-local functions static. This fixes the sparse
warnings:
CHECK arch/arm/mach-davinci/da8xx-dt.c
arch/arm/mach-davinci/da8xx-dt.c:23:13: warning: symbol 'da8xx_uart_clk_enable' was not declared. Should it be static?
arch/arm/mach-davinci/da8xx-dt.c:40:23: warning: symbol 'da850_auxdata_lookup' was not declared. Should it be static?
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Add remoteproc platform device for controlling the DSP
on da8xx. The patch uses CMA-based reservation of physical
memory block for DSP use. A new kernel command-line parameter
has been added to allow boot-time specification of the physical
memory block.
Signed-off-by: Robert Tivy <rtivy@ti.com>
[nsekhar@ti.com: edit commit message for readability and
style improvements]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/soc
From David Brown:
Patches for MSM core
These patches are changes to the MSM timer code that will be for
upcoming targets, including a generalization of the binding and
preventing a missing timer interrupt.
* tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Wait for timer clear to complete
ARM: msm: Rework timer binding to be more general
Signed-off-by: Olof Johansson <olof@lixom.net>
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Without looping on the status bit, there is no way to guarantee
that a clear of the timer has actually completed. This can cause
us to enable the timer before the count has cleared and miss a
timer interrupt. To simplify this patch, remove the timer
register setup done during timer init, since it's duplicate work
that is eventually done in the set_next_event() callback.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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The msm timer binding I wrote is bad. First off, the clock
frequency in the binding for the dgt is wrong. Software divides
down the input rate by 4 to achieve the rate listed in the
binding. We also treat each individual timer as a separate
hardware component, when in reality there is one timer block
(that may be duplicated per cpu) with multiple timers within it.
Depending on the version of the hardware there can be one or two
general purpose timers, status and divider control registers, and
an entirely different register layout.
In the next patch we'll need to know about the different register
layouts so that we can properly check the status register after
clearing the count. The current binding makes this complicated
because the general purpose timer's reg property doesn't indicate
where that status register is, and in fact it is beyond the size
of the reg property.
Clean all this up by just having one node for the timer hardware,
and describe all the interrupts and clock frequencies supported
while having one reg property that covers the entire timer
register region. We'll use the compatible field in the future to
determine different register layouts and if we should read the
status registers, etc.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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With this patch, the socfpga clk driver is able to query the clock and clock
rates appropriately.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Adds the main PLL clock groups for SOCFPGA into device tree file
so that the clock framework to query the clock and clock rates
appropriately.
$cat /sys/kernel/debug/clk/clk_summary
clock enable_cnt prepare_cnt rate
---------------------------------------------------------------------
osc1 2 2 25000000
sdram_pll 0 0 400000000
s2f_usr2_clk 0 0 66666666
ddr_dq_clk 0 0 200000000
ddr_2x_dqs_clk 0 0 400000000
ddr_dqs_clk 0 0 200000000
periph_pll 2 2 500000000
s2f_usr1_clk 0 0 50000000
per_base_clk 4 4 100000000
per_nand_mmc_clk 0 0 25000000
per_qsi_clk 0 0 250000000
emac1_clk 1 1 125000000
emac0_clk 0 0 125000000
main_pll 1 1 1600000000
cfg_s2f_usr0_clk 0 0 100000000
main_nand_sdmmc_clk 0 0 100000000
main_qspi_clk 0 0 400000000
dbg_base_clk 0 0 400000000
mainclk 0 0 400000000
mpuclk 1 1 800000000
smp_twd 1 1 200000000
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Enable a cold or warm reset to the HW from userspace.
Also fix a few sparse errors:
warning: symbol 'sys_manager_base_addr' was not declared. Should it be static?
warning: symbol 'rst_manager_base_addr' was not declared. Should it be static?
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim <kgene.kim@samsung.com>:
including various development for samsung for v3.10
* tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: replace cpumask by the corresponding macro
ARM: EXYNOS: handle properly the return values
ARM: EXYNOS: factor out the idle states
ARM: SAMSUNG: check processor type before cache restoration in resume
ARM: S3C64XX: Slow down mic detection rate for wm5102
ARM: S3C64XX: Clear DMA flags on channel request
ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend
ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0
ARM: EXYNOS: Add support for rtc wakeup
ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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A trivial patch to replace for_each_cpu(cpu_id, cpu_online_mask) by
the corresponding macro.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The cpuidle_register_driver return value is not checked.
The init function returns always -EIO when cpuidle_register_device
fails but the error could be different.
This patch fixes that by checking the cpuidle_register_driver properly
and returning the correct value when cpuidle_register_device fails.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The states are defined in the driver. We can get rid of the
intermediate cpuidle states initialization and the memcpy by
directly initializing the driver states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Only cortex-a9 based samsung platforms have l2x0 cache controller. Hence check
the same before restoring the cache in resume.
This is needed for single kernel image.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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A slightly slower rate provides more reliable jack detection during
slower insertions.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch clears the DMA flags when a DMA channel is requested. This is
necessary because otherwise the channel may inherit incompatible
settings from its last usage.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Setting this bit to 0 causes the system to wait until suspended
to use the wakeup masks. With it being set high previously,
masked interrupts were being received and processed before the
EINT_WAKEUP_MASK was configured.
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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For legacy reasons EINT_0 was being forced on for all
exynos systems as a wake interrupt. For boards that need
EINT_0 they should probably enable it with enable_irq_wake
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Set the gic arch extension callback to support rtc wakeup.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The s5p_csis_phy_enable/s5p_dsim_phy_enable functions are now used
directly by corresponding drivers and thus need to be exported so
the drivers can be built as modules.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: defconfig changes
Various new features are enabled:
* Tegra114 support.
* Various PMICs and related options for Tegra114 platforms.
* KEYBOARD_GPIO, mainly as a suspend wakeup source.
* tegra_defconfig is rebuilt based on v3.9-rc1, which causes various
layout changes.
This branch is based on v3.9-rc1.
* tag 'tegra-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: defconfig updates
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Update tegra_defconfig to:
* Enable CONFIG_ARCH_TEGRA_114_SOC.
* Enable various PMIC and related options for Tegra114 platforms Dalmore
and pluto: Palmas, TPS51362, TPS65090.
* Enable KEYBOARD_GPIO, mainly as a suspend wakeup source.
* Rebuild tegra_defconfig based on v3.9-rc1, hence picking up various
move/remove changes, and removing some entries for now-default or
selected options.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren <tony@atomide.com>:
Changes needed for enabling SOC_BUS for the SoC revision
information. Also enable few HW errata workarounds for omap4.
* tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (236 commits)
ARM: OMAP4: Enable fix for Cortex-A9 erratas
ARM: OMAP2+: Export SoC information to userspace
ARM: OMAP2+: SoC name and revision unification
ARM: OMAP2+: Move common part of late init into common function
Includes an update to Linux 3.9-rc6
Conflicts:
arch/arm/mach-omap2/cclock44xx_data.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This enables the fixes for the below erratas
applicable for OMAP4 Socs.
754322: Faulty MMU translations following ASID switch
775420: A data cache maintenance operation which aborts,
followed by an ISB, without any DSB in-between,
might lead to deadlock
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In some situations it is useful for userspace to
know some SoC-specific information. For example,
this may be used for deciding what kernel module to
use or how to better configure some settings etc.
This patch exports OMAP SoC information to userspace
using existing in Linux kernel SoC infrastructure.
This information can be read under
/sys/devices/socX directory
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
[tony@atomide.com: updated for multiplatform changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This is a long story where for each new generation of
OMAP we used different approaches for creating
strings for SoCs names and revisions that this patch
fixes. It makes future exporting of this information
to SoC infrastructure easier.
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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into next/soc
From Shawn Guo <shawn.guo@linaro.org>:
The mxs soc changes for 3.10:
* A few mxs_defconfig changes
* Select ARM_CPU_SUSPEND for suspend testing
* tag 'mxs-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs_defconfig: Select watchdog driver
ARM: mxs_defconfig: Select CONFIG_MMC_UNSAFE_RESUME
ARM: mxs_defconfig: Build CONFIG_INPUT_EVDEV as built-in
ARM: mxs: Select ARM_CPU_SUSPEND
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Select watchdog driver.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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PM subsystem treats mmc card as removed during suspend.
If MMC is used to store the root file system, it is better to tell the kernel
not to treat it as a removable media, so select CONFIG_MMC_UNSAFE_RESUME for
such purpose.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Build CONFIG_INPUT_EVDEV as a built-in driver, as it makes easier to test
the LRADC touchscreen driver, for example, by using the 'evtest' tool.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Select ARM_CPU_SUSPEND so that suspend/resume can be tested on mxs platforms.
Tested on a mx28evk board:
$ echo enabled > /sys/devices/80000000.apb/80040000.apbx/80074000.serial/tty/ttyAMA0/power/wakeup
$ echo mem > /sys/power/state
[ 507.040000] PM: Syncing filesystems ... done.
[ 507.060000] mmc0: card e624 removed
[ 507.160000] Freezing user space processes ... (elapsed 0.01 seconds) done.
[ 507.180000] Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
[ 507.200000] Suspending console(s) (use no_console_suspend to debug)
(Then send any character via DUART to wakeup the system).
[ 507.220000] PM: suspend of devices complete after 10.468 msecs
[ 507.220000] PM: late suspend of devices complete after 3.531 msecs
[ 507.230000] PM: noirq suspend of devices complete after 5.187 msecs
[ 507.230000] PM: noirq resume of devices complete after 2.312 msecs
[ 507.230000] PM: early resume of devices complete after 2.437 msecs
[ 507.320000] PM: resume of devices complete after 81.312 msecs
[ 507.360000] Restarting tasks ... done.
[ 507.530000] mmc0: new SDHC card at address e624
[ 507.550000] mmcblk0: mmc0:e624 SU04G 3.69 GiB
[ 507.560000] mmcblk0: p1 p2 p3
[ 509.240000] libphy: 800f0000.etherne:01 - Link is Down
[ 511.240000] libphy: 800f0000.etherne:01 - Link is Up
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: core SoC support development
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
* tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: pm: remove duplicated include from pm.c
ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
ARM: tegra: pm: add platform suspend support
ARM: dt: tegra: add bindings of power management configurations for PMC
ARM: tegra: irq: add wake up handling
gpio: tegra: add gpio wakeup source handling
ARM: tegra: moving the CPU power timer function to PMC driver
ARM: tegra: add clock source of PMC to device trees
ARM: tegra: add speedo-based process id for Tegra114
ARM: tegra: expose chip ID and revision
ARM: tegra: bring up secondary CPU for Tegra114
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Remove duplicated include.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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After the patch series for system suspending support, tegra_idle_lp2_last()
no longer uses its parameters cpu_on_time or cpu_off_time, so remove them.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Adding suspend to RAM support for Tegra platform. There are three suspend
mode for Tegra. The difference were below.
* LP2: CPU voltage off
* LP1: CPU voltage off, DRAM in self-refresh
* LP0: CPU + Core voltage off, DRAM in self-refresh
After this patch, the LP2 suspend mode will be supported.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the wake up handling for legacy irq controller, and using
IRQCHIP_MASK_ON_SUSPEND for wake irq handling.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This patch add the gpio wakeup source handling for the Tegra platform. It
was be done by enabling the irq for the gpio in the gpio controller and
enabling the bank irq of the gpio in the Tegra legacy irq controller when
the system going to suspend.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The CPU power timer set up function was related to PMC register. Now moving
it to PMC driver. And it also help to clean up the PM related code later.
The timer was calculated based on the input clock of PMC. In this patch, we
also get the clock from DT.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Adding the bindings of the clock source of PMC in DT.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add speedo-based process identification for Tegra114.
Based on the work by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren: added include of bug.h]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Expose Tegra chip ID and revision in /sys/devices/soc for user mode
usage
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The secondary CPU can be brought up by toggling the power in PMC. Then
the flow controller will release CPU to go by clearing the reset and
clamp signal automatically.
Based on the work by:
Bo Yan <byan@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This is a dependency for the tegra/soc branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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