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* clk: ti: add composite clock supportTero Kristo2014-01-175-4/+336
* CLK: TI: add autoidle supportTero Kristo2014-01-175-1/+188
* CLK: TI: Add DPLL clock supportTero Kristo2014-01-176-165/+807
* CLK: ti: add init support for clock IP blocksTero Kristo2014-01-174-3/+150
* CLK: TI: add DT alias clock registration mechanismTero Kristo2014-01-174-0/+101
* ARM: DRA7XX: Add support for DRA7XX only buildTero Kristo2014-01-172-8/+11
* ARM: DRA7XX/AM43XX: randconfig fixesTero Kristo2014-01-171-0/+3
* Merge remote-tracking branch 'linaro/clk-next' into clk-nextMike Turquette2014-01-16135-4584/+28392
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| * devicetree: bindings: Document qcom,mmccStephen Boyd2014-01-161-0/+21
| * devicetree: bindings: Document qcom,gccStephen Boyd2014-01-161-0/+21
| * clk: qcom: Add support for MSM8660's global clock controller (GCC)Stephen Boyd2014-01-165-0/+3238
| * clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)Stephen Boyd2014-01-165-0/+2858
| * clk: qcom: Add support for MSM8974's global clock controller (GCC)Stephen Boyd2014-01-165-0/+3119
| * clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)Stephen Boyd2014-01-165-0/+2561
| * clk: qcom: Add support for MSM8960's global clock controller (GCC)Stephen Boyd2014-01-165-0/+3434
| * clk: qcom: Add reset controller supportStephen Boyd2014-01-164-1/+102
| * clk: qcom: Add support for branches/gate clocksStephen Boyd2014-01-163-0/+216
| * clk: qcom: Add support for root clock generators (RCGs)Stephen Boyd2014-01-164-0/+969
| * clk: qcom: Add support for phase locked loops (PLLs)Stephen Boyd2014-01-163-0/+289
| * clk: qcom: Add a regmap type clock structStephen Boyd2014-01-166-0/+170
| * clk: Add set_rate_and_parent() opStephen Boyd2014-01-163-19/+77
| * reset: Silence warning in reset-controller.hStephen Boyd2014-01-161-0/+1
| * clk: sirf: re-arch to make the codes support both prima2 and atlas6Barry Song2014-01-167-172/+458
| * clk: composite: pass mux_hw into determine_rateMike Turquette2014-01-151-1/+1
| * Merge branch 'clk-next-shmobile' into clk-nextMike Turquette2014-01-141-4/+8
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| | * clk: shmobile: Fix MSTP clock array initializationValentine Barshak2014-01-141-2/+6
| | * clk: shmobile: Fix MSTP clock indexValentine Barshak2014-01-141-2/+2
| * | Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette2014-01-0814-1170/+1963
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| | * | ARM: dts: exynos5420: add input clocks to audss clock controllerAndrew Bresticker2014-01-081-2/+2
| | * | clk: exynos-audss: add support for Exynos 5420Andrew Bresticker2014-01-083-10/+40
| | * | ARM: dts: exynos5250: add input clocks to audss clock controllerAndrew Bresticker2014-01-081-0/+2
| | * | clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker2014-01-083-1/+3
| | * | clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker2014-01-082-7/+50
| | * | clk: exynos-audss: convert to platform deviceAndrew Bresticker2014-01-081-16/+88
| | * | clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-47/+34
| | * | ARM: exynos5440: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+42
| | * | clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-339/+309
| | * | ARM: exynos5420: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+188
| | * | clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-295/+264
| | * | ARM: exynos5250: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+159
| | * | clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-455/+402
| | * | ARM: exynos4: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+244
| | * | clk: exynos5250: register APLL rate tableAndrew Bresticker2014-01-081-1/+24
| | * | clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat2013-12-301-1/+2
| | * | clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa2013-12-301-3/+5
| | * | clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa2013-12-301-3/+3
| | * | clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa2013-12-301-4/+12
| | * | clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa2013-12-301-6/+8
| | * | clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa2013-12-301-8/+17
| | * | clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa2013-12-301-122/+123
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