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* Merge branch 'topic/stowe-cap-cleanup' into nextBjorn Helgaas2012-06-183-49/+73
|\ | | | | | | | | | | | | | | * topic/stowe-cap-cleanup: PCI: remove redundant capabilities checking in pci_{save, restore}_pcie_state PCI: add pci_pcie_cap2() check for PCIe feature capabilities >= v2 PCI: remove redundant checking in PCI Express capability routines PCI: make pci_ltr_supported() static
| * PCI: remove redundant capabilities checking in pci_{save, restore}_pcie_stateMyron Stowe2012-06-111-18/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike PCI Express v1's Capabilities Structure, v2's requires the entire structure to be implemented. In v2 structures, register fields that are not implemented are present but hardwired to 0x0. These may include: Link Capabilities, Status, and Control; Slot Capabilities, Status, and Control; Root Capabilities, Status, and Control; and all of the '2' (Device, Link, and Slot) Capabilities, Status, and Control registers. This patch removes the redundant capability checks corresponding to the Link 2's and Slot 2's, Capabilities, Status, and Control registers as they will be present if Device Capabilities 2's registers are (which explains why the macros for each of the three are identical). Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: add pci_pcie_cap2() check for PCIe feature capabilities >= v2Myron Stowe2012-06-112-15/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch resolves potential issues when accessing PCI Express Capability structures. The makeup of the capability varies substantially between v1 and v2: Version 1 of the PCI Express Capability (defined by PCI Express 1.0 and 1.1 base) neither requires the endpoint to implement the entire PCIe capability structure nor specifies default values of registers that are not implemented by the device. Version 2 of the PCI Express Capability (defined by PCIe 1.1 Capability Structure Expansion ECN, PCIe 2.0, 2.1, and 3.0) added additional registers to the structure and requires all registers to be either implemented or hardwired to 0. Due to the differences in the capability structures, code dealing with capability features must be careful not to access the additional registers introduced with v2 unless the device is specifically known to be a v2 capable device. Otherwise, attempts to access non-existant registers will occur. This is a subtle issue that is hard to track down when it occurs (and it has - see commit 864d296cf94). To try and help mitigate such occurrences, this patch introduces pci_pcie_cap2() which is similar to pci_pcie_cap() but also checks that the PCIe capability version is >= 2. pci_pcie_cap2() should be used for qualifying PCIe capability features introduced after v1. Suggested by Don Dutile. Acked-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: remove redundant checking in PCI Express capability routinesMyron Stowe2012-06-111-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a number of redundant pci_is_pcie() checks in various PCI Express capabilities related routines like the following: if (!pci_is_pcie(dev)) return false; pos = pci_pcie_cap(dev); if (!pos) return false; The current pci_is_pcie() implementation is merely: static inline bool pci_is_pcie(struct pci_dev *dev) { return !!pci_pcie_cap(dev); } so we can just drop the pci_is_pcie() test in such cases. Acked-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: make pci_ltr_supported() staticMyron Stowe2012-06-112-3/+1
| | | | | | | | | | | | | | | | | | The PCI Express Latency Tolerance Reporting (LTR) feature's pci_ltr_supported() routine is currently only used within drivers/pci/pci.c so make it static. Acked-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | Merge branch 'topic/alex-vfio-prep' into nextBjorn Helgaas2012-06-137-25/+312
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | * topic/alex-vfio-prep: PCI: misc pci_reg additions PCI: create common pcibios_err_to_errno PCI: export pci_user functions for use by other drivers PCI: add ACS validation utility PCI: add PCI DMA source ID quirk
| * | PCI: misc pci_reg additionsAlex Williamson2012-06-121-12/+101
| | | | | | | | | | | | | | | | | | | | | Fill in many missing definitions and add sizeof fields for many sections allowing for more extensive config parsing. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: create common pcibios_err_to_errnoAlex Williamson2012-06-122-3/+29
| | | | | | | | | | | | | | | | | | | | | For returning errors out to non-PCI code. Re-name xen's version. Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: export pci_user functions for use by other driversAlex Williamson2012-06-123-9/+12
| | | | | | | | | | | | | | | | | | | | | VFIO PCI support will make use of these for user-initiated PCI config accesses. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: add ACS validation utilityAlex Williamson2012-06-123-1/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a PCI environment, transactions aren't always required to reach the root bus before being re-routed. Intermediate switches between an endpoint and the root bus can redirect DMA back downstream before things like IOMMUs have a chance to intervene. Legacy PCI is always susceptible to this as it operates on a shared bus. PCIe added a new capability to describe and control this behavior, Access Control Services, or ACS. The utility function pci_acs_enabled() allows us to test the ACS capabilities of an individual devices against a set of flags while pci_acs_path_enabled() tests a complete path from a given downstream device up to the specified upstream device. We also include the ability to add device specific tests as it's likely we'll see devices that do not implement ACS, but want to indicate support for various capabilities in this space. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: add PCI DMA source ID quirkAlex Williamson2012-06-112-0/+59
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMA transactions are tagged with the source ID of the device making the request. Occasionally hardware screws this up and uses the source ID of a different device (often the wrong function number of a multifunction device). A specific Ricoh multifunction device is a prime example of this problem and included in this patch. Given a pci_dev, this function returns the pci_dev to use as the source ID for DMA. When hardware works correctly, this returns the input device. For the components of the Ricoh multifunction device, it returns the pci_dev for function 0. This will be used by IOMMU drivers for determining the boundaries of IOMMU groups as multiple devices using the same source ID must be contained within the same group. This can also be used by existing streaming DMA paths for the same purpose. [bhelgaas: fold in pci_dev_get() for !CONFIG_PCI] Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | Merge branch 'topic/bjorn-remove-unused' into nextBjorn Helgaas2012-06-133-70/+1
|\ \ | | | | | | | | | | | | | | | | | | * topic/bjorn-remove-unused: PCI/AER: use pci_is_pcie() instead of obsolete pci_dev.is_pcie PCI: remove pci_max_busnr() (was already commented out) PCI: remove pci_bus_find_ext_capability() (unused)
| * | PCI/AER: use pci_is_pcie() instead of obsolete pci_dev.is_pcieBjorn Helgaas2012-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use pci_is_pcie() instead of looking at obsolete is_pcie field in struct pci_dev. CC: Huang Ying <ying.huang@intel.com> CC: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: remove pci_max_busnr() (was already commented out)Bjorn Helgaas2012-06-111-24/+0
| | | | | | | | | | | | | | | | | | | | | pci_max_busnr() has been commented out for years (since 54c762fe62), and this patch removes it completely. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: remove pci_bus_find_ext_capability() (unused)Bjorn Helgaas2012-06-112-45/+0
| |/ | | | | | | | | | | pci_bus_find_ext_capability() is unused, and this patch removes it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | Merge branch 'topic/kong-acpiphp-remove' into nextBjorn Helgaas2012-06-132-10/+35
|\ \ | | | | | | | | | | | | | | | * topic/kong-acpiphp-remove: PCI: acpiphp: remove all functions in slot, even without ACPI _EJx PCI: acpiphp: fix function 0 leak when disabling a slot
| * | PCI: acpiphp: remove all functions in slot, even without ACPI _EJxAmos Kong2012-06-132-10/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we add a device with acpiphp, we enumerate all functions in the slot with pci_scan_slot(), regardless of whether they have associated ACPI methods such as _EJ0. When removing the device, we previously removed only the functions with those ACPI methods. This patch makes the remove symmetric with the add: we remove all functions in the slot, whether they have associated ACPI methods or not. With qemu-kvm and SeaBIOS, we can build a multi-function device where only function 0 has _EJ0 and _ADR (see bugzilla below). Removing and re-adding that slot (including all functions of the device) works correctly with Windows guests. This patch makes it also work in Linux guests. [bhelgaas: restructure loop iteration, pull out of slot->funcs loop] Reference: https://bugzilla.kernel.org/show_bug.cgi?id=43219 Signed-off-by: Amos Kong <kongjianjun@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | PCI: acpiphp: fix function 0 leak when disabling a slotAmos Kong2012-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, we acquired two references to function 0, but only released one. [bhelgaas: split this out from "remove all functions" fix] Signed-off-by: Amos Kong <kongjianjun@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | | Merge branch 'topic/yinghai-busn-alloc' into nextBjorn Helgaas2012-06-1344-245/+367
|\ \ \ | |/ / | | / | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * topic/yinghai-busn-alloc: (33 commits) PCI: hotplug: remove pci_do_scan_bus() PCI: sgihp: use generic pci_hp_add_bridge() PCI: ibmhp: use generic pci_hp_add_bridge() PCI: cpqhp: use generic pci_hp_add_bridge() PCI: shpchp: use generic pci_hp_add_bridge() PCI: cpci_hotplug: use generic pci_hp_add_bridge() PCI: pciehp: use generic pci_hp_add_bridge() PCI: add generic pci_hp_add_bridge() PCI: sgihp: register busn_res PCI: ibmhp: register busn_res PCI: cpqhp: register busn_res PCI: shpchp: register busn_res PCI: cpci_hotplug: register busn_res PCI: insert busn_res for child bus PCI: register busn_res for iov bus tile/PCI: use pci_scan_root_bus instead pci_scan_bus parisc/PCI: register busn_res for root buses powerpc/PCI: register busn_res for root buses sparc/PCI: register busn_res for root buses ia64/PCI: register busn_res for root buses ...
| * PCI: hotplug: remove pci_do_scan_bus()Yinghai Lu2012-06-132-16/+0
| | | | | | | | | | | | | | | | | | | | All callers of pci_do_scan_bus() are gone, so remove it. Note that pci_do_scan_bus() was exported, so out-of-tree modules could depend on it. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: sgihp: use generic pci_hp_add_bridge()Yinghai Lu2012-06-131-9/+5
| | | | | | | | | | | | | | Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: ibmhp: use generic pci_hp_add_bridge()Yinghai Lu2012-06-131-6/+4
| | | | | | | | | | | | | | Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: cpqhp: use generic pci_hp_add_bridge()Yinghai Lu2012-06-131-6/+4
| | | | | | | | | | | | | | Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: shpchp: use generic pci_hp_add_bridge()Yinghai Lu2012-06-131-32/+15
| | | | | | | | | | | | | | Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: cpci_hotplug: use generic pci_hp_add_bridge()Yinghai Lu2012-06-131-31/+6
| | | | | | | | | | | | | | Use the new generic pci_hp_add_bridge() interface. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: pciehp: use generic pci_hp_add_bridge()Yinghai Lu2012-06-131-26/+2
| | | | | | | | | | | | | | Use the new generic pci_hp_add_bridge() interface. [bhelgaas: split "add generic pci_hp_add_bridge()" into a separate patch] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: add generic pci_hp_add_bridge()Yinghai Lu2012-06-132-0/+24
| | | | | | | | | | | | | | | | This creates a generic pci_hp_add_bridge() that can be used by several hotplug drivers. [bhelgaas: split out from pciehp patch] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: sgihp: register busn_resYinghai Lu2012-06-131-1/+3
| | | | | | | | Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: ibmhp: register busn_resYinghai Lu2012-06-131-1/+3
| | | | | | | | Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: cpqhp: register busn_resYinghai Lu2012-06-131-1/+3
| | | | | | | | Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: shpchp: register busn_resYinghai Lu2012-06-131-1/+3
| | | | | | | | Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: cpci_hotplug: register busn_resYinghai Lu2012-06-131-1/+3
| | | | | | | | Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: insert busn_res for child busYinghai Lu2012-06-131-2/+3
| | | | | | | | | | | | Now we can insert busn_res now, after all root bus's get inserted. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: register busn_res for iov busYinghai Lu2012-06-131-1/+1
| | | | | | | | | | | | Insert that to tree. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * tile/PCI: use pci_scan_root_bus instead pci_scan_busYinghai Lu2012-06-131-1/+4
| | | | | | | | | | | | | | It will update busn_res accordingly, so we get that for last_busno. Acked-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * parisc/PCI: register busn_res for root busesYinghai Lu2012-06-132-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog, set flags directly, at LBA bus_num init] CC: Kyle McMartin <kyle@mcmartin.ca> CC: Helge Deller <deller@gmx.de> CC: linux-parisc@vger.kernel.org Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * powerpc/PCI: register busn_res for root busesYinghai Lu2012-06-133-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog] CC: Paul Mackerras <paulus@samba.org> CC: linuxppc-dev@lists.ozlabs.org CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * sparc/PCI: register busn_res for root busesYinghai Lu2012-06-132-3/+6
| | | | | | | | | | | | | | | | | | | | | | Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog, fix "pci_last_busn" typo] Acked-by: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * ia64/PCI: register busn_res for root busesYinghai Lu2012-06-131-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add the host bridge bus number aperture from _CRS to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog] CC: Tony Luck <tony.luck@intel.com> CC: Fenghua Yu <fenghua.yu@intel.com> CC: linux-ia64@vger.kernel.org Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * x86/PCI: put busn resource in pci_root_info for native host bridge driversYinghai Lu2012-06-133-9/+23
| | | | | | | | | | | | | | | | | | Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this will be used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog, tidy printk] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * x86/PCI: use _CRS bus number aperture for host bridges from ACPIYinghai Lu2012-06-131-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add the host bridge bus number aperture from _CRS to the resource list. Like the MMIO and I/O port apertures, this will be used when assigning resources to hot-added devices or in the case of conflicts. Note that we always use the _CRS bus number aperture, even if we're ignoring _CRS otherwise. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: add default busn_res for pci_scan_bus()Yinghai Lu2012-06-131-2/+4
| | | | | | | | | | | | also do not need to shrink busn_res. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: add default busn_resourceYinghai Lu2012-06-132-0/+9
| | | | | | | | | | | | We need to put into the resources list for legacy system. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: checking busn_res in pci_scan_root_bus()Yinghai Lu2012-06-131-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some callers do not supply the bus number aperture, usually because they do not know the end. In this case, we assume the aperture extends from the root bus number to bus 255, scan the bus, and shrink the bus number resource so it ends at the largest bus number we found. This is obviously not correct because the actual end of the aperture may well be larger than the largest bus number we found. But I guess it's all we have for now. Also print out one info about that, so we could find out which path does not have busn_res in resources list. [bhelgaas: changelog, _safe iterator unnecessary, use %pR format for bus] Signed-off-by: Yinghai Lu <yinghai@kernel.org>
| * PCI: insert busn_res in pci_create_root_bus()Yinghai Lu2012-06-131-1/+4
| | | | | | | | | | | | That busn_res is from resources list. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: release busn_res when removing busYinghai Lu2012-06-131-0/+1
| | | | | | | | | | | | Release bus number resource when removing a bus. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: add busn_res operation functionsYinghai Lu2012-06-132-0/+71
| | | | | | | | | | | | | | Will use them insert/update busn res in pci_bus struct. [bhelgaas: print conflicting entry if insertion fails] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * resources: allow adjust_resource() for resources with no parentYinghai Lu2012-06-131-5/+8
| | | | | | | | | | | | | | | | If a resource has no parent, allow its start/end to be set arbitrarily as long as any children are still contained within the new range. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: build a bus number resource tree for every domainYinghai Lu2012-06-131-0/+30
| | | | | | | | | | | | | | | | | | | | This adds get_pci_domain_busn_res(), which returns the root of the bus number resource tree for a domain, creating it if necessary. We will later populate the tree with the bus numbers used by host bridges and P2P bridges in the domain. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: remove secondary/subordinate in struct pci_busYinghai Lu2012-06-131-2/+0
| | | | | | | | | | | | The pci_bus secondary/subordinate members are now unused, so remove them. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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