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* pinctrl: mediatek: add input-enable setting in gpio_request_enableBiao Huang2016-02-191-0/+1
| | | | | | | | Since input-disable cuts off input signal of gpio, add input-enable setting in .gpio_request_enable implementation to ensure gpio function well Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mtk2701: skip setting .ownerLinus Walleij2016-02-171-1/+0
| | | | | | The device core will handle this and Coccinelle complains. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: ipq4019: Add IPQ4019 pinctrl supportVaradarajan Narayanan2016-02-164-0/+536
| | | | | | | | | | | | | | Add pinctrl driver support for IPQ4019 platform Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> [Dropped .owner assignment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: fix handling return value of mtk_pmx_find_gpio_modeAndrzej Hajda2016-02-161-1/+1
| | | | | | | | | | | | | The function can return negative values, so its result should be assigned to signed variable. The problem has been detected using coccinelle semantic patch scripts/coccinelle/tests/assign_signed_to_unsigned.cocci. Fixes: 59ee9c9 ('pinctrl: mediatek: Add gpio_request_enable support') Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Turn AMD support to tristateJean Delvare2016-02-161-1/+1
| | | | | | | | | The pinctrl-amd driver builds just fine as a module so give users this option. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: coh901: fix initconst annotationArnd Bergmann2016-02-151-1/+1
| | | | | | | | | | | | | Clang correctly points out that the section attribute for u300_gpio_confdata is in the wrong place: drivers/pinctrl/pinctrl-coh901.c:130:37: error: '__section__' attribute only applies to functions and global variables This moves it from the type name to the variable, so it actually gets discarded. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Fix return value check in amd_gpio_probe()Wei Yongjun2016-02-151-2/+2
| | | | | | | | | In case of error, the function devm_ioremap_nocache() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: zynq: fix typo in group name for qspi1Helmut Buchsbaum2016-02-151-1/+1
| | | | | | | | | | | | | Due to a typo Zynq pin controller does not set pin function of qspi1 when using function qspi1. So pin group for qspi1 has to be renamed to "qspi1_0_grp" as outlined in the corresponding bindings documentation. This also removes kernel message: zynq-pinctrl 700.pinctrl: invalid group "qspi1_0_grp" for function "qspi1" Signed-off-by: Helmut Buchsbaum <helmut.buchsbaum@gmail.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: guard sub-directory with CONFIG_PINCTRL_MTKMasahiro Yamada2016-02-133-13/+13
| | | | | | | | | | | | CONFIG_PINCTRL_MTK is more suitable than CONFIG_ARCH_MEDIATEK to guard the drivers/pinctrl/mediatek/ directory. (I renamed CONFIG_PINCTRL_MTK_COMMON to CONFIG_PINCTRL_MTK.) This allows COMPILE_TEST to descend into drivers/pinctrl/mediatek without CONFIG_ARCH_MEDIATEK define. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: intel: Remove unneeded header includesJean Delvare2016-02-121-4/+0
| | | | | | | | | | | pinctrl-intel doesn't use anything from <linux/init.h>, <linux/acpi.h>, <linux/gpio.h> or <linux/pm.h>, so it should not include these header files. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Use pin number when calling sunxi_pmx_setKrzysztof Adamski2016-02-111-2/+3
| | | | | | | | | | | | | | | | sunxi_pmx_set accepts pin number and then calculates offset by subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, gets offset so we have to convert it to pin number so we won't get negative value in sunxi_pmx_set. This was only used on A10 so far, where there is only one GPIO chip with pin_base set to 0 so it didn't matter. However H3 also requires this workaround but have two pinmux sections, triggering problem for PL port. Signed-off-by: Krzysztof Adamski <k@japko.eu> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Add H3 R_PIO controller supportKrzysztof Adamski2016-02-113-0/+111
| | | | | | | | | H3 has additional PIO controller similar to what we can find on A23. It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. Signed-off-by: Krzysztof Adamski <k@japko.eu> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: rockchip: add support for the rk3399David Wu2016-02-102-15/+356
| | | | | | | | | The pinctrl of rk3399 is much different from other's, especially the 3bits of drive strength. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: uniphier: add COMPILE_TEST optionMasahiro Yamada2016-02-101-1/+1
| | | | | | | Add COMPILE_TEST for the compilation test coverage. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'devel-mt2701' into develLinus Walleij2016-02-097-1/+3712
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| * pinctrl: mediatek: Add gpio_request_enable supportBiao Huang2016-02-051-0/+36
| | | | | | | | | | | | | | | | | | Implement the .gpio_request_enable() callbacks in struct pinmux_ops in mediatek pinctrl driver. Make sure that when gpio_request is called, GPIO on the pin is enabled. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: mediatek: Add Pinctrl/GPIO/EINT driver for mt2701Biao Huang2016-01-286-1/+2941
| | | | | | | | | | | | | | | | | | | | Add mt2701 support using mediatek common pinctrl driver. MT2701 have some special pins need an extra setting register than other ICs, so adding this support to common code. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Acked-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: dt bindings: Add pinfunc header file for mt2701Biao Huang2016-01-281-0/+735
| | | | | | | | | | | | | | | | Add pinfunc header file, mt2701 related dts will include it Signed-off-by: Biao Huang <biao.huang@mediatek.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: stm32: Fix compile testing selectionMaxime Coquelin2016-02-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | While selecting the driver for compile testing seemed possible, the driver was not compiled because the driver directory was only added if ARCH_STM32 was selected. This patch now makes the pinctrl Makefile to add stm32 directory if PINCTRL_STM32 is selected. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: stm32: Remove dependency with DT bindings header filesMaxime Coquelin2016-02-092-2/+8
| | | | | | | | | | | | | | | | | | | | Some macros where defined in DT bindings headers, whereas only used in the driver. This patch moves these macros to the driver side. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: pinctrl-pic32: Add PIC32 pin control driverJoshua Henderson2016-02-054-0/+2471
| | | | | | | | | | | | | | | | | | | | | | | | Add a driver for the pin controller present on the Microchip PIC32 including the specific variant PIC32MZDA. This driver provides pinmux and pinconfig operations as well as GPIO and IRQ chips for the GPIO banks. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Add DT bindings for PIC32 pin control and GPIOJoshua Henderson2016-02-052-0/+109
| | | | | | | | | | | | | | | | | | | | | | Document the devicetree bindings for PINCTRL and GPIO found on Microchip PIC32 class devices. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Acked-by: Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: stm32: fix compile error and modernizeLinus Walleij2016-02-051-9/+6
| | | | | | | | | | | | | | | | | | | | - Fix the dev->parent assignment compile error - Use gpiochip_get_data() to get the data pointer for the banks Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: tegra: move Tegra pinctrl drivers to sub-directoryMasahiro Yamada2016-02-0512-42/+43
| | | | | | | | | | | | | | | | | | Tegra has several pinctrl drivers. Now it is reasonable enough to move them into drivers/pinctrl/tegra/. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXIMasahiro Yamada2016-01-283-17/+17
| | | | | | | | | | | | | | | | | | | | CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: nomadik: stn8815 CLCD alternate functionsLinus Walleij2016-01-281-0/+7
| | | | | | | | | | | | | | | | The STn8815 has 22 dedicated pins for CLCD with up to 16 bits in parallel, but pins 32 thru 39 can be used for an additional CLCD signal lines 16 thru 23. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: pxa: guard sub-directory with CONFIG_PINCTRL_PXAMasahiro Yamada2016-01-281-1/+1
| | | | | | | | | | | | | | | | CONFIG_PINCTRL_PXA is more suitable than CONFIG_ARCH_PXA to guard the drivers/pinctrl/pxa/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: qcom: spmi-mpp: Skip pullup on ULT type MPPsStephen Boyd2016-01-271-10/+20
| | | | | | | | | | | | | | | | | | | | The ULT type of MPPs don't have a pullup. Skip configuring the pullup on these types of pins. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: freescale: imx: implement gpio_disable_free for VybridStefan Agner2016-01-271-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale Vybrid SoC has GPIO capabilities as part of the IOMUXC. To enable GPIO's, the gpio_request_enable callback has been implemented, however the corsponding gpio_disable_free callback is missing. So far, disabling (unexporting) a GPIO left the pin in its last state. Implement a proper gpio_disable_free function which clears the three enable bits which influence the state (IBE, OBE and PUE). Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mediatek: mt8* make driver explicitly non-modularPaul Gortmaker2016-01-273-21/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig for these drivers are currently: config PINCTRL_MT8127 bool "Mediatek MT8127 pin control" if COMPILE_TEST && !MACH_MT8127 config PINCTRL_MT8135 bool "Mediatek MT8135 pin control" if COMPILE_TEST && !MACH_MT8135 config PINCTRL_MT8173 bool "Mediatek MT8173 pin control" ...meaning that they are currently not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. A recent commit moved these from module_init to arch_initcall already, so the init ordering remains untouched with this commit. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Daniel Kurtz <djkurtz@chromium.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Hongzhou Yang <hongzhou.yang@mediatek.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Add STM32 MCUs supportMaxime Coquelin2016-01-277-0/+2498
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl and GPIO support to STMicroelectronic's STM32 family of MCUs. While it only supports STM32F429 for now, it has been designed to enable support of other MCUs of the family (e.g. STM32F746). Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Documentation: dt-bindings: Document STM32 pinctrl driver DT bindingsMaxime Coquelin2016-01-271-0/+126
| | | | | | | | | | | | | | Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: st: activate strict mux modePatrice Chotard2016-01-271-0/+1
|/ | | | | | | | | This activates strict mode muxing for the ST pin controllers, as these do not allow GPIO and functions to use the same pin simultaneously. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Linux 4.5-rc1v4.5-rc1Linus Torvalds2016-01-241-2/+2
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-01-24130-676/+4923
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes. The executive summary: - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY. - Avoid useless rebuilds for zboot. - jz4780: Add NEMC, BCH and NAND device tree nodes - Initial support for the MicroChip's DT platform. As all the device drivers are missing this is still of limited use. - Some Loongson3 cleanups. - The unavoidable whitespace polishing. - Reduce clock skew when synchronizing the CPU cycle counters on CPU startup. - Add MIPS R6 fixes. - Lots of cleanups across arch/mips as fallout from KVM. - Lots of minor fixes and changes for IEEE 754-2008 support to the FPU emulator / fp-assist software. - Minor Ralink, BCM47xx and bcm963xx platform support improvments. - Support SMP on BCM63168" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits) MIPS: zboot: Add support for serial debug using the PROM MIPS: zboot: Avoid useless rebuilds MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function MIPS: bcm963xx: Update bcm_tag field image_sequence MIPS: bcm963xx: Move extended flash address to bcm_tag header file MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure MIPS: bcm63xx: nvram: Use nvram structure definition from header file MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure MAINTAINERS: Add KVM for MIPS entry MIPS: KVM: Add missing newline to kvm_err() MIPS: Move KVM specific opcodes into asm/inst.h MIPS: KVM: Use cacheops.h definitions MIPS: Break down cacheops.h definitions MIPS: Use EXCCODE_ constants with set_except_vector() MIPS: Update trap codes MIPS: Move Cause.ExcCode trap codes to mipsregs.h MIPS: KVM: Make kvm_mips_{init,exit}() static MIPS: KVM: Refactor added offsetof()s MIPS: KVM: Convert EXPORT_SYMBOL to _GPL ...
| * Merge branch '4.4-fixes' into mips-for-linux-nextRalf Baechle2016-01-247-4/+14
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| | * MIPS: Fix macro typoJaedon Shin2016-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the CONFIG_MIPS_CMDLINE_EXTEND to CONFIG_MIPS_CMDLINE_DTB_EXTEND to resolve the EXTEND_WITH_PROM macro. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Fixes: 2024972ef533 ("MIPS: Make the kernel arguments from dtb available") Reviewed-by: Alexander Sverdlin <alexander.svedlin@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11909/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: smp-cps: Ensure secondary cores start with EVA disabledMatt Redfearn2016-01-242-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel currently assumes that a core will start up in legacy mode using the exception base provided through the CM GCR registers. If a core has been configured in hardware to start in EVA mode, these assumptions will fail. This patch ensures that secondary cores are initialized to meet these assumptions. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11907/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: io.h: Define `ioremap_cache'Maciej W. Rozycki2016-01-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12040/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * Revert "MIPS: Fix PAGE_MASK definition"Dan Williams2016-01-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 22b14523994588279ae9c5ccfe64073c1e5b3c00. It was originally sent in an earlier revision of the pfn_t patchset. Besides being broken, the warning is also fixed by PFN_FLAGS_MASK casting the PAGE_MASK to an unsigned long. Reported-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Cc: linux-kernel@vger.kernel.org Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12182/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: zboot: Add support for serial debug using the PROMAlban Bedel2016-01-243-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As most platforms implement the PROM serial interface prom_putchar() add a simple bridge to allow re-using this code for zboot. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11811/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: zboot: Avoid useless rebuildsAlban Bedel2016-01-241-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dummy.o to the targets list, and fill targets automatically from $(vmlinuzobjs) to avoid having to maintain two lists. When building with XZ compression copy ashldi3.c to the build directory to use a different object file for the kernel and zboot. Without this the same object file need to be build with different flags which cause a rebuild at every run. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Alex Smith <alex.smith@imgtec.com> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11810/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIBFlorian Fainelli2016-01-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow BMIPS_GENERIC supported platforms to build GPIO controller drivers. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Dragan Stancevic <dragan.stancevic@gmail.com> Cc: cernekee@gmail.com Cc: jaedon.shin@gmail.com Cc: gregory.0xf0@gmail.com Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12019/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() functionSimon Arlott2016-01-242-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove bcm63xx_nvram_get_psi_size() as it now has no users. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11836/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: bcm963xx: Update bcm_tag field image_sequenceSimon Arlott2016-01-241-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "dual_image" and "inactive_flag" fields should be merged into a single "image_sequence" field. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11834/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: bcm963xx: Move extended flash address to bcm_tag header fileSimon Arlott2016-01-242-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The extended flash address needs to be subtracted from bcm_tag flash image offsets. Move this value to the bcm_tag header file. Renamed define name to consistently use bcm963xx for flash layout which should be considered a property of the board and not the SoC (i.e. bcm63xx could theoretically be used on a board without CFE or any flash). Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11833/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structureSimon Arlott2016-01-243-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move Broadcom BCM963xx image tag data structure to include/linux/ so that drivers outside of mach-bcm63xx can use it. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11832/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: bcm63xx: nvram: Use nvram structure definition from header fileSimon Arlott2016-01-241-32/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the common definition of the nvram structure from the header file include/linux/bcm963xx_nvram.h instead of maintaining a separate copy. Read the version 5 size of nvram data from memory and then call the new checksum verification function from the header file. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11831/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structureSimon Arlott2016-01-242-0/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Broadcom BCM963xx boards have multiple nvram variants across different SoCs with additional checksum fields added whenever the size of the nvram was extended. Add this structure as a header file so that multiple drivers can use it. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11830/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MAINTAINERS: Add KVM for MIPS entryJames Hogan2016-01-241-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've pretty much been maintaining KVM for MIPS for a while now. Lets make it more official (and make sure I get Cc'd on relevant patches). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Gleb Natapov <gleb@kernel.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11898/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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