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* MIPS: APRP: Add VPE loader support for CMP platforms.Deng-Cheng Zhu2014-01-223-0/+186
* MIPS: APRP: Split VPE loader into separate files.Deng-Cheng Zhu2014-01-225-633/+660
* MIPS: Clean up MIPS MT and CMP configuration options.Steven J. Hill2014-01-222-40/+24
* MIPS: kernel: cpu-probe: Add support for probing interAptiv coresLeonid Yegoshin2014-01-221-0/+8
* MIPS: Add support for interAptiv coresLeonid Yegoshin2014-01-229-1/+12
* MIPS: Add processor identifiers for the interAptiv processorsLeonid Yegoshin2014-01-221-0/+2
* MIPS: Add debugfs file to print the segmentation control registersSteven J. Hill2014-01-222-0/+111
* MIPS: Add support for FTLBsLeonid Yegoshin2014-01-227-14/+155
* MIPS: mm: Use the TLBINVF instruction to flush the VTLBLeonid Yegoshin2014-01-221-6/+12
* MIPS: Add function for flushing the TLB using the TLBINV instructionLeonid Yegoshin2014-01-221-0/+13
* MIPS: kernel: cpu-probe: Add support for probing proAptiv coresLeonid Yegoshin2014-01-221-0/+8
* MIPS: Add support for the proAptiv coresLeonid Yegoshin2014-01-2210-1/+13
* MIPS: Add processor identifiers for the proAptiv processorsLeonid Yegoshin2014-01-221-0/+2
* MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLBLeonid Yegoshin2014-01-221-1/+3
* MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill2014-01-224-0/+36
* MIPS: features: Add initial support for TLBINVF capable coresLeonid Yegoshin2014-01-223-0/+9
* MIPS: mm: Move UNIQUE_ENTRYHI macro to a header fileMarkos Chandras2014-01-223-8/+3
* MIPS: Add missing bits for Config registersLeonid Yegoshin2014-01-221-2/+38
* MIPS: MT: proc: Add support for printing VPE and TC idsMarkos Chandras2014-01-221-1/+8
* MIPS: Malta: Remove ttyS2 serial for CMP platformsLeonid Yegoshin2014-01-221-0/+2
* MIPS: Add printing of ES bit for Imgtec cores when cache error occurs.Leonid Yegoshin2014-01-221-8/+21
* MIPS: GIC: Send IPIs using the GICSteven J. Hill2014-01-221-0/+27
* MIPS: MT: Mark existing TCs as presentMarkos Chandras2014-01-221-0/+1
* MIPS: mm: c-r4k: Panic if IL or DL fields have a reserved valueMarkos Chandras2014-01-221-8/+16
* MIPS: kernel: smp-cmp: MIPS MT code needs CONFIG_MIPS_MTMarkos Chandras2014-01-221-0/+3
* MIPS: BCM47XX: Fix some very confused types and data corruptionIlia Mirkin2014-01-221-9/+9
* MIPS: BCM47XX: add vectored interrupt supportHauke Mehrtens2014-01-222-0/+24
* MIPS: BCM47XX: add cpu-feature-overrides.hHauke Mehrtens2014-01-221-0/+82
* MIPS: BCM47XX: move constant array from stackHauke Mehrtens2014-01-221-1/+1
* MIPS: BCM47XX: add asmlinkage to plat_irq_dispatch()Hauke Mehrtens2014-01-221-1/+1
* MIPS: BCM47XX: update defconfigHauke Mehrtens2014-01-221-580/+43
* MIPS: BCM47XX: add EARLY_PRINTK_8250 supportHauke Mehrtens2014-01-222-0/+11
* MIPS: BCM47XX: Remove CFE supportHauke Mehrtens2014-01-222-93/+0
* MIPS: BCM47XX: only print SoC name in system type in cpuinfoHauke Mehrtens2014-01-223-22/+13
* MIPS: BCM63XX: drop SYS_HAS_CPU_MIPS32R1Jonas Gorski2014-01-221-1/+0
* MIPS: cpu-type: guard BMIPS variants with SYS_HAS_CPU_BMIPS*Jonas Gorski2014-01-221-3/+10
* MIPS: BCM47XX: select BMIPS CPUs for BCM47XX_SSBJonas Gorski2014-01-221-0/+1
* MIPS: BCM63XX: let the individual SoCs select the appropriate CPUsJonas Gorski2014-01-222-1/+8
* MIPS: BCM63XX: always register bmips smp opsJonas Gorski2014-01-221-4/+2
* MIPS: BMIPS: add a smp ops registration helperJonas Gorski2014-01-223-1/+28
* MIPS: BMIPS: extend BMIPS3300 to include BMIPS32Jonas Gorski2014-01-221-4/+4
* MIPS: BMIPS: select CPU_HAS_PREFETCHJonas Gorski2014-01-221-0/+1
* MIPS: BMIPS: select CPU_SUPPORTS_HIGHMEMJonas Gorski2014-01-221-1/+1
* MIPS: BMIPS: merge CPU options into one optionJonas Gorski2014-01-221-41/+39
* MIPS: BMIPS: change compile time checks to runtime checksJonas Gorski2014-01-224-137/+235
* MIPS: allow asm/cpu.h to be included from assemblyJonas Gorski2014-01-221-0/+3
* MIPS: BCM63XX: disable SMP also on BCM3368Jonas Gorski2014-01-221-4/+4
* MIPS: BCM63XX: add HSSPI platform device and register itJonas Gorski2014-01-224-2/+60
* MIPS: BCM63XX: add HSSPI IRQ and register offsetsJonas Gorski2014-01-221-0/+18
* MIPS: BCM63XX: setup the HSSPI clock rateJonas Gorski2014-01-221-0/+18
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