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* MIPS: IP27: Update/restructure CPU overridesJoshua Kinard2015-06-211-35/+57
| | | | | | | | | | | | | | | | | | | | | Inspired by Maciej's recent patch to update DEC cpu-feature-overrides.h, I updated IP27's as well to disable features known to not apply to the IP27 platform or the R10K-series of CPUs. Before: text data bss dec hex filename 8616648 463200 472240 9552088 91c0d8 vmlinux After: text data bss dec hex filename 8592256 471392 472240 9535888 918190 vmlinux I believe the increase in the size of the data section is for the same reasons as in the DEC patch. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: make loongsoon serial driver explicitly modularPaul Gortmaker2015-06-211-2/+7
| | | | | | | | | | | | | | | | | | | | | | The file looks as if it is non-modular, but it piggy-backs off CONFIG_SERIAL_8250 which is tristate. If set to "=m" we will get this after the init/module header cleanup: arch/mips/loongson/common/serial.c:76:1: error: data definition has no type or storage class [-Werror] arch/mips/loongson/common/serial.c:76:1: error: type defaults to 'int' in declaration of 'device_initcall' [-Werror=implicit-int] arch/mips/loongson/common/serial.c:76:1: error: parameter names (without types) in function declaration [-Werror] arch/mips/loongson/common/serial.c:58:19: error: 'serial_init' defined but not used [-Werror=unused-function] cc1: all warnings being treated as errors make[3]: *** [arch/mips/loongson/common/serial.o] Error 1 Make it clearly modular, and add a module_exit function, so that we avoid the above breakage. Reported-by: kbuild test robot <fengguang.wu@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Get rid of 'kgdb_early_setup' cruft.Sergei Shtylyov2015-06-214-24/+0
| | | | | | | | | | | | | | | | | Commit 854700115ecf ([MIPS] kgdb: add arch support for the kernel's kgdb core) added the 'kgdb_early_setup' flag to avoid calling trap_init() and init_IRQ() the second time, however the code that called these functions earlier, from kgdb_arch_init(), had been already removed by that time, so the flag never served any useful purpose. Remove the related code along with ugly #ifdef'ery at last. [ralf@linux-mips.org: Folded in Guenter Roeck's fix.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Patchwork: https://patchwork.linux-mips.org/patch/10501/ Signed-off-by: Guenter Roeck <linux@roeck-us.net> Patchwork: https://patchwork.linux-mips.org/patch/10533/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add basic support for the TL-WR1043ND version 1Alban Bedel2015-06-215-0/+269
| | | | | | | | | | Add a DTS for TL-WR1043ND version 1 and allow to have it built in the kernel to circumvent the broken u-boot found on these boards. Currently only the UART, LEDs and buttons are supported. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* OF: Add vendor prefix for TP-Link Technologies Co. LtdAlban Bedel2015-06-211-0/+1
| | | | | | Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Add OF support to the GPIO driverAlban Bedel2015-06-213-22/+127
| | | | | | | | | Replace the simple GPIO chip registration by a platform driver and make ath79_gpio_init() just register the device. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* DEVICETREE: Add bindings for the ATH79 GPIO controllersAlban Bedel2015-06-211-0/+38
| | | | | | | | | These bindings support the GPIO controllers found on the Qualcomm Atheros AR7xxx/AR9XXX SoC. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Add OF support to the clocksAlban Bedel2015-06-211-19/+44
| | | | | | | | Allow using the SoC clocks in the device tree. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* DEVICETREE: Add bindings for the ATH79 PLL controllersAlban Bedel2015-06-211-0/+33
| | | | | | Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Add OF support to the IRQ controllersAlban Bedel2015-06-211-1/+86
| | | | | | | | | Add OF support for the CPU and MISC interrupt controllers of most supported ATH79 devices. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* DEVICETREE: Add bindings for the ATH79 MISC interrupt controllersAlban Bedel2015-06-211-0/+30
| | | | | | Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* DEVICETREE: Add bindings for the ATH79 interrupt controllersAlban Bedel2015-06-211-0/+44
| | | | | | Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* DEVICETREE: Add bindings for the ATH79 DDR controllersAlban Bedel2015-06-211-0/+35
| | | | | | | | | | | The DDR controller of the ARxxx and AR9xxx families provides an interface to flush the FIFO between various devices and the DDR. This is mainly used by the IRQ controller to flush the FIFO before running the interrupt handler of such devices. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Add basic device tree supportAlban Bedel2015-06-213-1/+28
| | | | | | | | Add the bare minimum to load a device tree. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* DEVICETREE: Add bindings for the SoC of the ATH79 familyAlban Bedel2015-06-211-0/+21
| | | | | | Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: bcm47xx: allow retrieval of complete nvram contentsHante Meuleman2015-06-212-15/+60
| | | | | | | | | | | | | | | | | Host platforms such as routers supported by OpenWrt can support NVRAM reading directly from internal NVRAM store. The brcmfmac for one requires the complete nvram contents to select what needs to be sent to wireless device. Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Hante Meuleman <meuleman@broadcom.com> Reviewed-by: Arend Van Spriel <arend@broadcom.com> Reviewed-by: Franky (Zhenhui) Lin <frankyl@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by: Daniel (Deognyoun) Kim <dekim@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10093/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Naming style cleanup and reworkHuacai Chen2015-06-21102-103/+105
| | | | | | | | | | | | | | | | | | | | Currently, code of Loongson-2/3 is under loongson directory and code of Loongson-1 is under loongson1 directory. Besides, there are Kconfig options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is very ugly and confusing. Since Loongson-2/3 are both 64-bit general- purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names and Kconfig symbols from loongson/loongson1 to loongson64/loongson32. [ralf@linux-mips.org: Resolve a number of simple conflicts.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9790/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Select 32bit DMA zone for 64-bit kernelsJames Hogan2015-06-211-0/+1
| | | | | | | | | | | | Enable the 32-bit DMA zone for 64-bit Malta kernels so that devices with 32-bit coherent DMA masks aren't constrained to the low 16MB DMA zone, which can easily be exhausted when there is lots of static kernel data due to lock and RCU debugging. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9890/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: tlbex: Avoid unnecessary _PAGE_PRESENT shiftsJames Hogan2015-06-211-6/+17
| | | | | | | | | | | | | | | | | Commit c5b367835cfc ("MIPS: Add support for XPA.") added generation of a shift by _PAGE_PRESENT_SHIFT in build_pte_present() and build_pte_writable(), however except for the XPA case this is always zero making it unnecessary. Make the shift conditional upon _PAGE_PRESENT_SHIFT being non-zero to save an instruction in those cases. Fixes: c5b367835cfc ("MIPS: Add support for XPA.") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9889/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: tlbex: Fix broken offsets on r2 without XPAJames Hogan2015-06-211-4/+8
| | | | | | | | | | | | | | | | | | | | | Commit c5b367835cfc ("MIPS: Add support for XPA.") changed build_pte_present() and build_pte_writable() to assume a constant offset of _PAGE_READ and _PAGE_WRITE relative to _PAGE_PRESENT, however this is no longer true for some MIPS32R2 builds since commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.") which moved the _PAGE_READ PTE bit away from the _PAGE_PRESENT bit, with the _PAGE_WRITE bit falling into its place. Make use of the _PAGE_READ and _PAGE_WRITE definitions to calculate the correct mask to apply instead of hard coding 3 (for _PAGE_PRESENT | _PAGE_READ) or 5 (for _PAGE_PRESENT | _PAGE_WRITE). Fixes: c5b367835cfc ("MIPS: Add support for XPA.") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9888/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix KVM guest fixmap addressJames Hogan2015-06-211-0/+4
| | | | | | | | | | | | | | | | KVM guest kernels for trap & emulate run in user mode, with a modified set of kernel memory segments. However the fixmap address is still in the normal KSeg3 region at 0xfffe0000 regardless, causing problems when cache alias handling makes use of them when handling copy on write. Therefore define FIXADDR_TOP as 0x7ffe0000 in the guest kernel mapped region when CONFIG_KVM_GUEST is defined. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # v3.10+ Patchwork: https://patchwork.linux-mips.org/patch/9887/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM47XX: Support Luxul XWR-1750 boardDan Haab2015-06-214-0/+28
| | | | | | | | | | Signed-off-by: Dan Haab <dhaab@luxul.com> Acked-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Dan Haab <dhaab@luxul.com> Patchwork: https://patchwork.linux-mips.org/patch/9831/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Use the common clk APIAlban Bedel2015-06-212-27/+3
| | | | | | | | | | | | | | | | | | Make the code simpler and open the way for device tree clocks. [ralf@linux-mips.org: Resolved conflict with 2a552da6 (MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip.)] Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9774/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Improve the DDR controller interfaceAlban Bedel2015-06-216-125/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDR controller need to be used by the IRQ controller to flush the write buffer of some devices before running the IRQ handler. It is also used by the PCI controller to setup the PCI memory windows. The current interface used to access the DDR controller doesn't provides any useful abstraction and simply rely on a shared global pointer. Replace this by a simple API to setup the PCI memory windows and use the write buffer flush independently of the SoC type. That remove the need for the shared global pointer, simplify the IRQ handler code. [ralf@linux-mips.org: Folded in Alban Bedel's follup fix.] Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9773/ Patchwork: http://patchwork.linux-mips.org/patch/10543/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Correctly name the defines for the PLL_FB registerAlban Bedel2015-06-212-9/+9
| | | | | | | | | | | | | | | | | | This register is named PLL_FB and is not a divider but a multiplier. To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and ARxxxx_PLL_FB_MASK. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9772/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Enable ZBOOT supportAlban Bedel2015-06-211-0/+1
| | | | | | | | | | | | | | | ZBOOT is working fine, so allow using it. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9770/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS, IRQ: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descJiang Liu2015-06-218-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: David Daney <david.daney@cavium.com> Cc: Christoph Lameter <cl@linux.com> Cc: John Crispin <blogic@openwrt.org> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: x86@kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-acpi@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10086/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Remove unneeded cast removing constKrzysztof Kozlowski2015-06-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Parent names in clock init data is now array of const pointers to const strings so the cast is not needed. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Barry Song <baohua@kernel.org> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: Chanwoo Choi <cw00.choi@samsung.com> Cc: Inki Dae <inki.dae@samsung.com> Patchwork: https://patchwork.linux-mips.org/patch/9903 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: tlbex.c: Remove new instance of __cpuinitdata that crept back inPaul Gortmaker2015-06-211-1/+1
| | | | | | | | | | | | | | | We removed __cpuinit support (leaving no-op stubs) quite some time ago. However a new instance was added in commit c5b367835cfc7a8ef53b9670a409ff ("MIPS: Add support for XPA.") Since we want to clobber the stubs soon, get this removed now. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9894/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: c-r4k: Remove legacy __cpuinit section that crept inPaul Gortmaker2015-06-211-1/+1
| | | | | | | | | | | | | | | We removed __cpuinit support (leaving no-op stubs) quite some time ago. However a new instance was added in commit 4caa906ee949b7002cc1558bbe3744 ("MIPS: mm: c-r4k: Build EVA {d,i}cache flushing functions") Since we want to clobber the stubs soon, get this removed now. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9893/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM77xx: Remove legacy __cpuinit{,data} sections that crept inPaul Gortmaker2015-06-213-3/+3
| | | | | | | | | | | | | | | We removed __cpuinit support (leaving no-op stubs) quite some time ago. However a few more crept in as of commit 6ee1d93455384cef8a0426effe85da2 ("MIPS: BCM47XX: Detect more then 128 MiB of RAM (HIGHMEM)") Since we want to clobber the stubs soon, get this removed now. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ATH25: Remove legacy __cpuinit section that crept inPaul Gortmaker2015-06-211-1/+1
| | | | | | | | | | | | | | | We removed __cpuinit support (leaving no-op stubs) quite some time ago. However this one crept back in as of commit 43cc739fd98b8c517ad45756d869f ("MIPS: ath25: add common parts") Since we want to clobber the stubs soon, get this removed now. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9891/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Pistachio: Enable USB PHY driver in defconfigAndrew Bresticker2015-06-211-0/+1
| | | | | | | | | | | | | | Update pistachio_defconfig to enable Pistachio's USB PHY driver. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hartley <james.hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9729/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* PHY: Add driver for Pistachio USB2.0 PHYAndrew Bresticker2015-06-213-0/+214
| | | | | | | | | | | | | | Add a driver for the USB2.0 PHY found on the IMG Pistachio SoC. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hartley <james.hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9728/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* phy: Add binding document for Pistachio USB2.0 PHYAndrew Bresticker2015-06-212-0/+45
| | | | | | | | | | | | | | | | | | | Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hartley <james.hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9727/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Pistachio: Support 8250-based early printkEzequiel Garcia2015-06-211-0/+2
| | | | | | | | | | | | Pistachio SoCs are capable of early printk with generic 8250 support, so let's select the options to enable it. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9913/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BMIPS: dts: Add uart device nodes to bcm7xxx platformsJaedon Shin2015-06-218-0/+136
| | | | | | | | | | | | | Add two uart device nodes known as the uart1 and uart2 for the bcm7xxx platforms. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9991/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BMIPS: Add support for Broadcom BCM97435SVMBFlorian Fainelli2015-06-213-0/+65
| | | | | | | | | | | | | | | | | Add a DTS file and Kconfig entry for the BCM97435SVMB evaluation board using bcm7435.dtsi as an example. The current code needs some tweaking to allow us to use the dual-threaded dual BMIPS5200 CPUs, so for now we limit ourselves to allowing just a single CPU to be booted. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@chromium.org Cc: Steven.Hill@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/9972/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BMIPS: Add BCM7435 dtsiFlorian Fainelli2015-06-211-0/+239
| | | | | | | | | | | | | | | | | Add the bare minimum required to boot a BCM7435-based system: - BMIPS5200 CPU nodes - Level 1 and 2 interrupt controllers - UARTs - EHCI/OHCI controllers Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@chromium.org Cc: Steven.Hill@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/9971/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Utilize asm/bmips-spaces.hFlorian Fainelli2015-06-211-1/+1
| | | | | | | | | | | | | | Since BCM63xx runs on BMIPS3300 which requires the use of a FIXADDR_TOP to avoid collisions with the SBR, utilize asm/bmips-spaces.h which defines FIXADDR_TOP for us now. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@chromium.org Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/9969/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BMIPS: Define BMIPS_FIXADDR_TOP in asm/bmips-spaces.hFlorian Fainelli2015-06-212-1/+8
| | | | | | | | | | | | | | The FIXADDR_TOP value used by mach-bmips is in fact required whenever we run on BMIPS3300 BMIPS CPUs, and is not machine, but CPU-specific, move this constant to asm/bmips-spaces.h and use it in mach-bmips/spaces.h. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@chromium.org Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/9968/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MAINTAINERS: Add Broadcom BCM47xx entryRafał Miłecki2015-06-211-0/+8
| | | | | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: Arend van Spriel <arend@broadcom.com> Patchwork: https://patchwork.linux-mips.org/patch/10207/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ingenic: Initial MIPS Creator CI20 supportPaul Burton2015-06-214-0/+211
| | | | | | | | | | | | | | | | | | | Add an initial device tree for the Ingenic JZ4780 based MIPS Creator CI20 board. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10162/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ingenic: Initial JZ4780 supportPaul Burton2015-06-218-6/+134
| | | | | | | | | | | | | | | | | | | | | | | Support the Ingenic JZ4780 SoC using the existing code under arch/mips/jz4740 now that it has been generalised sufficiently. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Joshua Kinard <kumba@gentoo.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/10164/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: use Ingenic SoC UART driverPaul Burton2015-06-2111-120/+28
| | | | | | | | | | | | | | | | | | | | | | | | Remove the serial support from arch/mips/jz4740 & make use of the new Ingenic SoC UART driver. This is done for both regular & early console output. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Cc: Apelete Seketeli <apelete@seketeli.net> Cc: Alexandre Courbot <gnurou@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10160/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* serial: 8250_ingenic: support for Ingenic SoC UARTsPaul Burton2015-06-213-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a driver suitable for use with the UARTs present in Ingenic SoCs such as the JZ4740 & JZ4780. These are described as being ns16550 compatible but aren't quite - they require the setting of an extra bit in the FCR register to enable the UART module. The serial_out implementation is the same as that in arch/mips/jz4740/serial.c - which will shortly be removed. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-serial@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Alan Cox <alan@linux.intel.com> Cc: linux-kernel@vger.kernel.org Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/10159/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* devicetree: document Ingenic SoC UART bindingPaul Burton2015-06-211-0/+22
| | | | | | | | | | | | | | | | | Add binding documentation for the UARTs found in Ingenic SoCs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10161/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: only detect RAM size if not specified in DTPaul Burton2015-06-213-1/+10
| | | | | | | | | | | | | | | Allow a devicetree to specify the memory present in the system rather than probing it from the memory controller. This both saves the probing for systems where the amount of memory is fixed, and will simplify the bringup of later Ingenic SoCs where the memory controller register layout differs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10163/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: remove clock.hPaul Burton2015-06-213-27/+3
| | | | | | | | | | | | | | The only thing remaining in arch/mips/jz4740/clock.h is declarations of the jz4740_clock_{suspend,resume} functions. Move these to arch/mips/include/asm/mach-jz4740/clock.h for consistency with similar functions, and remove the redundant arch/mips/jz4740/clock.h header. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10156/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clk: ingenic: add JZ4780 CGU supportPaul Burton2015-06-212-0/+734
| | | | | | | | | | | | | | | | Add support for the clocks provided by the CGU in the Ingenic JZ4780 SoC, making use of the SoC-agnostic CGU code to do the heavy lifting. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10157/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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