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-rw-r--r--include/asm-x86/cmpxchg_32.h32
-rw-r--r--include/asm-x86/e820_32.h2
-rw-r--r--include/asm-x86/e820_64.h2
-rw-r--r--include/asm-x86/page.h4
-rw-r--r--include/asm-x86/pci_64.h1
-rw-r--r--include/asm-x86/sync_bitops.h9
6 files changed, 28 insertions, 22 deletions
diff --git a/include/asm-x86/cmpxchg_32.h b/include/asm-x86/cmpxchg_32.h
index cea1dae..959fad0 100644
--- a/include/asm-x86/cmpxchg_32.h
+++ b/include/asm-x86/cmpxchg_32.h
@@ -269,22 +269,26 @@ static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old,
({ \
__typeof__(*(ptr)) __ret; \
if (likely(boot_cpu_data.x86 > 3)) \
- __ret = __cmpxchg((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))); \
+ __ret = (__typeof__(*(ptr)))__cmpxchg((ptr), \
+ (unsigned long)(o), (unsigned long)(n), \
+ sizeof(*(ptr))); \
else \
- __ret = cmpxchg_386((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))); \
+ __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
+ (unsigned long)(o), (unsigned long)(n), \
+ sizeof(*(ptr))); \
__ret; \
})
#define cmpxchg_local(ptr, o, n) \
({ \
__typeof__(*(ptr)) __ret; \
if (likely(boot_cpu_data.x86 > 3)) \
- __ret = __cmpxchg_local((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))); \
+ __ret = (__typeof__(*(ptr)))__cmpxchg_local((ptr), \
+ (unsigned long)(o), (unsigned long)(n), \
+ sizeof(*(ptr))); \
else \
- __ret = cmpxchg_386((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))); \
+ __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
+ (unsigned long)(o), (unsigned long)(n), \
+ sizeof(*(ptr))); \
__ret; \
})
#endif
@@ -301,10 +305,12 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
({ \
__typeof__(*(ptr)) __ret; \
if (likely(boot_cpu_data.x86 > 4)) \
- __ret = __cmpxchg64((ptr), (unsigned long long)(o), \
+ __ret = (__typeof__(*(ptr)))__cmpxchg64((ptr), \
+ (unsigned long long)(o), \
(unsigned long long)(n)); \
else \
- __ret = cmpxchg_486_u64((ptr), (unsigned long long)(o), \
+ __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \
+ (unsigned long long)(o), \
(unsigned long long)(n)); \
__ret; \
})
@@ -312,10 +318,12 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
({ \
__typeof__(*(ptr)) __ret; \
if (likely(boot_cpu_data.x86 > 4)) \
- __ret = __cmpxchg64_local((ptr), (unsigned long long)(o), \
+ __ret = (__typeof__(*(ptr)))__cmpxchg64_local((ptr), \
+ (unsigned long long)(o), \
(unsigned long long)(n)); \
else \
- __ret = cmpxchg_486_u64((ptr), (unsigned long long)(o), \
+ __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \
+ (unsigned long long)(o), \
(unsigned long long)(n)); \
__ret; \
})
diff --git a/include/asm-x86/e820_32.h b/include/asm-x86/e820_32.h
index f1da7eb..e7207a6 100644
--- a/include/asm-x86/e820_32.h
+++ b/include/asm-x86/e820_32.h
@@ -28,6 +28,8 @@ extern void find_max_pfn(void);
extern void register_bootmem_low_pages(unsigned long max_low_pfn);
extern void add_memory_region(unsigned long long start,
unsigned long long size, int type);
+extern void update_memory_range(u64 start, u64 size, unsigned old_type,
+ unsigned new_type);
extern void e820_register_memory(void);
extern void limit_regions(unsigned long long size);
extern void print_memory_map(char *who);
diff --git a/include/asm-x86/e820_64.h b/include/asm-x86/e820_64.h
index a560c4f..22ede73 100644
--- a/include/asm-x86/e820_64.h
+++ b/include/asm-x86/e820_64.h
@@ -18,6 +18,8 @@ extern unsigned long find_e820_area(unsigned long start, unsigned long end,
unsigned size, unsigned long align);
extern void add_memory_region(unsigned long start, unsigned long size,
int type);
+extern void update_memory_range(u64 start, u64 size, unsigned old_type,
+ unsigned new_type);
extern void setup_memory_region(void);
extern void contig_e820_setup(void);
extern unsigned long e820_end_of_ram(void);
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
index 1cb7c51..a05b289 100644
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -52,13 +52,13 @@ extern int page_is_ram(unsigned long pagenr);
struct page;
-static void inline clear_user_page(void *page, unsigned long vaddr,
+static inline void clear_user_page(void *page, unsigned long vaddr,
struct page *pg)
{
clear_page(page);
}
-static void inline copy_user_page(void *to, void *from, unsigned long vaddr,
+static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
struct page *topage)
{
copy_page(to, from);
diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h
index 3746903..da8266a 100644
--- a/include/asm-x86/pci_64.h
+++ b/include/asm-x86/pci_64.h
@@ -25,6 +25,7 @@ extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int l
+extern void dma32_reserve_bootmem(void);
extern void pci_iommu_alloc(void);
/* The PCI address space does equal the physical memory
diff --git a/include/asm-x86/sync_bitops.h b/include/asm-x86/sync_bitops.h
index cbce08a..6b775c9 100644
--- a/include/asm-x86/sync_bitops.h
+++ b/include/asm-x86/sync_bitops.h
@@ -23,10 +23,6 @@
* This function is atomic and may not be reordered. See __set_bit()
* if you do not require the atomic guarantees.
*
- * Note: there are no guarantees that this function will not be reordered
- * on non-x86 architectures, so if you are writing portable code,
- * make sure not to rely on its reordering guarantees.
- *
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
@@ -61,8 +57,7 @@ static inline void sync_clear_bit(int nr, volatile unsigned long * addr)
* @nr: Bit to change
* @addr: Address to start counting from
*
- * change_bit() is atomic and may not be reordered. It may be
- * reordered on other architectures than x86.
+ * sync_change_bit() is atomic and may not be reordered.
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
@@ -80,7 +75,6 @@ static inline void sync_change_bit(int nr, volatile unsigned long * addr)
* @addr: Address to count from
*
* This operation is atomic and cannot be reordered.
- * It may be reordered on other architectures than x86.
* It also implies a memory barrier.
*/
static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
@@ -99,7 +93,6 @@ static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
* @addr: Address to count from
*
* This operation is atomic and cannot be reordered.
- * It can be reorderdered on other architectures other than x86.
* It also implies a memory barrier.
*/
static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr)
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