diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/bootinfo.h | 6 | ||||
| -rw-r--r-- | include/asm-mips/mach-ev64120/mach-gt64120.h | 62 | ||||
| -rw-r--r-- | include/asm-mips/serial.h | 19 |
3 files changed, 0 insertions, 87 deletions
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index b0c3297..4765639 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -109,12 +109,6 @@ #define MACH_COSINE_ORION 0 /* - * Valid machtype for group GALILEO - */ -#define MACH_GROUP_GALILEO 11 /* Galileo Eval Boards */ -#define MACH_EV64120A 0 /* EV64120A */ - -/* * Valid machtype for group MOMENCO */ #define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ diff --git a/include/asm-mips/mach-ev64120/mach-gt64120.h b/include/asm-mips/mach-ev64120/mach-gt64120.h deleted file mode 100644 index 7e272ce5..0000000 --- a/include/asm-mips/mach-ev64120/mach-gt64120.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * This is a direct copy of the ev96100.h file, with a global - * search and replace. The numbers are the same. - * - * The reason I'm duplicating this is so that the 64120/96100 - * defines won't be confusing in the source code. - */ -#ifndef __ASM_GALILEO_BOARDS_MIPS_EV64120_H -#define __ASM_GALILEO_BOARDS_MIPS_EV64120_H - -/* - * GT64120 config space base address - */ -extern unsigned long gt64120_base; - -#define GT64120_BASE (gt64120_base) - -/* - * PCI Bus allocation - */ -#define GT_PCI_MEM_BASE 0x12000000UL -#define GT_PCI_MEM_SIZE 0x02000000UL -#define GT_PCI_IO_BASE 0x10000000UL -#define GT_PCI_IO_SIZE 0x02000000UL -#define GT_ISA_IO_BASE PCI_IO_BASE - -/* - * Duart I/O ports. - */ -#define EV64120_COM1_BASE_ADDR (0x1d000000 + 0x20) -#define EV64120_COM2_BASE_ADDR (0x1d000000 + 0x00) - - -/* - * EV64120 interrupt controller register base. - */ -#define EV64120_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000)) - -/* - * EV64120 UART register base. - */ -#define EV64120_UART0_REGS_BASE (KSEG1ADDR(EV64120_COM1_BASE_ADDR)) -#define EV64120_UART1_REGS_BASE (KSEG1ADDR(EV64120_COM2_BASE_ADDR)) -#define EV64120_BASE_BAUD ( 3686400 / 16 ) -#define EV64120_UART_IRQ 6 - -/* - * PCI interrupts will come in on either the INTA or INTD interrups lines, - * which are mapped to the #2 and #5 interrupt pins of the MIPS. On our - * boards, they all either come in on IntD or they all come in on IntA, they - * aren't mixed. There can be numerous PCI interrupts, so we keep a list of the - * "requested" interrupt numbers and go through the list whenever we get an - * IntA/D. - * - * Interrupts < 8 are directly wired to the processor; PCI INTA is 8 and - * INTD is 11. - */ -#define GT_TIMER 4 -#define GT_INTA 2 -#define GT_INTD 5 - -#endif /* __ASM_GALILEO_BOARDS_MIPS_EV64120_H */ diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index ce51213..01f1a82 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -51,24 +51,6 @@ #define JAZZ_SERIAL_PORT_DEFNS #endif -/* - * Galileo EV64120 evaluation board - */ -#ifdef CONFIG_MIPS_EV64120 -#include <mach-gt64120.h> -#define EV64120_SERIAL_PORT_DEFNS \ - { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ - .flags = STD_COM_FLAGS, \ - .iomem_base = EV64120_UART0_REGS_BASE, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM }, \ - { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ - .flags = STD_COM_FLAGS, \ - .iomem_base = EV64120_UART1_REGS_BASE, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM }, -#else -#define EV64120_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT #define STD_SERIAL_PORT_DEFNS \ /* UART CLK PORT IRQ FLAGS */ \ @@ -166,7 +148,6 @@ #define SERIAL_PORT_DFNS \ DDB5477_SERIAL_PORT_DEFNS \ - EV64120_SERIAL_PORT_DEFNS \ IP32_SERIAL_PORT_DEFNS \ JAZZ_SERIAL_PORT_DEFNS \ STD_SERIAL_PORT_DEFNS \ |
