diff options
Diffstat (limited to 'include/video/radeon.h')
| -rw-r--r-- | include/video/radeon.h | 32 |
1 files changed, 24 insertions, 8 deletions
diff --git a/include/video/radeon.h b/include/video/radeon.h index 83467e1..d5dcaf1 100644 --- a/include/video/radeon.h +++ b/include/video/radeon.h @@ -386,7 +386,7 @@ #define SC_BOTTOM_RIGHT 0x16F0 #define SRC_SC_BOTTOM_RIGHT 0x16F4 #define RB2D_DSTCACHE_MODE 0x3428 -#define RB2D_DSTCACHE_CTLSTAT 0x342C +#define RB2D_DSTCACHE_CTLSTAT_broken 0x342C /* do not use */ #define LVDS_GEN_CNTL 0x02d0 #define LVDS_PLL_CNTL 0x02d4 #define FP2_GEN_CNTL 0x0288 @@ -525,12 +525,19 @@ #define CRTC_DISPLAY_DIS (1 << 10) #define CRTC_CRT_ON (1 << 15) +/* DSTCACHE_MODE bits constants */ +#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8) +#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17) /* DSTCACHE_CTLSTAT bit constants */ -#define RB2D_DC_FLUSH (3 << 0) -#define RB2D_DC_FLUSH_ALL 0xf +#define RB2D_DC_FLUSH_2D (1 << 0) +#define RB2D_DC_FREE_2D (1 << 2) +#define RB2D_DC_FLUSH_ALL (RB2D_DC_FLUSH_2D | RB2D_DC_FREE_2D) #define RB2D_DC_BUSY (1 << 31) +/* DSTCACHE_MODE bits constants */ +#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8) +#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17) /* CRTC_GEN_CNTL bit constants */ #define CRTC_DBL_SCAN_EN 0x00000001 @@ -741,6 +748,10 @@ #define SOFT_RESET_RB (1 << 6) #define SOFT_RESET_HDP (1 << 7) +/* WAIT_UNTIL bit constants */ +#define WAIT_DMA_GUI_IDLE (1 << 9) +#define WAIT_2D_IDLECLEAN (1 << 16) + /* SURFACE_CNTL bit consants */ #define SURF_TRANSLATION_DIS (1 << 8) #define NONSURF_AP0_SWP_16BPP (1 << 20) @@ -858,15 +869,10 @@ #define GMC_DST_16BPP_YVYU422 0x00000c00 #define GMC_DST_32BPP_AYUV444 0x00000e00 #define GMC_DST_16BPP_ARGB4444 0x00000f00 -#define GMC_SRC_MONO 0x00000000 -#define GMC_SRC_MONO_LBKGD 0x00001000 -#define GMC_SRC_DSTCOLOR 0x00003000 #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 #define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 #define GMC_DP_CONVERSION_TEMP_9300 0x00008000 #define GMC_DP_CONVERSION_TEMP_6500 0x00000000 -#define GMC_DP_SRC_RECT 0x02000000 -#define GMC_DP_SRC_HOST 0x03000000 #define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 #define GMC_3D_FCN_EN_CLR 0x00000000 #define GMC_3D_FCN_EN_SET 0x08000000 @@ -877,6 +883,9 @@ #define GMC_WRITE_MASK_LEAVE 0x00000000 #define GMC_WRITE_MASK_SET 0x40000000 #define GMC_CLR_CMP_CNTL_DIS (1 << 28) +#define GMC_SRC_DATATYPE_MASK (3 << 12) +#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) +#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) #define GMC_SRC_DATATYPE_COLOR (3 << 12) #define ROP3_S 0x00cc0000 #define ROP3_SRCCOPY 0x00cc0000 @@ -885,6 +894,7 @@ #define DP_SRC_SOURCE_MASK (7 << 24) #define GMC_BRUSH_NONE (15 << 4) #define DP_SRC_SOURCE_MEMORY (2 << 24) +#define DP_SRC_SOURCE_HOST_DATA (3 << 24) #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 /* DP_MIX bit constants */ @@ -970,6 +980,12 @@ #define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) #define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) +/* RBBM_GUICNTL constants */ +#define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0) + /* masks */ #define CONFIG_MEMSIZE_MASK 0x1f000000 |
