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-rw-r--r--include/asm-x86/processor_64.h27
1 files changed, 22 insertions, 5 deletions
diff --git a/include/asm-x86/processor_64.h b/include/asm-x86/processor_64.h
index 31f579b..f422bec 100644
--- a/include/asm-x86/processor_64.h
+++ b/include/asm-x86/processor_64.h
@@ -334,6 +334,16 @@ struct extended_sigtable {
};
+#if defined(CONFIG_MPSC) || defined(CONFIG_MCORE2)
+#define ASM_NOP1 P6_NOP1
+#define ASM_NOP2 P6_NOP2
+#define ASM_NOP3 P6_NOP3
+#define ASM_NOP4 P6_NOP4
+#define ASM_NOP5 P6_NOP5
+#define ASM_NOP6 P6_NOP6
+#define ASM_NOP7 P6_NOP7
+#define ASM_NOP8 P6_NOP8
+#else
#define ASM_NOP1 K8_NOP1
#define ASM_NOP2 K8_NOP2
#define ASM_NOP3 K8_NOP3
@@ -342,6 +352,7 @@ struct extended_sigtable {
#define ASM_NOP6 K8_NOP6
#define ASM_NOP7 K8_NOP7
#define ASM_NOP8 K8_NOP8
+#endif
/* Opteron nops */
#define K8_NOP1 ".byte 0x90\n"
@@ -353,6 +364,17 @@ struct extended_sigtable {
#define K8_NOP7 K8_NOP4 K8_NOP3
#define K8_NOP8 K8_NOP4 K8_NOP4
+/* P6 nops */
+/* uses eax dependencies (Intel-recommended choice) */
+#define P6_NOP1 ".byte 0x90\n"
+#define P6_NOP2 ".byte 0x66,0x90\n"
+#define P6_NOP3 ".byte 0x0f,0x1f,0x00\n"
+#define P6_NOP4 ".byte 0x0f,0x1f,0x40,0\n"
+#define P6_NOP5 ".byte 0x0f,0x1f,0x44,0x00,0\n"
+#define P6_NOP6 ".byte 0x66,0x0f,0x1f,0x44,0x00,0\n"
+#define P6_NOP7 ".byte 0x0f,0x1f,0x80,0,0,0,0\n"
+#define P6_NOP8 ".byte 0x0f,0x1f,0x84,0x00,0,0,0,0\n"
+
#define ASM_NOP_MAX 8
/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
@@ -389,11 +411,6 @@ static inline void prefetchw(void *x)
#define cpu_relax() rep_nop()
-static inline void serialize_cpu(void)
-{
- __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
-}
-
static inline void __monitor(const void *eax, unsigned long ecx,
unsigned long edx)
{
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