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-rw-r--r--include/asm-mips/atomic.h35
-rw-r--r--include/asm-mips/io.h6
-rw-r--r--include/asm-mips/ip32/crime.h2
-rw-r--r--include/asm-mips/ip32/mace.h44
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_ide.h22
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h3
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h6
-rw-r--r--include/asm-mips/mach-ip32/mc146818rtc.h7
-rw-r--r--include/asm-mips/mach-jmr3927/ds1742.h (renamed from include/asm-mips/mach-jmr3927/asm/ds1742.h)6
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h3
-rw-r--r--include/asm-mips/mach-pb1x00/pb1550.h7
-rw-r--r--include/asm-mips/mach-qemu/timex.h16
-rw-r--r--include/asm-mips/mips-boards/seadint.h11
-rw-r--r--include/asm-mips/signal.h21
14 files changed, 118 insertions, 71 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 6202eb8..55c37c1 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -231,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
}
/*
- * atomic_sub_if_positive - add integer to atomic variable
+ * atomic_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
* @v: pointer of type atomic_t
*
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
*/
static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
{
@@ -287,6 +288,27 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
return result;
}
+#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
+
+/**
+ * atomic_add_unless - add unless the number is a given value
+ * @v: pointer of type atomic_t
+ * @a: the amount to add to v...
+ * @u: ...unless v is equal to u.
+ *
+ * Atomically adds @a to @v, so long as it was not @u.
+ * Returns non-zero if @v was not @u, and zero otherwise.
+ */
+#define atomic_add_unless(v, a, u) \
+({ \
+ int c, old; \
+ c = atomic_read(v); \
+ while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
+ c = old; \
+ c != (u); \
+})
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
@@ -556,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
}
/*
- * atomic64_sub_if_positive - add integer to atomic variable
+ * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
* @v: pointer of type atomic64_t
*
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
*/
static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
{
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3061870..d426857 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -459,10 +459,10 @@ __BUILDIO(q, u64)
#define __BUILD_MEMORY_STRING(bwlq, type) \
\
-static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \
- unsigned int count) \
+static inline void writes##bwlq(volatile void __iomem *mem, \
+ const void *addr, unsigned int count) \
{ \
- volatile type *__addr = addr; \
+ const volatile type *__addr = addr; \
\
while (count--) { \
mem_write##bwlq(*__addr, mem); \
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
index 152879b..a13702f 100644
--- a/include/asm-mips/ip32/crime.h
+++ b/include/asm-mips/ip32/crime.h
@@ -154,7 +154,7 @@ struct sgi_crime {
#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
};
-extern struct sgi_crime *crime;
+extern struct sgi_crime __iomem *crime;
#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 5bdc51d..990082c 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -150,24 +150,34 @@ struct mace_audio {
/* register definitions for parallel port DMA */
struct mace_parport {
-/* 0 - do nothing, 1 - pulse terminal count to the device after buffer is drained */
-#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
-/* Should not cross 4K page boundary */
-#define MACEPAR_CONTEXT_DATALEN_MASK 0xfff00000000
-/* Can be arbitrarily aligned on any byte boundary on output, 64 byte aligned on input */
-#define MACEPAR_CONTEXT_BASEADDR_MASK 0xffffffff
+ /* 0 - do nothing,
+ * 1 - pulse terminal count to the device after buffer is drained */
+#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
+ /* Should not cross 4K page boundary */
+#define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL
+#define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL
+#define MACEPAR_CONTEXT_DATALEN_SHIFT 32
+ /* Can be arbitrarily aligned on any byte boundary on output,
+ * 64 byte aligned on input */
+#define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL
volatile u64 context_a;
volatile u64 context_b;
-#define MACEPAR_CTLSTAT_DIRECTION BIT(0) /* 0 - mem->device, 1 - device->mem */
-#define MACEPAR_CTLSTAT_ENABLE BIT(1) /* 0 - channel frozen, 1 - channel enabled */
-#define MACEPAR_CTLSTAT_RESET BIT(2) /* 0 - channel active, 1 - complete channel reset */
-#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
-#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
- volatile u64 cntlstat; /* Control/Status register */
-#define MACEPAR_DIAG_CTXINUSE BIT(1)
-#define MACEPAR_DIAG_DMACTIVE BIT(2) /* 1 - Dma engine is enabled and processing something */
-#define MACEPAR_DIAG_CTRMASK 0x3ffc /* Counter of bytes left */
- volatile u64 diagnostic; /* RO: diagnostic register */
+ /* 0 - mem->device, 1 - device->mem */
+#define MACEPAR_CTLSTAT_DIRECTION BIT(0)
+ /* 0 - channel frozen, 1 - channel enabled */
+#define MACEPAR_CTLSTAT_ENABLE BIT(1)
+ /* 0 - channel active, 1 - complete channel reset */
+#define MACEPAR_CTLSTAT_RESET BIT(2)
+#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
+#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
+ volatile u64 cntlstat; /* Control/Status register */
+#define MACEPAR_DIAG_CTXINUSE BIT(0)
+ /* 1 - Dma engine is enabled and processing something */
+#define MACEPAR_DIAG_DMACTIVE BIT(1)
+ /* Counter of bytes left */
+#define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL
+#define MACEPAR_DIAG_CTRSHIFT 2
+ volatile u64 diagnostic; /* RO: diagnostic register */
};
/* ISA Control and DMA registers */
@@ -353,6 +363,6 @@ struct sgi_mace {
char _pad6[0x80000 - sizeof(struct mace_isa)];
};
-extern struct sgi_mace *mace;
+extern struct sgi_mace __iomem *mace;
#endif /* __ASM_MACE_H__ */
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index 33d275c..e867b4e 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -74,9 +74,6 @@ typedef struct
u8 white_list, black_list;
struct dbdma_cmd *dma_table_cpu;
dma_addr_t dma_table_dma;
- struct scatterlist *sg_table;
- int sg_nents;
- int sg_dma_direction;
#endif
struct device *dev;
int irq;
@@ -87,11 +84,6 @@ typedef struct
} _auide_hwif;
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
-struct drive_list_entry {
- const char * id_model;
- const char * id_firmware;
-};
-
/* HD white list */
static const struct drive_list_entry dma_white_list [] = {
/*
@@ -167,13 +159,9 @@ int __init auide_probe(void);
* Multi-Word DMA + DbDMA functions
*/
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
-
- static int in_drive_list(struct hd_driveid *id,
- const struct drive_list_entry *drive_table);
static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
static int auide_build_dmatable(ide_drive_t *drive);
static int auide_dma_end(ide_drive_t *drive);
- static void auide_dma_start(ide_drive_t *drive );
ide_startstop_t auide_dma_intr (ide_drive_t *drive);
static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
static int auide_dma_setup(ide_drive_t *drive);
@@ -188,8 +176,6 @@ int __init auide_probe(void);
static void auide_ddma_rx_callback(int irq, void *param,
struct pt_regs *regs);
static int auide_dma_off_quietly(ide_drive_t *drive);
- static int auide_dma_timeout(ide_drive_t *drive);
-
#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
/*******************************************************************************
@@ -299,3 +285,11 @@ int __init auide_probe(void);
#define SBC_IDE_MDMA2_TPM (0x00<<6)
#define SBC_IDE_MDMA2_TA (0x12<<0)
+#define SBC_IDE_TIMING(mode) \
+ SBC_IDE_##mode##_TWCS | \
+ SBC_IDE_##mode##_TCSH | \
+ SBC_IDE_##mode##_TCSOFF | \
+ SBC_IDE_##mode##_TWP | \
+ SBC_IDE_##mode##_TCSW | \
+ SBC_IDE_##mode##_TPM | \
+ SBC_IDE_##mode##_TA
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 5d89437..647fdb5 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
#define BOARD_PC1_INT DB1200_PC1_INT
#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+/* Nand chip select */
+#define NAND_CS 1
+
#endif /* __ASM_DB1200_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index efafe65..7b28b23 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG 0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
#endif /* __ASM_DB1X00_H */
diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h
index f5d780f..c28ba8d 100644
--- a/include/asm-mips/mach-ip32/mc146818rtc.h
+++ b/include/asm-mips/mach-ip32/mc146818rtc.h
@@ -11,7 +11,6 @@
#ifndef __ASM_MACH_IP32_MC146818RTC_H
#define __ASM_MACH_IP32_MC146818RTC_H
-#include <asm/io.h>
#include <asm/ip32/mace.h>
#define RTC_PORT(x) (0x70 + (x))
@@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
mace->isa.rtc[addr << 8] = data;
}
-/* FIXME: Do it right. For now just assume that noone lives in 20th century
- * and no O2 user in 22th century ;-) */
+/*
+ * FIXME: Do it right. For now just assume that noone lives in 20th century
+ * and no O2 user in 22th century ;-)
+ */
#define mc146818_decode_year(year) ((year) + 2000)
#define RTC_ALWAYS_BCD 0
diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h
index 134a4b6..cff6192 100644
--- a/include/asm-mips/mach-jmr3927/asm/ds1742.h
+++ b/include/asm-mips/mach-jmr3927/ds1742.h
@@ -5,12 +5,12 @@
*
* Copyright (C) 2003 by Ralf Baechle
*/
-#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H
-#define __ASM_MACH_JMR3927_ASM_DS1742_H
+#ifndef __ASM_MACH_JMR3927_DS1742_H
+#define __ASM_MACH_JMR3927_DS1742_H
#include <asm/jmr3927/jmr3927.h>
#define rtc_read(reg) (jmr3927_nvram_in(addr))
#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg)))
-#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */
+#endif /* __ASM_MACH_JMR3927_DS1742_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 9a3088b..409d443 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
#define BOARD_PC1_INT PB1200_PC1_INT
#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+/* Nand chip select */
+#define NAND_CS 1
+
#endif /* __ASM_PB1200_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d608..9578ead 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG 0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+
#endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mach-qemu/timex.h b/include/asm-mips/mach-qemu/timex.h
new file mode 100644
index 0000000..cd54369
--- /dev/null
+++ b/include/asm-mips/mach-qemu/timex.h
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2005 Daniel Jacobowitz
+ */
+#ifndef __ASM_MACH_QEMU_TIMEX_H
+#define __ASM_MACH_QEMU_TIMEX_H
+
+/*
+ * We use a simulated i8254 PIC...
+ */
+#define CLOCK_TICK_RATE 1193182
+
+#endif /* __ASM_MACH_QEMU_TIMEX_H */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index c3dcfcb..365c2a3 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,9 +20,14 @@
#ifndef _MIPS_SEADINT_H
#define _MIPS_SEADINT_H
-#define SEADINT_UART0 2
-#define SEADINT_UART1 3
+/*
+ * Interrupts 0..7 are used for SEAD CPU interrupts
+ */
+#define MIPSCPU_INT_BASE 0
+
+#define MIPSCPU_INT_UART0 2
+#define MIPSCPU_INT_UART1 3
-extern void seadint_init(void);
+#define MIPSCPU_INT_CPUCTR 7
#endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8ca539e..6fe903e 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -155,27 +155,6 @@ typedef struct sigaltstack {
#ifdef __KERNEL__
#include <asm/sigcontext.h>
-/*
- * The following break codes are or were in use for specific purposes in
- * other MIPS operating systems. Linux/MIPS doesn't use all of them. The
- * unused ones are here as placeholders; we might encounter them in
- * non-Linux/MIPS object files or make use of them in the future.
- */
-#define BRK_USERBP 0 /* User bp (used by debuggers) */
-#define BRK_KERNELBP 1 /* Break in the kernel */
-#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */
-#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */
-#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */
-#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */
-#define BRK_OVERFLOW 6 /* Overflow check */
-#define BRK_DIVZERO 7 /* Divide by zero check */
-#define BRK_RANGE 8 /* Range error check */
-#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */
-#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
-#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
-#define BRK_MULOVF 1023 /* Multiply overflow */
-#define BRK_BUG 512 /* Used by BUG() */
-
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
#endif /* __KERNEL__ */
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