diff options
Diffstat (limited to 'include/asm-arm/arch-clps711x')
| -rw-r--r-- | include/asm-arm/arch-clps711x/autcpu12.h | 78 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/debug-macro.S | 46 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/dma.h | 28 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/entry-macro.S | 51 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/hardware.h | 238 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/io.h | 37 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/irqs.h | 53 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/memory.h | 128 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/param.h | 19 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/syspld.h | 121 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/system.h | 38 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/time.h | 48 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/timex.h | 23 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/uncompress.h | 67 | ||||
| -rw-r--r-- | include/asm-arm/arch-clps711x/vmalloc.h | 31 |
15 files changed, 1006 insertions, 0 deletions
diff --git a/include/asm-arm/arch-clps711x/autcpu12.h b/include/asm-arm/arch-clps711x/autcpu12.h new file mode 100644 index 0000000..1588a36 --- /dev/null +++ b/include/asm-arm/arch-clps711x/autcpu12.h @@ -0,0 +1,78 @@ +/* + * AUTCPU12 specific defines + * + * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_AUTCPU12_H +#define __ASM_ARCH_AUTCPU12_H + +/* + * The CS8900A ethernet chip has its I/O registers wired to chip select 2 + * (nCS2). This is the mapping for it. + */ +#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */ +#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */ + +/* + * The flash bank is wired to chip select 0 + */ +#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */ + +/* offset for device specific information structure */ +#define AUTCPU12_LCDINFO_OFFS (0x00010000) +/* +* Videomemory is the internal SRAM (CS 6) +*/ +#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE +#define AUTCPU12_VIRT_VIDEO (0xfd000000) + +/* +* All special IO's are tied to CS1 +*/ +#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */ + +#define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */ + +#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ + +#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */ + +#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ + +#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ + +#define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */ + +#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ + +/* +* defines for smartmedia card access +*/ +#define AUTCPU12_SMC_RDY (1<<2) +#define AUTCPU12_SMC_ALE (1<<3) +#define AUTCPU12_SMC_CLE (1<<4) +#define AUTCPU12_SMC_PORT_OFFSET PBDR +#define AUTCPU12_SMC_SELECT_OFFSET 0x10 +/* +* defines for lcd contrast +*/ +#define AUTCPU12_DPOT_PORT_OFFSET PEDR +#define AUTCPU12_DPOT_CS (1<<0) +#define AUTCPU12_DPOT_CLK (1<<1) +#define AUTCPU12_DPOT_UD (1<<2) + +#endif diff --git a/include/asm-arm/arch-clps711x/debug-macro.S b/include/asm-arm/arch-clps711x/debug-macro.S new file mode 100644 index 0000000..bc0a576 --- /dev/null +++ b/include/asm-arm/arch-clps711x/debug-macro.S @@ -0,0 +1,46 @@ +/* linux/include/asm-arm/arch-clps711x/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <asm/hardware/clps7111.h> + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #CLPS7111_PHYS_BASE + movne \rx, #CLPS7111_VIRT_BASE +#ifndef CONFIG_DEBUG_CLPS711X_UART2 + add \rx, \rx, #0x0000 @ UART1 +#else + add \rx, \rx, #0x1000 @ UART2 +#endif + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x0480] @ UARTDR + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx + tst \rd, #1 << 11 @ UBUSYx + bne 1001b + .endm + + .macro busyuart,rd,rx + tst \rx, #0x1000 @ UART2 does not have CTS here + bne 1002f +1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx + tst \rd, #1 << 8 @ CTS + bne 1001b +1002: + .endm + diff --git a/include/asm-arm/arch-clps711x/dma.h b/include/asm-arm/arch-clps711x/dma.h new file mode 100644 index 0000000..3c4c5c8 --- /dev/null +++ b/include/asm-arm/arch-clps711x/dma.h @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-clps711x/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff + +#define MAX_DMA_CHANNELS 0 + +#endif /* _ASM_ARCH_DMA_H */ + diff --git a/include/asm-arm/arch-clps711x/entry-macro.S b/include/asm-arm/arch-clps711x/entry-macro.S new file mode 100644 index 0000000..b31079a --- /dev/null +++ b/include/asm-arm/arch-clps711x/entry-macro.S @@ -0,0 +1,51 @@ +/* + * include/asm-arm/arch-CLPS711x/entry-macro.S + * + * Low-level IRQ helper macros for CLPS711X-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <asm/hardware/clps7111.h> + + .macro disable_fiq + .endm + +#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) +#error INTSR stride != INTMR stride +#endif + + .macro get_irqnr_and_base, irqnr, stat, base, mask + mov \base, #CLPS7111_BASE + ldr \stat, [\base, #INTSR1] + ldr \mask, [\base, #INTMR1] + mov \irqnr, #4 + mov \mask, \mask, lsl #16 + and \stat, \stat, \mask, lsr #16 + movs \stat, \stat, lsr #4 + bne 1001f + + add \base, \base, #INTSR2 - INTSR1 + ldr \stat, [\base, #INTSR1] + ldr \mask, [\base, #INTMR1] + mov \irqnr, #16 + mov \mask, \mask, lsl #16 + and \stat, \stat, \mask, lsr #16 + +1001: tst \stat, #255 + addeq \irqnr, \irqnr, #8 + moveq \stat, \stat, lsr #8 + tst \stat, #15 + addeq \irqnr, \irqnr, #4 + moveq \stat, \stat, lsr #4 + tst \stat, #3 + addeq \irqnr, \irqnr, #2 + moveq \stat, \stat, lsr #2 + tst \stat, #1 + addeq \irqnr, \irqnr, #1 + moveq \stat, \stat, lsr #1 + tst \stat, #1 @ bit 0 should be set + .endm + + diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h new file mode 100644 index 0000000..1386871 --- /dev/null +++ b/include/asm-arm/arch-clps711x/hardware.h @@ -0,0 +1,238 @@ +/* + * linux/include/asm-arm/arch-clps711x/hardware.h + * + * This file contains the hardware definitions of the Prospector P720T. + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <linux/config.h> + +#define CLPS7111_VIRT_BASE 0xff000000 +#define CLPS7111_BASE CLPS7111_VIRT_BASE + +/* + * The physical addresses that the external chip select signals map to is + * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212 + * processors. CONFIG_EP72XX_BOOT_ROM is only available if these + * processors are in use. + */ +#ifndef CONFIG_EP72XX_ROM_BOOT +#define CS0_PHYS_BASE (0x00000000) +#define CS1_PHYS_BASE (0x10000000) +#define CS2_PHYS_BASE (0x20000000) +#define CS3_PHYS_BASE (0x30000000) +#define CS4_PHYS_BASE (0x40000000) +#define CS5_PHYS_BASE (0x50000000) +#define CS6_PHYS_BASE (0x60000000) +#define CS7_PHYS_BASE (0x70000000) +#else +#define CS0_PHYS_BASE (0x70000000) +#define CS1_PHYS_BASE (0x60000000) +#define CS2_PHYS_BASE (0x50000000) +#define CS3_PHYS_BASE (0x40000000) +#define CS4_PHYS_BASE (0x30000000) +#define CS5_PHYS_BASE (0x20000000) +#define CS6_PHYS_BASE (0x10000000) +#define CS7_PHYS_BASE (0x00000000) +#endif + +#if defined (CONFIG_ARCH_EP7211) + +#define EP7211_VIRT_BASE CLPS7111_VIRT_BASE +#define EP7211_BASE CLPS7111_VIRT_BASE +#include <asm/hardware/ep7211.h> + +#elif defined (CONFIG_ARCH_EP7212) + +#define EP7212_VIRT_BASE CLPS7111_VIRT_BASE +#define EP7212_BASE CLPS7111_VIRT_BASE +#include <asm/hardware/ep7212.h> + +#endif + +#define SYSPLD_VIRT_BASE 0xfe000000 +#define SYSPLD_BASE SYSPLD_VIRT_BASE + +#ifndef __ASSEMBLER__ + +#define PCIO_BASE IO_BASE + +#endif + + +#if defined (CONFIG_ARCH_AUTCPU12) + +#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE +#define CS89712_BASE CLPS7111_VIRT_BASE + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> +#include <asm/hardware/cs89712.h> + +#endif + + +#if defined (CONFIG_ARCH_CDB89712) + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> +#include <asm/hardware/cs89712.h> + +/* dynamic ioremap() areas */ +#define FLASH_START 0x00000000 +#define FLASH_SIZE 0x800000 +#define FLASH_WIDTH 4 + +#define SRAM_START 0x60000000 +#define SRAM_SIZE 0xc000 +#define SRAM_WIDTH 4 + +#define BOOTROM_START 0x70000000 +#define BOOTROM_SIZE 0x80 +#define BOOTROM_WIDTH 4 + + +/* static cdb89712_map_io() areas */ +#define REGISTER_START 0x80000000 +#define REGISTER_SIZE 0x4000 +#define REGISTER_BASE 0xff000000 + +#define ETHER_START 0x20000000 +#define ETHER_SIZE 0x1000 +#define ETHER_BASE 0xfe000000 + +#endif + + +#if defined (CONFIG_ARCH_EDB7211) + +/* + * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) + * and repeat across it. This is the mapping for it. + * + * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This + * was cause for much consternation and headscratching. This should probably + * be made a compile/run time kernel option. + */ +#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */ + +#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */ + + +/* + * The CS8900A ethernet chip has its I/O registers wired to chip select 2 + * (nCS2). This is the mapping for it. + * + * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This + * was cause for much consternation and headscratching. This should probably + * be made a compile/run time kernel option. + */ +#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */ + +#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */ + + +/* + * The two flash banks are wired to chip selects 0 and 1. This is the mapping + * for them. + * + * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running + * in jumpered boot mode. + */ +#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ +#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ + +#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */ +#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */ + +#endif /* CONFIG_ARCH_EDB7211 */ + + +/* + * Relevant bits in port D, which controls power to the various parts of + * the LCD on the EDB7211. + */ +#define EDB_PD1_LCD_DC_DC_EN (1<<1) +#define EDB_PD2_LCDEN (1<<2) +#define EDB_PD3_LCDBL (1<<3) + + +#if defined (CONFIG_ARCH_CEIVA) + +#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE +#define CEIVA_BASE CLPS7111_VIRT_BASE + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> + + +/* + * The two flash banks are wired to chip selects 0 and 1. This is the mapping + * for them. + * + * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running + * in jumpered boot mode. + */ +#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ +#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ + +#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */ +#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */ + +#define CEIVA_FLASH_SIZE 0x100000 +#define CEIVA_FLASH_WIDTH 2 + +#define SRAM_START 0x60000000 +#define SRAM_SIZE 0xc000 +#define SRAM_WIDTH 4 + +#define BOOTROM_START 0x70000000 +#define BOOTROM_SIZE 0x80 +#define BOOTROM_WIDTH 4 + +/* + * SED1355 LCD controller + */ +#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE +#define CEIVA_VIRT_SED1355 (0xfc000000) + +/* + * Relevant bits in port D, which controls power to the various parts of + * the LCD on the Ceiva Photo Max, and reset to the LCD controller. + */ + +// Reset line to SED1355 (must be high to operate) +#define CEIVA_PD1_LCDRST (1<<1) +// LCD panel enable (set to one, to enable LCD) +#define CEIVA_PD4_LCDEN (1<<4) +// Backlight (set to one, to turn on backlight +#define CEIVA_PD5_LCDBL (1<<5) + +/* + * Relevant bits in port B, which report the status of the buttons. + */ + +// White button +#define CEIVA_PB4_WHT_BTN (1<<4) +// Black button +#define CEIVA_PB0_BLK_BTN (1<<0) +#endif // #if defined (CONFIG_ARCH_CEIVA) + +#endif diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h new file mode 100644 index 0000000..14d7e8d --- /dev/null +++ b/include/asm-arm/arch-clps711x/io.h @@ -0,0 +1,37 @@ +/* + * linux/include/asm-arm/arch-clps711x/io.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) +#define __mem_isa(a) (a) + +/* + * We don't support ins[lb]/outs[lb]. Make them fault. + */ +#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0) + +#endif diff --git a/include/asm-arm/arch-clps711x/irqs.h b/include/asm-arm/arch-clps711x/irqs.h new file mode 100644 index 0000000..76025dc --- /dev/null +++ b/include/asm-arm/arch-clps711x/irqs.h @@ -0,0 +1,53 @@ +/* + * linux/include/asm-arm/arch-clps711x/irqs.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Interrupts from INTSR1 + */ +#define IRQ_CSINT 4 +#define IRQ_EINT1 5 +#define IRQ_EINT2 6 +#define IRQ_EINT3 7 +#define IRQ_TC1OI 8 +#define IRQ_TC2OI 9 +#define IRQ_RTCMI 10 +#define IRQ_TINT 11 +#define IRQ_UTXINT1 12 +#define IRQ_URXINT1 13 +#define IRQ_UMSINT 14 +#define IRQ_SSEOTI 15 + +#define INT1_IRQS (0x0000fff0) +#define INT1_ACK_IRQS (0x00004f10) + +/* + * Interrupts from INTSR2 + */ +#define IRQ_KBDINT (16+0) /* bit 0 */ +#define IRQ_SS2RX (16+1) /* bit 1 */ +#define IRQ_SS2TX (16+2) /* bit 2 */ +#define IRQ_UTXINT2 (16+12) /* bit 12 */ +#define IRQ_URXINT2 (16+13) /* bit 13 */ + +#define INT2_IRQS (0x30070000) +#define INT2_ACK_IRQS (0x00010000) + +#define NR_IRQS 30 + diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h new file mode 100644 index 0000000..bd97894 --- /dev/null +++ b/include/asm-arm/arch-clps711x/memory.h @@ -0,0 +1,128 @@ +/* + * linux/include/asm-arm/arch-clps711x/memory.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include <linux/config.h> + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET (0xc0000000UL) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ + +#if defined(CONFIG_ARCH_CDB89712) + +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + +#elif defined (CONFIG_ARCH_AUTCPU12) + +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + +#else + +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) + +#endif + + +/* + * Like the SA1100, the EDB7211 has a large gap between physical RAM + * banks. In 2.2, the Psion (CL-PS7110) port added custom support for + * discontiguous physical memory. In 2.4, we can use the standard + * Linux NUMA support. + * + * This is not necessary for EP7211 implementations with only one used + * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. + */ + +#ifdef CONFIG_DISCONTIGMEM +/* + * Because of the wide memory address space between physical RAM banks on the + * SA1100, it's much more convenient to use Linux's NUMA support to implement + * our memory map representation. Assuming all memory nodes have equal access + * characteristics, we then have generic discontiguous memory support. + * + * Of course, all this isn't mandatory for SA1100 implementations with only + * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. + * + * The nodes are matched with the physical memory bank addresses which are + * incidentally the same as virtual addresses. + * + * node 0: 0xc0000000 - 0xc7ffffff + * node 1: 0xc8000000 - 0xcfffffff + * node 2: 0xd0000000 - 0xd7ffffff + * node 3: 0xd8000000 - 0xdfffffff + */ + +/* + * Given a kernel address, find the home node of the underlying memory. + */ +#define KVADDR_TO_NID(addr) \ + (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT) + +/* + * Given a page frame number, convert it to a node id. + */ +#define PFN_TO_NID(pfn) \ + (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT)) + +/* + * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory + * and returns the mem_map of that node. + */ +#define ADDR_TO_MAPBASE(kaddr) \ + NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) + +#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) + +/* + * Given a kaddr, LOCAL_MAR_NR finds the owning node of the memory + * and returns the index corresponding to the appropriate page in the + * node's mem_map. + */ +#define LOCAL_MAP_NR(addr) \ + (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT) + +/* + * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 + * uses only one of the two banks (bank #1). However, even within + * bank #1, memory is discontiguous. + * + * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between + * them, so we use 24 for the node max shift to get 16MB node sizes. + */ +#define NODE_MAX_MEM_SHIFT 24 +#define NODE_MAX_MEM_SIZE (1<<NODE_MAX_MEM_SHIFT) + +#endif /* CONFIG_DISCONTIGMEM */ + +#endif + diff --git a/include/asm-arm/arch-clps711x/param.h b/include/asm-arm/arch-clps711x/param.h new file mode 100644 index 0000000..86f6bd2 --- /dev/null +++ b/include/asm-arm/arch-clps711x/param.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/arch-clps711x/param.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/include/asm-arm/arch-clps711x/syspld.h b/include/asm-arm/arch-clps711x/syspld.h new file mode 100644 index 0000000..960578a --- /dev/null +++ b/include/asm-arm/arch-clps711x/syspld.h @@ -0,0 +1,121 @@ +/* + * linux/include/asm-arm/arch-clps711x/syspld.h + * + * System Control PLD register definitions. + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSPLD_H +#define __ASM_ARCH_SYSPLD_H + +#define SYSPLD_PHYS_BASE (0x10000000) + +#ifndef __ASSEMBLY__ +#include <asm/types.h> + +#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off)) +#else +#define SYSPLD_REG(type,off) (off) +#endif + +#define PLD_INT SYSPLD_REG(u32, 0x000000) +#define PLD_INT_PENIRQ (1 << 5) +#define PLD_INT_UCB_IRQ (1 << 1) +#define PLD_INT_KBD_ATN (1 << 0) /* EINT1 */ + +#define PLD_PWR SYSPLD_REG(u32, 0x000004) +#define PLD_PWR_EXT (1 << 5) +#define PLD_PWR_MODE (1 << 4) /* 1 = PWM, 0 = PFM */ +#define PLD_S4_ON (1 << 3) /* LCD bias voltage enable */ +#define PLD_S3_ON (1 << 2) /* LCD backlight enable */ +#define PLD_S2_ON (1 << 1) /* LCD 3V3 supply enable */ +#define PLD_S1_ON (1 << 0) /* LCD 3V supply enable */ + +#define PLD_KBD SYSPLD_REG(u32, 0x000008) +#define PLD_KBD_WAKE (1 << 1) +#define PLD_KBD_EN (1 << 0) + +#define PLD_SPI SYSPLD_REG(u32, 0x00000c) +#define PLD_SPI_EN (1 << 0) + +#define PLD_IO SYSPLD_REG(u32, 0x000010) +#define PLD_IO_BOOTSEL (1 << 6) /* boot sel switch */ +#define PLD_IO_USER (1 << 5) /* user defined switch */ +#define PLD_IO_LED3 (1 << 4) +#define PLD_IO_LED2 (1 << 3) +#define PLD_IO_LED1 (1 << 2) +#define PLD_IO_LED0 (1 << 1) +#define PLD_IO_LEDEN (1 << 0) + +#define PLD_IRDA SYSPLD_REG(u32, 0x000014) +#define PLD_IRDA_EN (1 << 0) + +#define PLD_COM2 SYSPLD_REG(u32, 0x000018) +#define PLD_COM2_EN (1 << 0) + +#define PLD_COM1 SYSPLD_REG(u32, 0x00001c) +#define PLD_COM1_EN (1 << 0) + +#define PLD_AUD SYSPLD_REG(u32, 0x000020) +#define PLD_AUD_DIV1 (1 << 6) +#define PLD_AUD_DIV0 (1 << 5) +#define PLD_AUD_CLK_SEL1 (1 << 4) +#define PLD_AUD_CLK_SEL0 (1 << 3) +#define PLD_AUD_MIC_PWR (1 << 2) +#define PLD_AUD_MIC_GAIN (1 << 1) +#define PLD_AUD_CODEC_EN (1 << 0) + +#define PLD_CF SYSPLD_REG(u32, 0x000024) +#define PLD_CF2_SLEEP (1 << 5) +#define PLD_CF1_SLEEP (1 << 4) +#define PLD_CF2_nPDREQ (1 << 3) +#define PLD_CF1_nPDREQ (1 << 2) +#define PLD_CF2_nIRQ (1 << 1) +#define PLD_CF1_nIRQ (1 << 0) + +#define PLD_SDC SYSPLD_REG(u32, 0x000028) +#define PLD_SDC_INT_EN (1 << 2) +#define PLD_SDC_WP (1 << 1) +#define PLD_SDC_CD (1 << 0) + +#define PLD_FPGA SYSPLD_REG(u32, 0x00002c) + +#define PLD_CODEC SYSPLD_REG(u32, 0x400000) +#define PLD_CODEC_IRQ3 (1 << 4) +#define PLD_CODEC_IRQ2 (1 << 3) +#define PLD_CODEC_IRQ1 (1 << 2) +#define PLD_CODEC_EN (1 << 0) + +#define PLD_BRITE SYSPLD_REG(u32, 0x400004) +#define PLD_BRITE_UP (1 << 1) +#define PLD_BRITE_DN (1 << 0) + +#define PLD_LCDEN SYSPLD_REG(u32, 0x400008) +#define PLD_LCDEN_EN (1 << 0) + +#define PLD_ID SYSPLD_REG(u32, 0x40000c) + +#define PLD_TCH SYSPLD_REG(u32, 0x400010) +#define PLD_TCH_PENIRQ (1 << 1) +#define PLD_TCH_EN (1 << 0) + +#define PLD_GPIO SYSPLD_REG(u32, 0x400014) +#define PLD_GPIO2 (1 << 2) +#define PLD_GPIO1 (1 << 1) +#define PLD_GPIO0 (1 << 0) + +#endif diff --git a/include/asm-arm/arch-clps711x/system.h b/include/asm-arm/arch-clps711x/system.h new file mode 100644 index 0000000..2ab981f --- /dev/null +++ b/include/asm-arm/arch-clps711x/system.h @@ -0,0 +1,38 @@ +/* + * linux/include/asm-arm/arch-clps711x/system.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/hardware/clps7111.h> + +static inline void arch_idle(void) +{ + clps_writel(1, HALT); + __asm__ __volatile__( + "mov r0, r0\n\ + mov r0, r0"); +} + +static inline void arch_reset(char mode) +{ + cpu_reset(0); +} + +#endif diff --git a/include/asm-arm/arch-clps711x/time.h b/include/asm-arm/arch-clps711x/time.h new file mode 100644 index 0000000..9cb27cd --- /dev/null +++ b/include/asm-arm/arch-clps711x/time.h @@ -0,0 +1,48 @@ +/* + * linux/include/asm-arm/arch-clps711x/time.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <asm/leds.h> +#include <asm/hardware/clps7111.h> + +extern void clps711x_setup_timer(void); + +/* + * IRQ handler for the timer + */ +static irqreturn_t +p720t_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + do_leds(); + do_timer(regs); +#ifndef CONFIG_SMP + update_process_times(user_mode(regs)); +#endif + do_profile(regs); + return IRQ_HANDLED; +} + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +void __init time_init(void) +{ + clps711x_setup_timer(); + timer_irq.handler = p720t_timer_interrupt; + setup_irq(IRQ_TC2OI, &timer_irq); +} diff --git a/include/asm-arm/arch-clps711x/timex.h b/include/asm-arm/arch-clps711x/timex.h new file mode 100644 index 0000000..dcbb381 --- /dev/null +++ b/include/asm-arm/arch-clps711x/timex.h @@ -0,0 +1,23 @@ +/* + * linux/include/asm-arm/arch-clps711x/timex.h + * + * Prospector 720T architecture timex specifications + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define CLOCK_TICK_RATE 512000 diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h new file mode 100644 index 0000000..7d0ab79 --- /dev/null +++ b/include/asm-arm/arch-clps711x/uncompress.h @@ -0,0 +1,67 @@ +/* + * linux/include/asm-arm/arch-clps711x/uncompress.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/config.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#include <asm/hardware/clps7111.h> + +#undef CLPS7111_BASE +#define CLPS7111_BASE CLPS7111_PHYS_BASE + +#define barrier() __asm__ __volatile__("": : :"memory") +#define __raw_readl(p) (*(unsigned long *)(p)) +#define __raw_writel(v,p) (*(unsigned long *)(p) = (v)) + +#ifdef CONFIG_DEBUG_CLPS711X_UART2 +#define SYSFLGx SYSFLG2 +#define UARTDRx UARTDR2 +#else +#define SYSFLGx SYSFLG1 +#define UARTDRx UARTDR1 +#endif + +/* + * This does not append a newline + */ +static void putstr(const char *s) +{ + char c; + + while ((c = *s++) != '\0') { + while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) + barrier(); + clps_writel(c, UARTDRx); + + if (c == '\n') { + while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) + barrier(); + clps_writel('\r', UARTDRx); + } + } + while (clps_readl(SYSFLGx) & SYSFLG_UBUSY) + barrier(); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() + +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-clps711x/vmalloc.h b/include/asm-arm/arch-clps711x/vmalloc.h new file mode 100644 index 0000000..42571ed --- /dev/null +++ b/include/asm-arm/arch-clps711x/vmalloc.h @@ -0,0 +1,31 @@ +/* + * linux/include/asm-arm/arch-clps711x/vmalloc.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) |
