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-rw-r--r--drivers/char/hw_random/omap-rng.c2
-rw-r--r--drivers/crypto/omap-aes.c6
-rw-r--r--drivers/crypto/omap-sham.c8
-rw-r--r--drivers/dma/omap-dma.c9
4 files changed, 7 insertions, 18 deletions
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index a5effd8..45e467d 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -27,8 +27,6 @@
#include <asm/io.h>
-#include <plat/cpu.h>
-
#define RNG_OUT_REG 0x00 /* Output register */
#define RNG_STAT_REG 0x04 /* Status register
[0] = STAT_BUSY */
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 093a8af..db3115d 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -29,7 +29,6 @@
#include <crypto/scatterwalk.h>
#include <crypto/aes.h>
-#include <plat/cpu.h>
#include <plat/dma.h>
/* OMAP TRM gives bitfields as start:end, where start is the higher bit
@@ -941,11 +940,6 @@ static int __init omap_aes_mod_init(void)
{
pr_info("loading %s driver\n", "omap-aes");
- if (!cpu_class_is_omap2() || omap_type() != OMAP2_DEVICE_TYPE_SEC) {
- pr_err("Unsupported cpu\n");
- return -ENODEV;
- }
-
return platform_driver_register(&omap_aes_driver);
}
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index a3fd6fc..f50387c 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -37,7 +37,6 @@
#include <crypto/hash.h>
#include <crypto/internal/hash.h>
-#include <plat/cpu.h>
#include <plat/dma.h>
#include <mach/irqs.h>
@@ -1289,13 +1288,6 @@ static int __init omap_sham_mod_init(void)
{
pr_info("loading %s driver\n", "omap-sham");
- if (!cpu_class_is_omap2() ||
- (omap_type() != OMAP2_DEVICE_TYPE_SEC &&
- omap_type() != OMAP2_DEVICE_TYPE_EMU)) {
- pr_err("Unsupported cpu\n");
- return -ENODEV;
- }
-
return platform_driver_register(&omap_sham_driver);
}
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index bb2d8e7..30abe7b 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -19,9 +19,14 @@
#include "virt-dma.h"
-#include <plat/cpu.h>
#include <plat/dma.h>
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define dma_omap2plus() 1
+#else
+#define dma_omap2plus() 0
+#endif
+
struct omap_dmadev {
struct dma_device ddev;
spinlock_t lock;
@@ -438,7 +443,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
}
- if (!cpu_class_is_omap1()) {
+ if (dma_omap2plus()) {
omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
}
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