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path: root/drivers/video/fbdev/omap2/dss/hdmi4.c
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Diffstat (limited to 'drivers/video/fbdev/omap2/dss/hdmi4.c')
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi4.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/dss/hdmi4.c
index 9a8713c..1f2fbcc 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4.c
@@ -180,7 +180,6 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
int r;
struct omap_video_timings *p;
struct omap_overlay_manager *mgr = hdmi.output.manager;
- unsigned long phy;
struct hdmi_wp_data *wp = &hdmi.wp;
r = hdmi_power_on_core(dssdev);
@@ -195,10 +194,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
- /* the functions below use kHz pixel clock. TODO: change to Hz */
- phy = p->pixelclock / 1000;
-
- hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy);
+ hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock);
/* config the PLL and PHY hdmi_set_pll_pwrfirst */
r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
@@ -207,7 +203,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
goto err_pll_enable;
}
- r = hdmi_phy_configure(&hdmi.phy, &hdmi.cfg);
+ r = hdmi_phy_configure(&hdmi.phy, hdmi.pll.info.clkdco,
+ hdmi.pll.info.clkout);
if (r) {
DSSDBG("Failed to configure PHY\n");
goto err_phy_cfg;
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