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path: root/drivers/staging/sm750fb/ddk750_chip.c
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Diffstat (limited to 'drivers/staging/sm750fb/ddk750_chip.c')
-rw-r--r--drivers/staging/sm750fb/ddk750_chip.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index 10cf729..5e4bfb6 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -16,9 +16,9 @@ logical_chip_type_t sm750_get_chip_type(void)
void sm750_set_chip_type(unsigned short devId, u8 revId)
{
- if (devId == 0x718)
+ if (devId == 0x718) {
chip = SM718;
- else if (devId == 0x750) {
+ } else if (devId == 0x750) {
chip = SM750;
/* SM750 and SM750LE are different in their revision ID only. */
if (revId == SM750LE_REVISION_ID) {
@@ -69,11 +69,11 @@ static void set_chip_clock(unsigned int frequency)
pll.clockType = MXCLK_PLL;
/*
- * Call sm750_calc_pll_value() to fill the other fields of the PLL
- * structure. Sometimes, the chip cannot set up the exact
- * clock required by the User.
- * Return value of sm750_calc_pll_value gives the actual possible
- * clock.
+ * Call sm750_calc_pll_value() to fill the other fields
+ * of the PLL structure. Sometimes, the chip cannot set
+ * up the exact clock required by the User.
+ * Return value of sm750_calc_pll_value gives the actual
+ * possible clock.
*/
ulActualMxClk = sm750_calc_pll_value(frequency, &pll);
@@ -352,7 +352,7 @@ unsigned int sm750_calc_pll_value(unsigned int request_orig, struct pll_value *p
RN = N * request;
quo = RN / input;
rem = RN % input;/* rem always small than 14318181 */
- fl_quo = (rem * 10000 / input);
+ fl_quo = rem * 10000 / input;
for (d = max_d; d >= 0; d--) {
X = BIT(d);
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