diff options
Diffstat (limited to 'drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host')
53 files changed, 0 insertions, 7489 deletions
diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c deleted file mode 100644 index dcb9a312..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2016, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "debug.h" - -#ifndef __INLINE_DEBUG__ -#include "debug_private.h" -#endif /* __INLINE_DEBUG__ */ - -#include "memory_access.h" - -#define __INLINE_SP__ -#include "sp.h" - -#include "assert_support.h" - -/* The address of the remote copy */ -hrt_address debug_buffer_address = (hrt_address)-1; -hrt_vaddress debug_buffer_ddr_address = (hrt_vaddress)-1; -/* The local copy */ -static debug_data_t debug_data; -debug_data_t *debug_data_ptr = &debug_data; - -void debug_buffer_init(const hrt_address addr) -{ - debug_buffer_address = addr; - - debug_data.head = 0; - debug_data.tail = 0; -} - -void debug_buffer_ddr_init(const hrt_vaddress addr) -{ - debug_buf_mode_t mode = DEBUG_BUFFER_MODE_LINEAR; - uint32_t enable = 1; - uint32_t head = 0; - uint32_t tail = 0; - /* set the ddr queue */ - debug_buffer_ddr_address = addr; - mmgr_store(addr + DEBUG_DATA_BUF_MODE_DDR_ADDR, - &mode, sizeof(debug_buf_mode_t)); - mmgr_store(addr + DEBUG_DATA_HEAD_DDR_ADDR, - &head, sizeof(uint32_t)); - mmgr_store(addr + DEBUG_DATA_TAIL_DDR_ADDR, - &tail, sizeof(uint32_t)); - mmgr_store(addr + DEBUG_DATA_ENABLE_DDR_ADDR, - &enable, sizeof(uint32_t)); - - /* set the local copy */ - debug_data.head = 0; - debug_data.tail = 0; -} - -void debug_buffer_setmode(const debug_buf_mode_t mode) -{ - assert(debug_buffer_address != ((hrt_address)-1)); - - sp_dmem_store_uint32(SP0_ID, - debug_buffer_address + DEBUG_DATA_BUF_MODE_ADDR, mode); -} - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_local.h deleted file mode 100644 index 2b0c5f4..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_local.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __DEBUG_LOCAL_H_INCLUDED__ -#define __DEBUG_LOCAL_H_INCLUDED__ - -#include "debug_global.h" - -#endif /* __DEBUG_LOCAL_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h deleted file mode 100644 index a047aad..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __DEBUG_PRIVATE_H_INCLUDED__ -#define __DEBUG_PRIVATE_H_INCLUDED__ - -#include "debug_public.h" - -#include "sp.h" - -#define __INLINE_ISP__ -#include "isp.h" - -#include "memory_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_DEBUG_C bool is_debug_buffer_empty(void) -{ - return (debug_data_ptr->head == debug_data_ptr->tail); -} - -STORAGE_CLASS_DEBUG_C hrt_data debug_dequeue(void) -{ - hrt_data value = 0; - - assert(debug_buffer_address != ((hrt_address)-1)); - - debug_synch_queue(); - - if (!is_debug_buffer_empty()) { - value = debug_data_ptr->buf[debug_data_ptr->head]; - debug_data_ptr->head = (debug_data_ptr->head + 1) & DEBUG_BUF_MASK; - sp_dmem_store_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_HEAD_ADDR, debug_data_ptr->head); - } - - return value; -} - -STORAGE_CLASS_DEBUG_C void debug_synch_queue(void) -{ - uint32_t remote_tail = sp_dmem_load_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_TAIL_ADDR); -/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ - if (remote_tail > debug_data_ptr->tail) { - size_t delta = remote_tail - debug_data_ptr->tail; - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - } else if (remote_tail < debug_data_ptr->tail) { - size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); - } /* else we are up to date */ - debug_data_ptr->tail = remote_tail; -} - -STORAGE_CLASS_DEBUG_C void debug_synch_queue_isp(void) -{ - uint32_t remote_tail = isp_dmem_load_uint32(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_TAIL_ADDR); -/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ - if (remote_tail > debug_data_ptr->tail) { - size_t delta = remote_tail - debug_data_ptr->tail; - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - } else if (remote_tail < debug_data_ptr->tail) { - size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); - } /* else we are up to date */ - debug_data_ptr->tail = remote_tail; -} - -STORAGE_CLASS_DEBUG_C void debug_synch_queue_ddr(void) -{ - uint32_t remote_tail; - - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_TAIL_DDR_ADDR, &remote_tail, sizeof(uint32_t)); -/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ - if (remote_tail > debug_data_ptr->tail) { - size_t delta = remote_tail - debug_data_ptr->tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - } else if (remote_tail < debug_data_ptr->tail) { - size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); - } /* else we are up to date */ - debug_data_ptr->tail = remote_tail; -} - -#endif /* __DEBUG_PRIVATE_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c deleted file mode 100644 index 770db7d..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c +++ /dev/null @@ -1,299 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2016, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include <linux/kernel.h> - -#include "dma.h" - -#include "assert_support.h" - -#ifndef __INLINE_DMA__ -#include "dma_private.h" -#endif /* __INLINE_DMA__ */ - -void dma_get_state(const dma_ID_t ID, dma_state_t *state) -{ - int i; - hrt_data tmp; - - assert(ID < N_DMA_ID); - assert(state != NULL); - - tmp = dma_reg_load(ID, DMA_COMMAND_FSM_REG_IDX); - //reg [3:0] : flags error [3], stall, run, idle [0] - //reg [9:4] : command - //reg[14:10] : channel - //reg [23:15] : param - state->fsm_command_idle = tmp & 0x1; - state->fsm_command_run = tmp & 0x2; - state->fsm_command_stalling = tmp & 0x4; - state->fsm_command_error = tmp & 0x8; - state->last_command_channel = (tmp>>10 & 0x1F); - state->last_command_param = (tmp>>15 & 0x0F); - tmp = (tmp>>4) & 0x3F; -/* state->last_command = (dma_commands_t)tmp; */ -/* if the enumerator is made non-linear */ - /* AM: the list below does not cover all the cases*/ - /* and these are not correct */ - /* therefore for just dumpinmg this command*/ - state->last_command = tmp; - -/* - if (tmp == 0) - state->last_command = DMA_COMMAND_READ; - if (tmp == 1) - state->last_command = DMA_COMMAND_WRITE; - if (tmp == 2) - state->last_command = DMA_COMMAND_SET_CHANNEL; - if (tmp == 3) - state->last_command = DMA_COMMAND_SET_PARAM; - if (tmp == 4) - state->last_command = DMA_COMMAND_READ_SPECIFIC; - if (tmp == 5) - state->last_command = DMA_COMMAND_WRITE_SPECIFIC; - if (tmp == 8) - state->last_command = DMA_COMMAND_INIT; - if (tmp == 12) - state->last_command = DMA_COMMAND_INIT_SPECIFIC; - if (tmp == 15) - state->last_command = DMA_COMMAND_RST; -*/ - -/* No sub-fields, idx = 0 */ - state->current_command = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_CMD_IDX)); - state->current_addr_a = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_A_IDX)); - state->current_addr_b = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_B_IDX)); - - tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_STATE_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_idle = tmp & 0x1; - state->fsm_ctrl_run = tmp & 0x2; - state->fsm_ctrl_stalling = tmp & 0x4; - state->fsm_ctrl_error = tmp & 0x8; - tmp = tmp >> 4; -/* state->fsm_ctrl_state = (dma_ctrl_states_t)tmp; */ - if (tmp == 0) - state->fsm_ctrl_state = DMA_CTRL_STATE_IDLE; - if (tmp == 1) - state->fsm_ctrl_state = DMA_CTRL_STATE_REQ_RCV; - if (tmp == 2) - state->fsm_ctrl_state = DMA_CTRL_STATE_RCV; - if (tmp == 3) - state->fsm_ctrl_state = DMA_CTRL_STATE_RCV_REQ; - if (tmp == 4) - state->fsm_ctrl_state = DMA_CTRL_STATE_INIT; - state->fsm_ctrl_source_dev = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_source_addr = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_source_stride = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_source_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_XB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_source_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_YB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_source_dev = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_dest_dev = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_dest_addr = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_dest_stride = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_source_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_dest_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_dest_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_source_elems = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_dest_elems = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - state->fsm_ctrl_pack_extension = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); - - tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_STATE_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); - state->pack_idle = tmp & 0x1; - state->pack_run = tmp & 0x2; - state->pack_stalling = tmp & 0x4; - state->pack_error = tmp & 0x8; - state->pack_cnt_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_CNT_YB_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); - state->pack_src_cnt_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); - state->pack_dest_cnt_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); - - tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_REQ_STATE_IDX, - _DMA_FSM_GROUP_FSM_REQ_IDX)); -/* state->read_state = (dma_rw_states_t)tmp; */ - if (tmp == 0) - state->read_state = DMA_RW_STATE_IDLE; - if (tmp == 1) - state->read_state = DMA_RW_STATE_REQ; - if (tmp == 2) - state->read_state = DMA_RW_STATE_NEXT_LINE; - if (tmp == 3) - state->read_state = DMA_RW_STATE_UNLOCK_CHANNEL; - state->read_cnt_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_REQ_CNT_YB_IDX, - _DMA_FSM_GROUP_FSM_REQ_IDX)); - state->read_cnt_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_REQ_CNT_XB_IDX, - _DMA_FSM_GROUP_FSM_REQ_IDX)); - - tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_WR_STATE_IDX, - _DMA_FSM_GROUP_FSM_WR_IDX)); -/* state->write_state = (dma_rw_states_t)tmp; */ - if (tmp == 0) - state->write_state = DMA_RW_STATE_IDLE; - if (tmp == 1) - state->write_state = DMA_RW_STATE_REQ; - if (tmp == 2) - state->write_state = DMA_RW_STATE_NEXT_LINE; - if (tmp == 3) - state->write_state = DMA_RW_STATE_UNLOCK_CHANNEL; - state->write_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_WR_CNT_YB_IDX, - _DMA_FSM_GROUP_FSM_WR_IDX)); - state->write_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_WR_CNT_XB_IDX, - _DMA_FSM_GROUP_FSM_WR_IDX)); - - for (i = 0; i < HIVE_ISP_NUM_DMA_CONNS; i++) { - dma_port_state_t *port = &(state->port_states[i]); - - tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(0, i)); - port->req_cs = ((tmp & 0x1) != 0); - port->req_we_n = ((tmp & 0x2) != 0); - port->req_run = ((tmp & 0x4) != 0); - port->req_ack = ((tmp & 0x8) != 0); - - tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(1, i)); - port->send_cs = ((tmp & 0x1) != 0); - port->send_we_n = ((tmp & 0x2) != 0); - port->send_run = ((tmp & 0x4) != 0); - port->send_ack = ((tmp & 0x8) != 0); - - tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(2, i)); - if (tmp & 0x1) - port->fifo_state = DMA_FIFO_STATE_WILL_BE_FULL; - if (tmp & 0x2) - port->fifo_state = DMA_FIFO_STATE_FULL; - if (tmp & 0x4) - port->fifo_state = DMA_FIFO_STATE_EMPTY; - port->fifo_counter = tmp >> 3; - } - - for (i = 0; i < HIVE_DMA_NUM_CHANNELS; i++) { - dma_channel_state_t *ch = &(state->channel_states[i]); - - ch->connection = DMA_GET_CONNECTION(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_PACKING_SETUP_PARAM))); - ch->sign_extend = DMA_GET_EXTENSION(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_PACKING_SETUP_PARAM))); - ch->height = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_HEIGHT_PARAM)); - ch->stride_a = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_STRIDE_A_PARAM)); - ch->elems_a = DMA_GET_ELEMENTS(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_A_PARAM))); - ch->cropping_a = DMA_GET_CROPPING(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_A_PARAM))); - ch->width_a = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_WIDTH_A_PARAM)); - ch->stride_b = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_STRIDE_B_PARAM)); - ch->elems_b = DMA_GET_ELEMENTS(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_B_PARAM))); - ch->cropping_b = DMA_GET_CROPPING(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_B_PARAM))); - ch->width_b = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_WIDTH_B_PARAM)); - } -} - -void -dma_set_max_burst_size(const dma_ID_t ID, dma_connection conn, - uint32_t max_burst_size) -{ - assert(ID < N_DMA_ID); - assert(max_burst_size > 0); - dma_reg_store(ID, DMA_DEV_INFO_REG_IDX(_DMA_DEV_INTERF_MAX_BURST_IDX, conn), - max_burst_size - 1); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h deleted file mode 100644 index ab631e6..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __DMA_LOCAL_H_INCLUDED__ -#define __DMA_LOCAL_H_INCLUDED__ - -#include <type_support.h> -#include "dma_global.h" - -#include <hrt/defs.h> /* HRTCAT() */ -#include <hrt/bits.h> /* _hrt_get_bits() */ -#include <hive_isp_css_defs.h> /* HIVE_DMA_NUM_CHANNELS */ -#include <dma_v2_defs.h> - -#define _DMA_FSM_GROUP_CMD_IDX _DMA_V2_FSM_GROUP_CMD_IDX -#define _DMA_FSM_GROUP_ADDR_A_IDX _DMA_V2_FSM_GROUP_ADDR_SRC_IDX -#define _DMA_FSM_GROUP_ADDR_B_IDX _DMA_V2_FSM_GROUP_ADDR_DEST_IDX - -#define _DMA_FSM_GROUP_CMD_CTRL_IDX _DMA_V2_FSM_GROUP_CMD_CTRL_IDX - -#define _DMA_FSM_GROUP_FSM_CTRL_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_STATE_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_REQ_XB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_REQ_YB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX -#define _DMA_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX - -#define _DMA_FSM_GROUP_FSM_PACK_IDX _DMA_V2_FSM_GROUP_FSM_PACK_IDX -#define _DMA_FSM_GROUP_FSM_PACK_STATE_IDX _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX -#define _DMA_FSM_GROUP_FSM_PACK_CNT_YB_IDX _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX -#define _DMA_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX -#define _DMA_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX - -#define _DMA_FSM_GROUP_FSM_REQ_IDX _DMA_V2_FSM_GROUP_FSM_REQ_IDX -#define _DMA_FSM_GROUP_FSM_REQ_STATE_IDX _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX -#define _DMA_FSM_GROUP_FSM_REQ_CNT_YB_IDX _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX -#define _DMA_FSM_GROUP_FSM_REQ_CNT_XB_IDX _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX - -#define _DMA_FSM_GROUP_FSM_WR_IDX _DMA_V2_FSM_GROUP_FSM_WR_IDX -#define _DMA_FSM_GROUP_FSM_WR_STATE_IDX _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX -#define _DMA_FSM_GROUP_FSM_WR_CNT_YB_IDX _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX -#define _DMA_FSM_GROUP_FSM_WR_CNT_XB_IDX _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX - -#define _DMA_DEV_INTERF_MAX_BURST_IDX _DMA_V2_DEV_INTERF_MAX_BURST_IDX - -/* - * Macro's to compute the DMA parameter register indices - */ -#define DMA_SEL_COMP(comp) (((comp) & _hrt_ones(_DMA_V2_ADDR_SEL_COMP_BITS)) << _DMA_V2_ADDR_SEL_COMP_IDX) -#define DMA_SEL_CH(ch) (((ch) & _hrt_ones(_DMA_V2_ADDR_SEL_CH_REG_BITS)) << _DMA_V2_ADDR_SEL_CH_REG_IDX) -#define DMA_SEL_PARAM(param) (((param) & _hrt_ones(_DMA_V2_ADDR_SEL_PARAM_BITS)) << _DMA_V2_ADDR_SEL_PARAM_IDX) -/* CG = Connection Group */ -#define DMA_SEL_CG_INFO(info) (((info) & _hrt_ones(_DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS)) << _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX) -#define DMA_SEL_CG_COMP(comp) (((comp) & _hrt_ones(_DMA_V2_ADDR_SEL_GROUP_COMP_BITS)) << _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) -#define DMA_SEL_DEV_INFO(info) (((info) & _hrt_ones(_DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS)) << _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX) -#define DMA_SEL_DEV_ID(dev) (((dev) & _hrt_ones(_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS)) << _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX) - -#define DMA_COMMAND_FSM_REG_IDX (DMA_SEL_COMP(_DMA_V2_SEL_FSM_CMD) >> 2) -#define DMA_CHANNEL_PARAM_REG_IDX(ch, param) ((DMA_SEL_COMP(_DMA_V2_SEL_CH_REG) | DMA_SEL_CH(ch) | DMA_SEL_PARAM(param)) >> 2) -#define DMA_CG_INFO_REG_IDX(info_id, comp_id) ((DMA_SEL_COMP(_DMA_V2_SEL_CONN_GROUP) | DMA_SEL_CG_INFO(info_id) | DMA_SEL_CG_COMP(comp_id)) >> 2) -#define DMA_DEV_INFO_REG_IDX(info_id, dev_id) ((DMA_SEL_COMP(_DMA_V2_SEL_DEV_INTERF) | DMA_SEL_DEV_INFO(info_id) | DMA_SEL_DEV_ID(dev_id)) >> 2) -#define DMA_RST_REG_IDX (DMA_SEL_COMP(_DMA_V2_SEL_RESET) >> 2) - -#define DMA_GET_CONNECTION(val) _hrt_get_bits(val, _DMA_V2_CONNECTION_IDX, _DMA_V2_CONNECTION_BITS) -#define DMA_GET_EXTENSION(val) _hrt_get_bits(val, _DMA_V2_EXTENSION_IDX, _DMA_V2_EXTENSION_BITS) -#define DMA_GET_ELEMENTS(val) _hrt_get_bits(val, _DMA_V2_ELEMENTS_IDX, _DMA_V2_ELEMENTS_BITS) -#define DMA_GET_CROPPING(val) _hrt_get_bits(val, _DMA_V2_LEFT_CROPPING_IDX, _DMA_V2_LEFT_CROPPING_BITS) - -typedef enum { - DMA_CTRL_STATE_IDLE, - DMA_CTRL_STATE_REQ_RCV, - DMA_CTRL_STATE_RCV, - DMA_CTRL_STATE_RCV_REQ, - DMA_CTRL_STATE_INIT, - N_DMA_CTRL_STATES -} dma_ctrl_states_t; - -typedef enum { - DMA_COMMAND_READ, - DMA_COMMAND_WRITE, - DMA_COMMAND_SET_CHANNEL, - DMA_COMMAND_SET_PARAM, - DMA_COMMAND_READ_SPECIFIC, - DMA_COMMAND_WRITE_SPECIFIC, - DMA_COMMAND_INIT, - DMA_COMMAND_INIT_SPECIFIC, - DMA_COMMAND_RST, - N_DMA_COMMANDS -} dma_commands_t; - -typedef enum { - DMA_RW_STATE_IDLE, - DMA_RW_STATE_REQ, - DMA_RW_STATE_NEXT_LINE, - DMA_RW_STATE_UNLOCK_CHANNEL, - N_DMA_RW_STATES -} dma_rw_states_t; - -typedef enum { - DMA_FIFO_STATE_WILL_BE_FULL, - DMA_FIFO_STATE_FULL, - DMA_FIFO_STATE_EMPTY, - N_DMA_FIFO_STATES -} dma_fifo_states_t; - -/* typedef struct dma_state_s dma_state_t; */ -typedef struct dma_channel_state_s dma_channel_state_t; -typedef struct dma_port_state_s dma_port_state_t; - -struct dma_port_state_s { - bool req_cs; - bool req_we_n; - bool req_run; - bool req_ack; - bool send_cs; - bool send_we_n; - bool send_run; - bool send_ack; - dma_fifo_states_t fifo_state; - int fifo_counter; -}; - -struct dma_channel_state_s { - int connection; - bool sign_extend; - int height; - int stride_a; - int elems_a; - int cropping_a; - int width_a; - int stride_b; - int elems_b; - int cropping_b; - int width_b; -}; - -struct dma_state_s { - bool fsm_command_idle; - bool fsm_command_run; - bool fsm_command_stalling; - bool fsm_command_error; - dma_commands_t last_command; - int last_command_channel; - int last_command_param; - dma_commands_t current_command; - int current_addr_a; - int current_addr_b; - bool fsm_ctrl_idle; - bool fsm_ctrl_run; - bool fsm_ctrl_stalling; - bool fsm_ctrl_error; - dma_ctrl_states_t fsm_ctrl_state; - int fsm_ctrl_source_dev; - int fsm_ctrl_source_addr; - int fsm_ctrl_source_stride; - int fsm_ctrl_source_width; - int fsm_ctrl_source_height; - int fsm_ctrl_pack_source_dev; - int fsm_ctrl_pack_dest_dev; - int fsm_ctrl_dest_addr; - int fsm_ctrl_dest_stride; - int fsm_ctrl_pack_source_width; - int fsm_ctrl_pack_dest_height; - int fsm_ctrl_pack_dest_width; - int fsm_ctrl_pack_source_elems; - int fsm_ctrl_pack_dest_elems; - int fsm_ctrl_pack_extension; - int pack_idle; - int pack_run; - int pack_stalling; - int pack_error; - int pack_cnt_height; - int pack_src_cnt_width; - int pack_dest_cnt_width; - dma_rw_states_t read_state; - int read_cnt_height; - int read_cnt_width; - dma_rw_states_t write_state; - int write_height; - int write_width; - dma_port_state_t port_states[HIVE_ISP_NUM_DMA_CONNS]; - dma_channel_state_t channel_states[HIVE_DMA_NUM_CHANNELS]; -}; - -#endif /* __DMA_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h deleted file mode 100644 index ba54b1f..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __DMA_PRIVATE_H_INCLUDED__ -#define __DMA_PRIVATE_H_INCLUDED__ - -#include "dma_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_DMA_C void dma_reg_store(const dma_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ - assert(ID < N_DMA_ID); - assert(DMA_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(DMA_BASE[ID] + reg*sizeof(hrt_data), value); -} - -STORAGE_CLASS_DMA_C hrt_data dma_reg_load(const dma_ID_t ID, - const unsigned int reg) -{ - assert(ID < N_DMA_ID); - assert(DMA_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(DMA_BASE[ID] + reg*sizeof(hrt_data)); -} - -#endif /* __DMA_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c deleted file mode 100644 index 7776709..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "event_fifo.h" - -#ifndef __INLINE_EVENT__ -#include "event_fifo_private.h" -#endif /* __INLINE_EVENT__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h deleted file mode 100644 index c595692..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _EVENT_FIFO_LOCAL_H -#define _EVENT_FIFO_LOCAL_H - -/* - * All events come from connections mapped on the system - * bus but do not use a global IRQ - */ -#include "event_fifo_global.h" - -typedef enum { - SP0_EVENT_ID, - ISP0_EVENT_ID, - STR2MIPI_EVENT_ID, - N_EVENT_ID -} event_ID_t; - -#define EVENT_QUERY_BIT 0 - -/* Events are read from FIFO */ -static const hrt_address event_source_addr[N_EVENT_ID] = { - 0x0000000000380000ULL, - 0x0000000000380004ULL, - 0xffffffffffffffffULL}; - -/* Read from FIFO are blocking, query data availability */ -static const hrt_address event_source_query_addr[N_EVENT_ID] = { - 0x0000000000380010ULL, - 0x0000000000380014ULL, - 0xffffffffffffffffULL}; - -/* Events are written to FIFO */ -static const hrt_address event_sink_addr[N_EVENT_ID] = { - 0x0000000000380008ULL, - 0x000000000038000CULL, - 0x0000000000090104ULL}; - -/* Writes to FIFO are blocking, query data space */ -static const hrt_address event_sink_query_addr[N_EVENT_ID] = { - 0x0000000000380018ULL, - 0x000000000038001CULL, - 0x000000000009010CULL}; - -#endif /* _EVENT_FIFO_LOCAL_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h deleted file mode 100644 index bcfb734..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __EVENT_FIFO_PRIVATE_H -#define __EVENT_FIFO_PRIVATE_H - -#include "event_fifo_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -#include <hrt/bits.h> /* _hrt_get_bits() */ - -STORAGE_CLASS_EVENT_C void event_wait_for(const event_ID_t ID) -{ - assert(ID < N_EVENT_ID); - assert(event_source_addr[ID] != ((hrt_address)-1)); - (void)ia_css_device_load_uint32(event_source_addr[ID]); - return; -} - -STORAGE_CLASS_EVENT_C void cnd_event_wait_for(const event_ID_t ID, - const bool cnd) -{ - if (cnd) { - event_wait_for(ID); - } -} - -STORAGE_CLASS_EVENT_C hrt_data event_receive_token(const event_ID_t ID) -{ - assert(ID < N_EVENT_ID); - assert(event_source_addr[ID] != ((hrt_address)-1)); - return ia_css_device_load_uint32(event_source_addr[ID]); -} - -STORAGE_CLASS_EVENT_C void event_send_token(const event_ID_t ID, - const hrt_data token) -{ - assert(ID < N_EVENT_ID); - assert(event_sink_addr[ID] != ((hrt_address)-1)); - ia_css_device_store_uint32(event_sink_addr[ID], token); -} - -STORAGE_CLASS_EVENT_C bool is_event_pending(const event_ID_t ID) -{ - hrt_data value; - assert(ID < N_EVENT_ID); - assert(event_source_query_addr[ID] != ((hrt_address)-1)); - value = ia_css_device_load_uint32(event_source_query_addr[ID]); - return !_hrt_get_bit(value, EVENT_QUERY_BIT); -} - -STORAGE_CLASS_EVENT_C bool can_event_send_token(const event_ID_t ID) -{ - hrt_data value; - assert(ID < N_EVENT_ID); - assert(event_sink_query_addr[ID] != ((hrt_address)-1)); - value = ia_css_device_load_uint32(event_sink_query_addr[ID]); - return !_hrt_get_bit(value, EVENT_QUERY_BIT); -} - -#endif /* __EVENT_FIFO_PRIVATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c deleted file mode 100644 index 1bf2924..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c +++ /dev/null @@ -1,567 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "fifo_monitor.h" - -#include <type_support.h> -#include "device_access.h" - -#include <hrt/bits.h> - -#include "gp_device.h" - -#include "assert_support.h" - -#ifndef __INLINE_FIFO_MONITOR__ -#define STORAGE_CLASS_FIFO_MONITOR_DATA static const -#else -#define STORAGE_CLASS_FIFO_MONITOR_DATA const -#endif /* __INLINE_FIFO_MONITOR__ */ - -STORAGE_CLASS_FIFO_MONITOR_DATA unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH] = { - _REG_GP_SWITCH_IF_ADDR, - _REG_GP_SWITCH_GDC1_ADDR, - _REG_GP_SWITCH_GDC2_ADDR}; - -#ifndef __INLINE_FIFO_MONITOR__ -#include "fifo_monitor_private.h" -#endif /* __INLINE_FIFO_MONITOR__ */ - -static inline bool fifo_monitor_status_valid ( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id); - -static inline bool fifo_monitor_status_accept( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id); - - -void fifo_channel_get_state( - const fifo_monitor_ID_t ID, - const fifo_channel_t channel_id, - fifo_channel_state_t *state) -{ - assert(channel_id < N_FIFO_CHANNEL); - assert(state != NULL); - - switch (channel_id) { - case FIFO_CHANNEL_ISP0_TO_SP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_SP); /* ISP_STR_MON_PORT_ISP2SP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_SP); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_ISP); /* ISP_STR_MON_PORT_SP2ISP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_ISP); - break; - case FIFO_CHANNEL_SP0_TO_ISP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_ISP); /* ISP_STR_MON_PORT_SP2ISP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_ISP); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_SP); /* ISP_STR_MON_PORT_ISP2SP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_SP); - break; - case FIFO_CHANNEL_ISP0_TO_IF0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_A); /* ISP_STR_MON_PORT_ISP2PIFA */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_A); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); - break; - case FIFO_CHANNEL_IF0_TO_ISP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_A); /* ISP_STR_MON_PORT_PIFA2ISP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_A); - break; - case FIFO_CHANNEL_ISP0_TO_IF1: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_B); /* ISP_STR_MON_PORT_ISP2PIFA */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_B); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); - break; - case FIFO_CHANNEL_IF1_TO_ISP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); /* ISP_STR_MON_PORT_PIFB2ISP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); - break; - case FIFO_CHANNEL_ISP0_TO_DMA0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_DMA); /* ISP_STR_MON_PORT_ISP2DMA */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_DMA); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_ISP); /* MOD_STR_MON_PORT_ISP2DMA */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_ISP); - break; - case FIFO_CHANNEL_DMA0_TO_ISP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2ISP); /* MOD_STR_MON_PORT_DMA2ISP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2ISP); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_DMA); /* ISP_STR_MON_PORT_DMA2ISP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_DMA); - break; - case FIFO_CHANNEL_ISP0_TO_GDC0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GDC); /* ISP_STR_MON_PORT_ISP2GDC1 */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GDC); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_GDC); /* MOD_STR_MON_PORT_CELLS2GDC1 */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_GDC); - break; - case FIFO_CHANNEL_GDC0_TO_ISP0: - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_GDC); /* MOD_STR_MON_PORT_GDC12CELLS */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_GDC); - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GDC); /* ISP_STR_MON_PORT_GDC12ISP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GDC); - break; - case FIFO_CHANNEL_ISP0_TO_GDC1: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_ISP2GDC2); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_ISP2GDC2); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); - break; - case FIFO_CHANNEL_GDC1_TO_ISP0: - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_GDC22ISP); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_GDC22ISP); - break; - case FIFO_CHANNEL_ISP0_TO_HOST0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GPD); /* ISP_STR_MON_PORT_ISP2GPD */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GPD); - { - hrt_data value = ia_css_device_load_uint32(0x0000000000380014ULL); - state->fifo_valid = !_hrt_get_bit(value, 0); - state->sink_accept = false; /* no monitor connected */ - } - break; - case FIFO_CHANNEL_HOST0_TO_ISP0: - { - hrt_data value = ia_css_device_load_uint32(0x000000000038001CULL); - state->fifo_valid = false; /* no monitor connected */ - state->sink_accept = !_hrt_get_bit(value, 0); - } - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GPD); /* ISP_STR_MON_PORT_FA2ISP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GPD); - break; - case FIFO_CHANNEL_SP0_TO_IF0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_A); /* SP_STR_MON_PORT_SP2PIFA */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_A); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); - break; - case FIFO_CHANNEL_IF0_TO_SP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_PIF_A); /* SP_STR_MON_PORT_PIFA2SP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_PIF_A); - break; - case FIFO_CHANNEL_SP0_TO_IF1: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_B); /* SP_STR_MON_PORT_SP2PIFB */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_B); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); - break; - case FIFO_CHANNEL_IF1_TO_SP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); /* SP_STR_MON_PORT_PIFB2SP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); - break; - case FIFO_CHANNEL_SP0_TO_IF2: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_SIF); /* SP_STR_MON_PORT_SP2SIF */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_SIF); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_SIF); /* MOD_STR_MON_PORT_SP2SIF */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_SIF); - break; - case FIFO_CHANNEL_IF2_TO_SP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_SIF); /* MOD_STR_MON_PORT_SIF2SP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_SIF); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_SIF); /* SP_STR_MON_PORT_SIF2SP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_SIF); - break; - case FIFO_CHANNEL_SP0_TO_DMA0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_DMA); /* SP_STR_MON_PORT_SP2DMA */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_DMA); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_SP); /* MOD_STR_MON_PORT_SP2DMA */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_SP); - break; - case FIFO_CHANNEL_DMA0_TO_SP0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2SP); /* MOD_STR_MON_PORT_DMA2SP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2SP); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_DMA); /* SP_STR_MON_PORT_DMA2SP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_DMA); - break; - case FIFO_CHANNEL_SP0_TO_GDC0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC1); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC1); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC1); - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC1); - break; - case FIFO_CHANNEL_GDC0_TO_SP0: - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC12CELLS); - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC12CELLS); - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC12SP); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC12SP); - break; - case FIFO_CHANNEL_SP0_TO_GDC1: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC2); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC2); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); - break; - case FIFO_CHANNEL_GDC1_TO_SP0: - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC22SP); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC22SP); - break; - case FIFO_CHANNEL_SP0_TO_HOST0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_GPD); /* SP_STR_MON_PORT_SP2GPD */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_GPD); - { - hrt_data value = ia_css_device_load_uint32(0x0000000000380010ULL); - state->fifo_valid = !_hrt_get_bit(value, 0); - state->sink_accept = false; /* no monitor connected */ - } - break; - case FIFO_CHANNEL_HOST0_TO_SP0: - { - hrt_data value = ia_css_device_load_uint32(0x0000000000380018ULL); - state->fifo_valid = false; /* no monitor connected */ - state->sink_accept = !_hrt_get_bit(value, 0); - } - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_GPD); /* SP_STR_MON_PORT_FA2SP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_GPD); - break; - case FIFO_CHANNEL_SP0_TO_STREAM2MEM0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_SP2MC */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_MC); - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_SP2MC */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_MC); - break; - case FIFO_CHANNEL_STREAM2MEM0_TO_SP0: - state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_MC2SP */ - state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_MC); - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_MC2SP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_MC); - break; - case FIFO_CHANNEL_SP0_TO_INPUT_SYSTEM0: - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SP2ISYS); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SP2ISYS); - state->fifo_valid = false; - state->sink_accept = false; - break; - case FIFO_CHANNEL_INPUT_SYSTEM0_TO_SP0: - state->fifo_valid = false; - state->sink_accept = false; - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_ISYS2SP); - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_ISYS2SP); - break; - default: - assert(0); - break; - } - - return; -} - -void fifo_switch_get_state( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id, - fifo_switch_state_t *state) -{ - hrt_data data = (hrt_data)-1; - - assert(ID == FIFO_MONITOR0_ID); - assert(switch_id < N_FIFO_SWITCH); - assert(state != NULL); - - (void)ID; - - data = gp_device_reg_load(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id]); - - state->is_none = (data == HIVE_ISP_CSS_STREAM_SWITCH_NONE); - state->is_sp = (data == HIVE_ISP_CSS_STREAM_SWITCH_SP); - state->is_isp = (data == HIVE_ISP_CSS_STREAM_SWITCH_ISP); - - return; -} - -void fifo_monitor_get_state( - const fifo_monitor_ID_t ID, - fifo_monitor_state_t *state) -{ - fifo_channel_t ch_id; - fifo_switch_t sw_id; - - assert(ID < N_FIFO_MONITOR_ID); - assert(state != NULL); - - for (ch_id = 0; ch_id < N_FIFO_CHANNEL; ch_id++) { - fifo_channel_get_state(ID, ch_id, - &(state->fifo_channels[ch_id])); - } - - for (sw_id = 0; sw_id < N_FIFO_SWITCH; sw_id++) { - fifo_switch_get_state(ID, sw_id, - &(state->fifo_switches[sw_id])); - } - return; -} - -static inline bool fifo_monitor_status_valid ( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id) -{ - hrt_data data = fifo_monitor_reg_load(ID, reg); - - return (data >> (((port_id * 2) + _hive_str_mon_valid_offset))) & 0x1; -} - -static inline bool fifo_monitor_status_accept( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id) -{ - hrt_data data = fifo_monitor_reg_load(ID, reg); - - return (data >> (((port_id * 2) + _hive_str_mon_accept_offset))) & 0x1; -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h deleted file mode 100644 index ed2f861..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __FIFO_MONITOR_LOCAL_H_INCLUDED__ -#define __FIFO_MONITOR_LOCAL_H_INCLUDED__ - -#include <type_support.h> -#include "fifo_monitor_global.h" - -#include "hive_isp_css_defs.h" /* ISP_STR_MON_PORT_SND_SP, ... */ - -#define _hive_str_mon_valid_offset 0 -#define _hive_str_mon_accept_offset 1 - -#define FIFO_CHANNEL_SP_VALID_MASK 0x55555555 -#define FIFO_CHANNEL_SP_VALID_B_MASK 0x00000055 -#define FIFO_CHANNEL_ISP_VALID_MASK 0x15555555 -#define FIFO_CHANNEL_MOD_VALID_MASK 0x55555555 - -typedef enum fifo_switch { - FIFO_SWITCH_IF, - FIFO_SWITCH_GDC0, - FIFO_SWITCH_GDC1, - N_FIFO_SWITCH -} fifo_switch_t; - -typedef enum fifo_channel { - FIFO_CHANNEL_ISP0_TO_SP0, - FIFO_CHANNEL_SP0_TO_ISP0, - FIFO_CHANNEL_ISP0_TO_IF0, - FIFO_CHANNEL_IF0_TO_ISP0, - FIFO_CHANNEL_ISP0_TO_IF1, - FIFO_CHANNEL_IF1_TO_ISP0, - FIFO_CHANNEL_ISP0_TO_DMA0, - FIFO_CHANNEL_DMA0_TO_ISP0, - FIFO_CHANNEL_ISP0_TO_GDC0, - FIFO_CHANNEL_GDC0_TO_ISP0, - FIFO_CHANNEL_ISP0_TO_GDC1, - FIFO_CHANNEL_GDC1_TO_ISP0, - FIFO_CHANNEL_ISP0_TO_HOST0, - FIFO_CHANNEL_HOST0_TO_ISP0, - FIFO_CHANNEL_SP0_TO_IF0, - FIFO_CHANNEL_IF0_TO_SP0, - FIFO_CHANNEL_SP0_TO_IF1, - FIFO_CHANNEL_IF1_TO_SP0, - FIFO_CHANNEL_SP0_TO_IF2, - FIFO_CHANNEL_IF2_TO_SP0, - FIFO_CHANNEL_SP0_TO_DMA0, - FIFO_CHANNEL_DMA0_TO_SP0, - FIFO_CHANNEL_SP0_TO_GDC0, - FIFO_CHANNEL_GDC0_TO_SP0, - FIFO_CHANNEL_SP0_TO_GDC1, - FIFO_CHANNEL_GDC1_TO_SP0, - FIFO_CHANNEL_SP0_TO_HOST0, - FIFO_CHANNEL_HOST0_TO_SP0, - FIFO_CHANNEL_SP0_TO_STREAM2MEM0, - FIFO_CHANNEL_STREAM2MEM0_TO_SP0, - FIFO_CHANNEL_SP0_TO_INPUT_SYSTEM0, - FIFO_CHANNEL_INPUT_SYSTEM0_TO_SP0, -/* - * No clue what this is - * - FIFO_CHANNEL_SP0_TO_IRQ0, - FIFO_CHANNEL_IRQ0_TO_SP0, - */ - N_FIFO_CHANNEL -} fifo_channel_t; - -struct fifo_channel_state_s { - bool src_valid; - bool fifo_accept; - bool fifo_valid; - bool sink_accept; -}; - -/* The switch is tri-state */ -struct fifo_switch_state_s { - bool is_none; - bool is_isp; - bool is_sp; -}; - -struct fifo_monitor_state_s { - struct fifo_channel_state_s fifo_channels[N_FIFO_CHANNEL]; - struct fifo_switch_state_s fifo_switches[N_FIFO_SWITCH]; -}; - -#endif /* __FIFO_MONITOR_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h deleted file mode 100644 index d58cd7d..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __FIFO_MONITOR_PRIVATE_H_INCLUDED__ -#define __FIFO_MONITOR_PRIVATE_H_INCLUDED__ - -#include "fifo_monitor_public.h" - -#define __INLINE_GP_DEVICE__ -#include "gp_device.h" - -#include "device_access.h" - -#include "assert_support.h" - -#ifdef __INLINE_FIFO_MONITOR__ -extern const unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH]; -#endif - -STORAGE_CLASS_FIFO_MONITOR_C void fifo_switch_set( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id, - const hrt_data sel) -{ - assert(ID == FIFO_MONITOR0_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); - assert(switch_id < N_FIFO_SWITCH); - (void)ID; - - gp_device_reg_store(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id], sel); - - return; -} - -STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_switch_get( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id) -{ - assert(ID == FIFO_MONITOR0_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); - assert(switch_id < N_FIFO_SWITCH); - (void)ID; - - return gp_device_reg_load(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id]); -} - - -STORAGE_CLASS_FIFO_MONITOR_C void fifo_monitor_reg_store( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ - assert(ID < N_FIFO_MONITOR_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(FIFO_MONITOR_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_monitor_reg_load( - const fifo_monitor_ID_t ID, - const unsigned int reg) -{ - assert(ID < N_FIFO_MONITOR_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(FIFO_MONITOR_BASE[ID] + reg*sizeof(hrt_data)); -} - -#endif /* __FIFO_MONITOR_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c deleted file mode 100644 index 1966b14..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* The name "gdc.h is already taken" */ -#include "gdc_device.h" - -#include "device_access.h" - -#include "assert_support.h" - -/* - * Local function declarations - */ -static inline void gdc_reg_store( - const gdc_ID_t ID, - const unsigned int reg, - const hrt_data value); - -static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg); - - -#ifndef __INLINE_GDC__ -#include "gdc_private.h" -#endif /* __INLINE_GDC__ */ - -/* - * Exported function implementations - */ -void gdc_lut_store( - const gdc_ID_t ID, - const int data[4][HRT_GDC_N]) -{ - unsigned int i, lut_offset = HRT_GDC_LUT_IDX; - - assert(ID < N_GDC_ID); - assert(HRT_GDC_LUT_COEFF_OFFSET <= (4*sizeof(hrt_data))); - - for (i = 0; i < HRT_GDC_N; i++) { - hrt_data entry_0 = data[0][i] & HRT_GDC_BCI_COEF_MASK; - hrt_data entry_1 = data[1][i] & HRT_GDC_BCI_COEF_MASK; - hrt_data entry_2 = data[2][i] & HRT_GDC_BCI_COEF_MASK; - hrt_data entry_3 = data[3][i] & HRT_GDC_BCI_COEF_MASK; - - hrt_data word_0 = entry_0 | - (entry_1 << HRT_GDC_LUT_COEFF_OFFSET); - hrt_data word_1 = entry_2 | - (entry_3 << HRT_GDC_LUT_COEFF_OFFSET); - - gdc_reg_store(ID, lut_offset++, word_0); - gdc_reg_store(ID, lut_offset++, word_1); - } - return; -} - -/* - * Input LUT format: - * c0[0-1023], c1[0-1023], c2[0-1023] c3[0-1023] - * - * Output LUT format (interleaved): - * c0[0], c1[0], c2[0], c3[0], c0[1], c1[1], c2[1], c3[1], .... - * c0[1023], c1[1023], c2[1023], c3[1023] - * - * The first format needs c0[0], c1[0] (which are 1024 words apart) - * to program gdc LUT registers. This makes it difficult to do piecemeal - * reads in SP side gdc_lut_store - * - * Interleaved format allows use of contiguous bytes to store into - * gdc LUT registers. - * - * See gdc_lut_store() definition in host/gdc.c vs sp/gdc_private.h - * - */ -void gdc_lut_convert_to_isp_format(const int in_lut[4][HRT_GDC_N], - int out_lut[4][HRT_GDC_N]) -{ - unsigned int i; - int *out = (int *)out_lut; - - for (i = 0; i < HRT_GDC_N; i++) { - out[0] = in_lut[0][i]; - out[1] = in_lut[1][i]; - out[2] = in_lut[2][i]; - out[3] = in_lut[3][i]; - out += 4; - } -} - -int gdc_get_unity( - const gdc_ID_t ID) -{ - assert(ID < N_GDC_ID); - (void)ID; - return (int)(1UL << HRT_GDC_FRAC_BITS); -} - - -/* - * Local function implementations - */ -static inline void gdc_reg_store( - const gdc_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ - ia_css_device_store_uint32(GDC_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg) -{ - return ia_css_device_load_uint32(GDC_BASE[ID] + reg*sizeof(hrt_data)); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h deleted file mode 100644 index 0c6de86..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GDC_LOCAL_H_INCLUDED__ -#define __GDC_LOCAL_H_INCLUDED__ - -#include "gdc_global.h" - -#endif /* __GDC_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h deleted file mode 100644 index f7dec75..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GDC_PRIVATE_H_INCLUDED__ -#define __GDC_PRIVATE_H_INCLUDED__ - -#include "gdc_public.h" - -#endif /* __GDC_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c deleted file mode 100644 index da88aa3..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "assert_support.h" -#include "gp_device.h" - -#ifndef __INLINE_GP_DEVICE__ -#include "gp_device_private.h" -#endif /* __INLINE_GP_DEVICE__ */ - -void gp_device_get_state( - const gp_device_ID_t ID, - gp_device_state_t *state) -{ - assert(ID < N_GP_DEVICE_ID); - assert(state != NULL); - - state->syncgen_enable = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_ENABLE_ADDR); - state->syncgen_free_running = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_FREE_RUNNING_ADDR); - state->syncgen_pause = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_PAUSE_ADDR); - state->nr_frames = gp_device_reg_load(ID, - _REG_GP_NR_FRAMES_ADDR); - state->syngen_nr_pix = gp_device_reg_load(ID, - _REG_GP_SYNGEN_NR_PIX_ADDR); - state->syngen_nr_pix = gp_device_reg_load(ID, - _REG_GP_SYNGEN_NR_PIX_ADDR); - state->syngen_nr_lines = gp_device_reg_load(ID, - _REG_GP_SYNGEN_NR_LINES_ADDR); - state->syngen_hblank_cycles = gp_device_reg_load(ID, - _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR); - state->syngen_vblank_cycles = gp_device_reg_load(ID, - _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR); - state->isel_sof = gp_device_reg_load(ID, - _REG_GP_ISEL_SOF_ADDR); - state->isel_eof = gp_device_reg_load(ID, - _REG_GP_ISEL_EOF_ADDR); - state->isel_sol = gp_device_reg_load(ID, - _REG_GP_ISEL_SOL_ADDR); - state->isel_eol = gp_device_reg_load(ID, - _REG_GP_ISEL_EOL_ADDR); - state->isel_lfsr_enable = gp_device_reg_load(ID, - _REG_GP_ISEL_LFSR_ENABLE_ADDR); - state->isel_lfsr_enable_b = gp_device_reg_load(ID, - _REG_GP_ISEL_LFSR_ENABLE_B_ADDR); - state->isel_lfsr_reset_value = gp_device_reg_load(ID, - _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR); - state->isel_tpg_enable = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_ENABLE_ADDR); - state->isel_tpg_enable_b = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_ENABLE_B_ADDR); - state->isel_hor_cnt_mask = gp_device_reg_load(ID, - _REG_GP_ISEL_HOR_CNT_MASK_ADDR); - state->isel_ver_cnt_mask = gp_device_reg_load(ID, - _REG_GP_ISEL_VER_CNT_MASK_ADDR); - state->isel_xy_cnt_mask = gp_device_reg_load(ID, - _REG_GP_ISEL_XY_CNT_MASK_ADDR); - state->isel_hor_cnt_delta = gp_device_reg_load(ID, - _REG_GP_ISEL_HOR_CNT_DELTA_ADDR); - state->isel_ver_cnt_delta = gp_device_reg_load(ID, - _REG_GP_ISEL_VER_CNT_DELTA_ADDR); - state->isel_tpg_mode = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_MODE_ADDR); - state->isel_tpg_red1 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_RED1_ADDR); - state->isel_tpg_green1 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_GREEN1_ADDR); - state->isel_tpg_blue1 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_BLUE1_ADDR); - state->isel_tpg_red2 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_RED2_ADDR); - state->isel_tpg_green2 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_GREEN2_ADDR); - state->isel_tpg_blue2 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_BLUE2_ADDR); - state->isel_ch_id = gp_device_reg_load(ID, - _REG_GP_ISEL_CH_ID_ADDR); - state->isel_fmt_type = gp_device_reg_load(ID, - _REG_GP_ISEL_FMT_TYPE_ADDR); - state->isel_data_sel = gp_device_reg_load(ID, - _REG_GP_ISEL_DATA_SEL_ADDR); - state->isel_sband_sel = gp_device_reg_load(ID, - _REG_GP_ISEL_SBAND_SEL_ADDR); - state->isel_sync_sel = gp_device_reg_load(ID, - _REG_GP_ISEL_SYNC_SEL_ADDR); - state->syncgen_hor_cnt = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_HOR_CNT_ADDR); - state->syncgen_ver_cnt = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_VER_CNT_ADDR); - state->syncgen_frame_cnt = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_FRAME_CNT_ADDR); - state->soft_reset = gp_device_reg_load(ID, - _REG_GP_SOFT_RESET_ADDR); - return; -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h deleted file mode 100644 index 113d5ed..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GP_DEVICE_LOCAL_H_INCLUDED__ -#define __GP_DEVICE_LOCAL_H_INCLUDED__ - -#include "gp_device_global.h" - -/* @ GP_REGS_BASE -> GP_DEVICE_BASE */ -#define _REG_GP_SDRAM_WAKEUP_ADDR 0x00 -#define _REG_GP_IDLE_ADDR 0x04 -/* #define _REG_GP_IRQ_REQ0_ADDR 0x08 */ -/* #define _REG_GP_IRQ_REQ1_ADDR 0x0C */ -#define _REG_GP_SP_STREAM_STAT_ADDR 0x10 -#define _REG_GP_SP_STREAM_STAT_B_ADDR 0x14 -#define _REG_GP_ISP_STREAM_STAT_ADDR 0x18 -#define _REG_GP_MOD_STREAM_STAT_ADDR 0x1C -#define _REG_GP_SP_STREAM_STAT_IRQ_COND_ADDR 0x20 -#define _REG_GP_SP_STREAM_STAT_B_IRQ_COND_ADDR 0x24 -#define _REG_GP_ISP_STREAM_STAT_IRQ_COND_ADDR 0x28 -#define _REG_GP_MOD_STREAM_STAT_IRQ_COND_ADDR 0x2C -#define _REG_GP_SP_STREAM_STAT_IRQ_ENABLE_ADDR 0x30 -#define _REG_GP_SP_STREAM_STAT_B_IRQ_ENABLE_ADDR 0x34 -#define _REG_GP_ISP_STREAM_STAT_IRQ_ENABLE_ADDR 0x38 -#define _REG_GP_MOD_STREAM_STAT_IRQ_ENABLE_ADDR 0x3C -/* -#define _REG_GP_SWITCH_IF_ADDR 0x40 -#define _REG_GP_SWITCH_GDC1_ADDR 0x44 -#define _REG_GP_SWITCH_GDC2_ADDR 0x48 -*/ -#define _REG_GP_SLV_REG_RST_ADDR 0x50 -#define _REG_GP_SWITCH_ISYS2401_ADDR 0x54 - -/* @ INPUT_FORMATTER_BASE -> GP_DEVICE_BASE */ -/* -#define _REG_GP_IFMT_input_switch_lut_reg0 0x00030800 -#define _REG_GP_IFMT_input_switch_lut_reg1 0x00030804 -#define _REG_GP_IFMT_input_switch_lut_reg2 0x00030808 -#define _REG_GP_IFMT_input_switch_lut_reg3 0x0003080C -#define _REG_GP_IFMT_input_switch_lut_reg4 0x00030810 -#define _REG_GP_IFMT_input_switch_lut_reg5 0x00030814 -#define _REG_GP_IFMT_input_switch_lut_reg6 0x00030818 -#define _REG_GP_IFMT_input_switch_lut_reg7 0x0003081C -#define _REG_GP_IFMT_input_switch_fsync_lut 0x00030820 -#define _REG_GP_IFMT_srst 0x00030824 -#define _REG_GP_IFMT_slv_reg_srst 0x00030828 -#define _REG_GP_IFMT_input_switch_ch_id_fmt_type 0x0003082C -*/ -/* @ GP_DEVICE_BASE */ -/* -#define _REG_GP_SYNCGEN_ENABLE_ADDR 0x00090000 -#define _REG_GP_SYNCGEN_FREE_RUNNING_ADDR 0x00090004 -#define _REG_GP_SYNCGEN_PAUSE_ADDR 0x00090008 -#define _REG_GP_NR_FRAMES_ADDR 0x0009000C -#define _REG_GP_SYNGEN_NR_PIX_ADDR 0x00090010 -#define _REG_GP_SYNGEN_NR_LINES_ADDR 0x00090014 -#define _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR 0x00090018 -#define _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR 0x0009001C -#define _REG_GP_ISEL_SOF_ADDR 0x00090020 -#define _REG_GP_ISEL_EOF_ADDR 0x00090024 -#define _REG_GP_ISEL_SOL_ADDR 0x00090028 -#define _REG_GP_ISEL_EOL_ADDR 0x0009002C -#define _REG_GP_ISEL_LFSR_ENABLE_ADDR 0x00090030 -#define _REG_GP_ISEL_LFSR_ENABLE_B_ADDR 0x00090034 -#define _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR 0x00090038 -#define _REG_GP_ISEL_TPG_ENABLE_ADDR 0x0009003C -#define _REG_GP_ISEL_TPG_ENABLE_B_ADDR 0x00090040 -#define _REG_GP_ISEL_HOR_CNT_MASK_ADDR 0x00090044 -#define _REG_GP_ISEL_VER_CNT_MASK_ADDR 0x00090048 -#define _REG_GP_ISEL_XY_CNT_MASK_ADDR 0x0009004C -#define _REG_GP_ISEL_HOR_CNT_DELTA_ADDR 0x00090050 -#define _REG_GP_ISEL_VER_CNT_DELTA_ADDR 0x00090054 -#define _REG_GP_ISEL_TPG_MODE_ADDR 0x00090058 -#define _REG_GP_ISEL_TPG_RED1_ADDR 0x0009005C -#define _REG_GP_ISEL_TPG_GREEN1_ADDR 0x00090060 -#define _REG_GP_ISEL_TPG_BLUE1_ADDR 0x00090064 -#define _REG_GP_ISEL_TPG_RED2_ADDR 0x00090068 -#define _REG_GP_ISEL_TPG_GREEN2_ADDR 0x0009006C -#define _REG_GP_ISEL_TPG_BLUE2_ADDR 0x00090070 -#define _REG_GP_ISEL_CH_ID_ADDR 0x00090074 -#define _REG_GP_ISEL_FMT_TYPE_ADDR 0x00090078 -#define _REG_GP_ISEL_DATA_SEL_ADDR 0x0009007C -#define _REG_GP_ISEL_SBAND_SEL_ADDR 0x00090080 -#define _REG_GP_ISEL_SYNC_SEL_ADDR 0x00090084 -#define _REG_GP_SYNCGEN_HOR_CNT_ADDR 0x00090088 -#define _REG_GP_SYNCGEN_VER_CNT_ADDR 0x0009008C -#define _REG_GP_SYNCGEN_FRAME_CNT_ADDR 0x00090090 -#define _REG_GP_SOFT_RESET_ADDR 0x00090094 -*/ - -struct gp_device_state_s { - int syncgen_enable; - int syncgen_free_running; - int syncgen_pause; - int nr_frames; - int syngen_nr_pix; - int syngen_nr_lines; - int syngen_hblank_cycles; - int syngen_vblank_cycles; - int isel_sof; - int isel_eof; - int isel_sol; - int isel_eol; - int isel_lfsr_enable; - int isel_lfsr_enable_b; - int isel_lfsr_reset_value; - int isel_tpg_enable; - int isel_tpg_enable_b; - int isel_hor_cnt_mask; - int isel_ver_cnt_mask; - int isel_xy_cnt_mask; - int isel_hor_cnt_delta; - int isel_ver_cnt_delta; - int isel_tpg_mode; - int isel_tpg_red1; - int isel_tpg_green1; - int isel_tpg_blue1; - int isel_tpg_red2; - int isel_tpg_green2; - int isel_tpg_blue2; - int isel_ch_id; - int isel_fmt_type; - int isel_data_sel; - int isel_sband_sel; - int isel_sync_sel; - int syncgen_hor_cnt; - int syncgen_ver_cnt; - int syncgen_frame_cnt; - int soft_reset; -}; - -#endif /* __GP_DEVICE_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h deleted file mode 100644 index 7c0362c..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GP_DEVICE_PRIVATE_H_INCLUDED__ -#define __GP_DEVICE_PRIVATE_H_INCLUDED__ - -#include "gp_device_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_GP_DEVICE_C void gp_device_reg_store( - const gp_device_ID_t ID, - const unsigned int reg_addr, - const hrt_data value) -{ - assert(ID < N_GP_DEVICE_ID); - assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); - assert((reg_addr % sizeof(hrt_data)) == 0); - ia_css_device_store_uint32(GP_DEVICE_BASE[ID] + reg_addr, value); - return; -} - -STORAGE_CLASS_GP_DEVICE_C hrt_data gp_device_reg_load( - const gp_device_ID_t ID, - const hrt_address reg_addr) -{ - assert(ID < N_GP_DEVICE_ID); - assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); - assert((reg_addr % sizeof(hrt_data)) == 0); - return ia_css_device_load_uint32(GP_DEVICE_BASE[ID] + reg_addr); -} - -#endif /* __GP_DEVICE_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c deleted file mode 100644 index b6b1344..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include <type_support.h> /*uint32_t */ -#include "gp_timer.h" /*system_local.h, - gp_timer_public.h*/ - -#ifndef __INLINE_GP_TIMER__ -#include "gp_timer_private.h" /*device_access.h*/ -#endif /* __INLINE_GP_TIMER__ */ -#include "system_local.h" - -/* FIXME: not sure if reg_load(), reg_store() should be API. - */ -static uint32_t -gp_timer_reg_load(uint32_t reg); - -static void -gp_timer_reg_store(uint32_t reg, uint32_t value); - -static uint32_t -gp_timer_reg_load(uint32_t reg) -{ - return ia_css_device_load_uint32( - GP_TIMER_BASE + - (reg * sizeof(uint32_t))); -} - -static void -gp_timer_reg_store(uint32_t reg, uint32_t value) -{ - ia_css_device_store_uint32((GP_TIMER_BASE + - (reg * sizeof(uint32_t))), - value); -} - -void gp_timer_init(gp_timer_ID_t ID) -{ - /* set_overall_enable*/ - gp_timer_reg_store(_REG_GP_TIMER_OVERALL_ENABLE, 1); - - /*set enable*/ - gp_timer_reg_store(_REG_GP_TIMER_ENABLE_ID(ID), 1); - - /* set signal select */ - gp_timer_reg_store(_REG_GP_TIMER_SIGNAL_SELECT_ID(ID), GP_TIMER_SIGNAL_SELECT); - - /*set count type */ - gp_timer_reg_store(_REG_GP_TIMER_COUNT_TYPE_ID(ID), GP_TIMER_COUNT_TYPE_LOW); - - /*reset gp timer */ - gp_timer_reg_store(_REG_GP_TIMER_RESET_REG, 0xFF); -} - -uint32_t -gp_timer_read(gp_timer_ID_t ID) -{ - return gp_timer_reg_load(_REG_GP_TIMER_VALUE_ID(ID)); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h deleted file mode 100644 index 19ce35d8..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GP_TIMER_LOCAL_H_INCLUDED__ -#define __GP_TIMER_LOCAL_H_INCLUDED__ - -#include "gp_timer_global.h" /*GP_TIMER_SEL - GP_TIMER_SIGNAL_SELECT*/ - -#include "gp_timer_defs.h" /*HIVE_GP_TIMER_xxx registers*/ -#include "hive_isp_css_defs.h" /*HIVE_GP_TIMER_NUM_COUNTERS - HIVE_GP_TIMER_NUM_IRQS*/ - -#define _REG_GP_TIMER_RESET_REG HIVE_GP_TIMER_RESET_REG_IDX -#define _REG_GP_TIMER_OVERALL_ENABLE HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX - -/*Register offsets for timers [1,7] can be obtained - * by adding (GP_TIMERx_ID * sizeof(uint32_t))*/ -#define _REG_GP_TIMER_ENABLE_ID(timer_id) HIVE_GP_TIMER_ENABLE_REG_IDX(timer_id) -#define _REG_GP_TIMER_VALUE_ID(timer_id) HIVE_GP_TIMER_VALUE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) -#define _REG_GP_TIMER_COUNT_TYPE_ID(timer_id) HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) -#define _REG_GP_TIMER_SIGNAL_SELECT_ID(timer_id) HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) - - -#define _REG_GP_TIMER_IRQ_TRIGGER_VALUE_ID(irq_id) HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS) - -#define _REG_GP_TIMER_IRQ_TIMER_SELECT_ID(irq_id) \ - HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS, HIVE_GP_TIMER_NUM_IRQS) - -#define _REG_GP_TIMER_IRQ_ENABLE_ID(irq_id) \ - HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS, HIVE_GP_TIMER_NUM_IRQS) - - -#endif /*__GP_TIMER_LOCAL_H_INCLUDED__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h deleted file mode 100644 index 705be5e..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GP_TIMER_PRIVATE_H_INCLUDED__ -#define __GP_TIMER_PRIVATE_H_INCLUDED__ - -#include "gp_timer_public.h" -#include "device_access.h" -#include "assert_support.h" - -#endif /* __GP_TIMER_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h deleted file mode 100644 index f4652b7..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GPIO_LOCAL_H_INCLUDED__ -#define __GPIO_LOCAL_H_INCLUDED__ - -#include "gpio_global.h" - -#endif /* __GPIO_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h deleted file mode 100644 index b6ebf34..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __GPIO_PRIVATE_H_INCLUDED__ -#define __GPIO_PRIVATE_H_INCLUDED__ - -#include "gpio_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_GPIO_C void gpio_reg_store( - const gpio_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ -OP___assert(ID < N_GPIO_ID); -OP___assert(GPIO_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(GPIO_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_GPIO_C hrt_data gpio_reg_load( - const gpio_ID_t ID, - const unsigned int reg) -{ -OP___assert(ID < N_GPIO_ID); -OP___assert(GPIO_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(GPIO_BASE[ID] + reg*sizeof(hrt_data)); -} - -#endif /* __GPIO_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c deleted file mode 100644 index e48f180..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "hmem.h" - -#ifndef __INLINE_HMEM__ -#include "hmem_private.h" -#endif /* __INLINE_HMEM__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h deleted file mode 100644 index 499f55f..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __HMEM_LOCAL_H_INCLUDED__ -#define __HMEM_LOCAL_H_INCLUDED__ - -#include "hmem_global.h" - -#endif /* __HMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h deleted file mode 100644 index 32a7803..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __HMEM_PRIVATE_H_INCLUDED__ -#define __HMEM_PRIVATE_H_INCLUDED__ - -#include "hmem_public.h" - -#include "assert_support.h" - -STORAGE_CLASS_HMEM_C size_t sizeof_hmem( - const hmem_ID_t ID) -{ - assert(ID < N_HMEM_ID); - (void)ID; - return HMEM_SIZE*sizeof(hmem_data_t); -} - -#endif /* __HMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c deleted file mode 100644 index 0e1ca99..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "system_global.h" - -#ifdef USE_INPUT_SYSTEM_VERSION_2 - -#include "input_formatter.h" -#include <type_support.h> -#include "gp_device.h" - -#include "assert_support.h" - -#ifndef __INLINE_INPUT_FORMATTER__ -#include "input_formatter_private.h" -#endif /* __INLINE_INPUT_FORMATTER__ */ - -const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID] = { - INPUT_FORMATTER0_SRST_OFFSET, - INPUT_FORMATTER1_SRST_OFFSET, - INPUT_FORMATTER2_SRST_OFFSET, - INPUT_FORMATTER3_SRST_OFFSET}; - -const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID] = { - INPUT_FORMATTER0_SRST_MASK, - INPUT_FORMATTER1_SRST_MASK, - INPUT_FORMATTER2_SRST_MASK, - INPUT_FORMATTER3_SRST_MASK}; - -const uint8_t HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID] = { - HIVE_INPUT_SWITCH_SELECT_IF_PRIM, - HIVE_INPUT_SWITCH_SELECT_IF_PRIM, - HIVE_INPUT_SWITCH_SELECT_IF_SEC, - HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM}; - -/* MW Should be part of system_global.h, where we have the main enumeration */ -static const bool HIVE_IF_BIN_COPY[N_INPUT_FORMATTER_ID] = { - false, false, false, true -}; - -void input_formatter_rst( - const input_formatter_ID_t ID) -{ - hrt_address addr; - hrt_data rst; - - assert(ID < N_INPUT_FORMATTER_ID); - - addr = HIVE_IF_SRST_ADDRESS[ID]; - rst = HIVE_IF_SRST_MASK[ID]; - - /* TEMPORARY HACK: THIS RESET BREAKS THE METADATA FEATURE - * WICH USES THE STREAM2MEMRY BLOCK. - * MUST BE FIXED PROPERLY - */ - if (!HIVE_IF_BIN_COPY[ID]) { - input_formatter_reg_store(ID, addr, rst); - } - - return; -} - -unsigned int input_formatter_get_alignment( - const input_formatter_ID_t ID) -{ - assert(ID < N_INPUT_FORMATTER_ID); - - return input_formatter_alignment[ID]; -} - -void input_formatter_set_fifo_blocking_mode( - const input_formatter_ID_t ID, - const bool enable) -{ - assert(ID < N_INPUT_FORMATTER_ID); - - /* cnd_input_formatter_reg_store() */ - if (!HIVE_IF_BIN_COPY[ID]) { - input_formatter_reg_store(ID, - HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS, enable); - } - return; -} - -void input_formatter_get_switch_state( - const input_formatter_ID_t ID, - input_formatter_switch_state_t *state) -{ - assert(ID < N_INPUT_FORMATTER_ID); - assert(state != NULL); - - /* We'll change this into an intelligent function to get switch info per IF */ - (void)ID; - - state->if_input_switch_lut_reg[0] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg0); - state->if_input_switch_lut_reg[1] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg1); - state->if_input_switch_lut_reg[2] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg2); - state->if_input_switch_lut_reg[3] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg3); - state->if_input_switch_lut_reg[4] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg4); - state->if_input_switch_lut_reg[5] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg5); - state->if_input_switch_lut_reg[6] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg6); - state->if_input_switch_lut_reg[7] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg7); - state->if_input_switch_fsync_lut = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_fsync_lut); - state->if_input_switch_ch_id_fmt_type = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_ch_id_fmt_type); - - return; -} - -void input_formatter_get_state( - const input_formatter_ID_t ID, - input_formatter_state_t *state) -{ - assert(ID < N_INPUT_FORMATTER_ID); - assert(state != NULL); -/* - state->reset = input_formatter_reg_load(ID, - HIVE_IF_RESET_ADDRESS); - */ - state->start_line = input_formatter_reg_load(ID, - HIVE_IF_START_LINE_ADDRESS); - state->start_column = input_formatter_reg_load(ID, - HIVE_IF_START_COLUMN_ADDRESS); - state->cropped_height = input_formatter_reg_load(ID, - HIVE_IF_CROPPED_HEIGHT_ADDRESS); - state->cropped_width = input_formatter_reg_load(ID, - HIVE_IF_CROPPED_WIDTH_ADDRESS); - state->ver_decimation = input_formatter_reg_load(ID, - HIVE_IF_VERTICAL_DECIMATION_ADDRESS); - state->hor_decimation = input_formatter_reg_load(ID, - HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS); - state->hor_deinterleaving = input_formatter_reg_load(ID, - HIVE_IF_H_DEINTERLEAVING_ADDRESS); - state->left_padding = input_formatter_reg_load(ID, - HIVE_IF_LEFTPADDING_WIDTH_ADDRESS); - state->eol_offset = input_formatter_reg_load(ID, - HIVE_IF_END_OF_LINE_OFFSET_ADDRESS); - state->vmem_start_address = input_formatter_reg_load(ID, - HIVE_IF_VMEM_START_ADDRESS_ADDRESS); - state->vmem_end_address = input_formatter_reg_load(ID, - HIVE_IF_VMEM_END_ADDRESS_ADDRESS); - state->vmem_increment = input_formatter_reg_load(ID, - HIVE_IF_VMEM_INCREMENT_ADDRESS); - state->is_yuv420 = input_formatter_reg_load(ID, - HIVE_IF_YUV_420_FORMAT_ADDRESS); - state->vsync_active_low = input_formatter_reg_load(ID, - HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS); - state->hsync_active_low = input_formatter_reg_load(ID, - HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS); - state->allow_fifo_overflow = input_formatter_reg_load(ID, - HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS); - state->block_fifo_when_no_req = input_formatter_reg_load(ID, - HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS); - state->ver_deinterleaving = input_formatter_reg_load(ID, - HIVE_IF_V_DEINTERLEAVING_ADDRESS); -/* FSM */ - state->fsm_sync_status = input_formatter_reg_load(ID, - HIVE_IF_FSM_SYNC_STATUS); - state->fsm_sync_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_SYNC_COUNTER); - state->fsm_crop_status = input_formatter_reg_load(ID, - HIVE_IF_FSM_CROP_STATUS); - state->fsm_crop_line_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_CROP_LINE_COUNTER); - state->fsm_crop_pixel_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_CROP_PIXEL_COUNTER); - state->fsm_deinterleaving_index = input_formatter_reg_load(ID, - HIVE_IF_FSM_DEINTERLEAVING_IDX); - state->fsm_dec_h_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_DECIMATION_H_COUNTER); - state->fsm_dec_v_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_DECIMATION_V_COUNTER); - state->fsm_dec_block_v_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER); - state->fsm_padding_status = input_formatter_reg_load(ID, - HIVE_IF_FSM_PADDING_STATUS); - state->fsm_padding_elem_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_PADDING_ELEMENT_COUNTER); - state->fsm_vector_support_error = input_formatter_reg_load(ID, - HIVE_IF_FSM_VECTOR_SUPPORT_ERROR); - state->fsm_vector_buffer_full = input_formatter_reg_load(ID, - HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL); - state->vector_support = input_formatter_reg_load(ID, - HIVE_IF_FSM_VECTOR_SUPPORT); - state->sensor_data_lost = input_formatter_reg_load(ID, - HIVE_IF_FIFO_SENSOR_STATUS); - - return; -} - -void input_formatter_bin_get_state( - const input_formatter_ID_t ID, - input_formatter_bin_state_t *state) -{ - assert(ID < N_INPUT_FORMATTER_ID); - assert(state != NULL); - - state->reset = input_formatter_reg_load(ID, - HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS); - state->input_endianness = input_formatter_reg_load(ID, - HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS); - state->output_endianness = input_formatter_reg_load(ID, - HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS); - state->bitswap = input_formatter_reg_load(ID, - HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS); - state->block_synch = input_formatter_reg_load(ID, - HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS); - state->packet_synch = input_formatter_reg_load(ID, - HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS); - state->readpostwrite_synch = input_formatter_reg_load(ID, - HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS); - state->is_2ppc = input_formatter_reg_load(ID, - HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS); - state->en_status_update = input_formatter_reg_load(ID, - HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS); - return; -} -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h deleted file mode 100644 index 3e00b5e..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __INPUT_FORMATTER_LOCAL_H_INCLUDED__ -#define __INPUT_FORMATTER_LOCAL_H_INCLUDED__ - -#include "input_formatter_global.h" - -#include "isp.h" /* ISP_VEC_ALIGN */ - -typedef struct input_formatter_switch_state_s input_formatter_switch_state_t; -typedef struct input_formatter_state_s input_formatter_state_t; -typedef struct input_formatter_bin_state_s input_formatter_bin_state_t; - -#define HIVE_IF_FSM_SYNC_STATUS 0x100 -#define HIVE_IF_FSM_SYNC_COUNTER 0x104 -#define HIVE_IF_FSM_DEINTERLEAVING_IDX 0x114 -#define HIVE_IF_FSM_DECIMATION_H_COUNTER 0x118 -#define HIVE_IF_FSM_DECIMATION_V_COUNTER 0x11C -#define HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER 0x120 -#define HIVE_IF_FSM_PADDING_STATUS 0x124 -#define HIVE_IF_FSM_PADDING_ELEMENT_COUNTER 0x128 -#define HIVE_IF_FSM_VECTOR_SUPPORT_ERROR 0x12C -#define HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL 0x130 -#define HIVE_IF_FSM_VECTOR_SUPPORT 0x134 -#define HIVE_IF_FIFO_SENSOR_STATUS 0x138 - -/* - * The switch LUT's coding defines a sink for each - * single channel ID + channel format type. Conversely - * the sink (i.e. an input formatter) can be reached - * from multiple channel & format type combinations - * - * LUT[0,1] channel=0, format type {0,1,...31} - * LUT[2,3] channel=1, format type {0,1,...31} - * LUT[4,5] channel=2, format type {0,1,...31} - * LUT[6,7] channel=3, format type {0,1,...31} - * - * Each register hold 16 2-bit fields encoding the sink - * {0,1,2,3}, "0" means unconnected. - * - * The single FSYNCH register uses four 3-bit fields of 1-hot - * encoded sink information, "0" means unconnected. - * - * The encoding is redundant. The FSYNCH setting will connect - * a channel to a sink. At that point the LUT's belonging to - * that channel can be directed to another sink. Thus the data - * goes to another place than the synch - */ -struct input_formatter_switch_state_s { - int if_input_switch_lut_reg[8]; - int if_input_switch_fsync_lut; - int if_input_switch_ch_id_fmt_type; - bool if_input_switch_map[HIVE_SWITCH_N_CHANNELS][HIVE_SWITCH_N_FORMATTYPES]; -}; - -struct input_formatter_state_s { -/* int reset; */ - int start_line; - int start_column; - int cropped_height; - int cropped_width; - int ver_decimation; - int hor_decimation; - int ver_deinterleaving; - int hor_deinterleaving; - int left_padding; - int eol_offset; - int vmem_start_address; - int vmem_end_address; - int vmem_increment; - int is_yuv420; - int vsync_active_low; - int hsync_active_low; - int allow_fifo_overflow; - int block_fifo_when_no_req; - int fsm_sync_status; - int fsm_sync_counter; - int fsm_crop_status; - int fsm_crop_line_counter; - int fsm_crop_pixel_counter; - int fsm_deinterleaving_index; - int fsm_dec_h_counter; - int fsm_dec_v_counter; - int fsm_dec_block_v_counter; - int fsm_padding_status; - int fsm_padding_elem_counter; - int fsm_vector_support_error; - int fsm_vector_buffer_full; - int vector_support; - int sensor_data_lost; -}; - -struct input_formatter_bin_state_s { - uint32_t reset; - uint32_t input_endianness; - uint32_t output_endianness; - uint32_t bitswap; - uint32_t block_synch; - uint32_t packet_synch; - uint32_t readpostwrite_synch; - uint32_t is_2ppc; - uint32_t en_status_update; -}; - -static const unsigned int input_formatter_alignment[N_INPUT_FORMATTER_ID] = { - ISP_VEC_ALIGN, ISP_VEC_ALIGN, HIVE_ISP_CTRL_DATA_BYTES}; - -#endif /* __INPUT_FORMATTER_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h deleted file mode 100644 index 2f42a9c..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __INPUT_FORMATTER_PRIVATE_H_INCLUDED__ -#define __INPUT_FORMATTER_PRIVATE_H_INCLUDED__ - -#include "input_formatter_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_INPUT_FORMATTER_C void input_formatter_reg_store( - const input_formatter_ID_t ID, - const hrt_address reg_addr, - const hrt_data value) -{ - assert(ID < N_INPUT_FORMATTER_ID); - assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); - assert((reg_addr % sizeof(hrt_data)) == 0); - ia_css_device_store_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr, value); - return; -} - -STORAGE_CLASS_INPUT_FORMATTER_C hrt_data input_formatter_reg_load( - const input_formatter_ID_t ID, - const unsigned int reg_addr) -{ - assert(ID < N_INPUT_FORMATTER_ID); - assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); - assert((reg_addr % sizeof(hrt_data)) == 0); - return ia_css_device_load_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr); -} - -#endif /* __INPUT_FORMATTER_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c deleted file mode 100644 index 2515e16..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c +++ /dev/null @@ -1,1823 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "system_global.h" - -#ifdef USE_INPUT_SYSTEM_VERSION_2 - -#include "input_system.h" -#include <type_support.h> -#include "gp_device.h" - -#include "assert_support.h" - -#ifndef __INLINE_INPUT_SYSTEM__ -#include "input_system_private.h" -#endif /* __INLINE_INPUT_SYSTEM__ */ - -#define ZERO (0x0) -#define ONE (1U) - -static const ib_buffer_t IB_BUFFER_NULL = {0 ,0, 0 }; - -static input_system_error_t input_system_configure_channel( - const channel_cfg_t channel); - -static input_system_error_t input_system_configure_channel_sensor( - const channel_cfg_t channel); - -static input_system_error_t input_buffer_configuration(void); - -static input_system_error_t configuration_to_registers(void); - -static void receiver_rst(const rx_ID_t ID); -static void input_system_network_rst(const input_system_ID_t ID); - -static void capture_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg); - -static void acquisition_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg); - -static void ctrl_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ctrl_unit_cfg_t* const cfg); - -static void input_system_network_configure( - const input_system_ID_t ID, - const input_system_network_cfg_t * const cfg); - -// MW: CSI is previously named as "rx" short for "receiver" -static input_system_error_t set_csi_cfg( - csi_cfg_t* const lhs, - const csi_cfg_t* const rhs, - input_system_config_flags_t* const flags); - -static input_system_error_t set_source_type( - input_system_source_t* const lhs, - const input_system_source_t rhs, - input_system_config_flags_t* const flags); - -static input_system_error_t input_system_multiplexer_cfg( - input_system_multiplex_t* const lhs, - const input_system_multiplex_t rhs, - input_system_config_flags_t* const flags); - - - -static inline void capture_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - capture_unit_state_t *state); - -static inline void acquisition_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - acquisition_unit_state_t *state); - -static inline void ctrl_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - ctrl_unit_state_t *state); - -static inline void mipi_port_get_state( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - mipi_port_state_t *state); - -static inline void rx_channel_get_state( - const rx_ID_t ID, - const unsigned int ch_id, - rx_channel_state_t *state); - -static void gp_device_rst(const gp_device_ID_t ID); - -static void input_selector_cfg_for_sensor(const gp_device_ID_t ID); - -static void input_switch_rst(const gp_device_ID_t ID); - -static void input_switch_cfg( - const gp_device_ID_t ID, - const input_switch_cfg_t * const cfg -); - -void input_system_get_state( - const input_system_ID_t ID, - input_system_state_t *state) -{ - sub_system_ID_t sub_id; - - assert(ID < N_INPUT_SYSTEM_ID); - assert(state != NULL); - - state->str_multicastA_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX); - state->str_multicastB_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_B_IDX); - state->str_multicastC_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_C_IDX); - state->str_mux_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX); - state->str_mon_status = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_STRMON_STAT_IDX); - state->str_mon_irq_cond = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_STRMON_COND_IDX); - state->str_mon_irq_en = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX); - state->isys_srst = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_SRST_IDX); - state->isys_slv_reg_srst = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_SLV_REG_SRST_IDX); - state->str_deint_portA_cnt = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_REG_PORT_A_IDX); - state->str_deint_portB_cnt = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_REG_PORT_B_IDX); - - for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { - capture_unit_get_state(ID, sub_id, - &(state->capture_unit[sub_id - CAPTURE_UNIT0_ID])); - } - for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { - acquisition_unit_get_state(ID, sub_id, - &(state->acquisition_unit[sub_id - ACQUISITION_UNIT0_ID])); - } - for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { - ctrl_unit_get_state(ID, sub_id, - &(state->ctrl_unit_state[sub_id - CTRL_UNIT0_ID])); - } - - return; -} - -void receiver_get_state( - const rx_ID_t ID, - receiver_state_t *state) -{ - enum mipi_port_id port_id; - unsigned int ch_id; - - assert(ID < N_RX_ID); - assert(state != NULL); - - state->fs_to_ls_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX); - state->ls_to_data_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_LS_TO_DATA_DELAY_REG_IDX); - state->data_to_le_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_DATA_TO_LE_DELAY_REG_IDX); - state->le_to_fe_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_LE_TO_FE_DELAY_REG_IDX); - state->fe_to_fs_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_FE_TO_FS_DELAY_REG_IDX); - state->le_to_fs_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_LE_TO_LS_DELAY_REG_IDX); - state->is_two_ppc = (bool)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX); - state->backend_rst = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BACKEND_RST_REG_IDX); - state->raw18 = (uint16_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_RAW18_REG_IDX); - state->force_raw8 = (bool)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_FORCE_RAW8_REG_IDX); - state->raw16 = (uint16_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_RAW16_REG_IDX); - - for (port_id = (enum mipi_port_id)0; port_id < N_MIPI_PORT_ID; port_id++) { - mipi_port_get_state(ID, port_id, - &(state->mipi_port_state[port_id])); - } - for (ch_id = (unsigned int)0; ch_id < N_RX_CHANNEL_ID; ch_id++) { - rx_channel_get_state(ID, ch_id, - &(state->rx_channel_state[ch_id])); - } - - state->be_gsp_acc_ovl = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_GSP_ACC_OVL_REG_IDX); - state->be_srst = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_SRST_REG_IDX); - state->be_is_two_ppc = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX); - state->be_comp_format0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG0_IDX); - state->be_comp_format1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG1_IDX); - state->be_comp_format2 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG2_IDX); - state->be_comp_format3 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG3_IDX); - state->be_sel = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_SEL_REG_IDX); - state->be_raw16_config = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_RAW16_CONFIG_REG_IDX); - state->be_raw18_config = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_RAW18_CONFIG_REG_IDX); - state->be_force_raw8 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_FORCE_RAW8_REG_IDX); - state->be_irq_status = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX); - state->be_irq_clear = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX); - - return; -} - -bool is_mipi_format_yuv420( - const mipi_format_t mipi_format) -{ - bool is_yuv420 = ( - (mipi_format == MIPI_FORMAT_YUV420_8) || - (mipi_format == MIPI_FORMAT_YUV420_10) || - (mipi_format == MIPI_FORMAT_YUV420_8_SHIFT) || - (mipi_format == MIPI_FORMAT_YUV420_10_SHIFT)); -/* MIPI_FORMAT_YUV420_8_LEGACY is not YUV420 */ - - return is_yuv420; -} - -void receiver_set_compression( - const rx_ID_t ID, - const unsigned int cfg_ID, - const mipi_compressor_t comp, - const mipi_predictor_t pred) -{ - const unsigned int field_id = cfg_ID % N_MIPI_FORMAT_CUSTOM; - const unsigned int ch_id = cfg_ID / N_MIPI_FORMAT_CUSTOM; - hrt_data val; - hrt_address addr = 0; - hrt_data reg; - - assert(ID < N_RX_ID); - assert(cfg_ID < N_MIPI_COMPRESSOR_CONTEXT); - assert(field_id < N_MIPI_FORMAT_CUSTOM); - assert(ch_id < N_RX_CHANNEL_ID); - assert(comp < N_MIPI_COMPRESSOR_METHODS); - assert(pred < N_MIPI_PREDICTOR_TYPES); - - val = (((uint8_t)pred) << 3) | comp; - - switch (ch_id) { - case 0: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); - break; - case 1: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); - break; - case 2: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); - break; - case 3: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); - break; - default: - /* should not happen */ - assert(false); - return; - } - - reg = ((field_id < 6)?(val << (field_id * 5)):(val << ((field_id - 6) * 5))); - receiver_reg_store(ID, addr, reg); - - return; -} - -void receiver_port_enable( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const bool cnd) -{ - hrt_data reg = receiver_port_reg_load(ID, port_ID, - _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); - - if (cnd) { - reg |= 0x01; - } else { - reg &= ~0x01; - } - - receiver_port_reg_store(ID, port_ID, - _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, reg); - return; -} - -bool is_receiver_port_enabled( - const rx_ID_t ID, - const enum mipi_port_id port_ID) -{ - hrt_data reg = receiver_port_reg_load(ID, port_ID, - _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); - return ((reg & 0x01) != 0); -} - -void receiver_irq_enable( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const rx_irq_info_t irq_info) -{ - receiver_port_reg_store(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, irq_info); - return; -} - -rx_irq_info_t receiver_get_irq_info( - const rx_ID_t ID, - const enum mipi_port_id port_ID) -{ - return receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); -} - -void receiver_irq_clear( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const rx_irq_info_t irq_info) -{ - receiver_port_reg_store(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX, irq_info); - return; -} - -static inline void capture_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - capture_unit_state_t *state) -{ - assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); - assert(state != NULL); - - state->StartMode = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_START_MODE_REG_ID); - state->Start_Addr = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_START_ADDR_REG_ID); - state->Mem_Region_Size = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_MEM_REGION_SIZE_REG_ID); - state->Num_Mem_Regions = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_NUM_MEM_REGIONS_REG_ID); -// AM: Illegal read from following registers. -/* state->Init = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_INIT_REG_ID); - state->Start = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_START_REG_ID); - state->Stop = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_STOP_REG_ID); -*/ - state->Packet_Length = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_PACKET_LENGTH_REG_ID); - state->Received_Length = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_RECEIVED_LENGTH_REG_ID); - state->Received_Short_Packets = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_RECEIVED_SHORT_PACKETS_REG_ID); - state->Received_Long_Packets = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_RECEIVED_LONG_PACKETS_REG_ID); - state->Last_Command = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_LAST_COMMAND_REG_ID); - state->Next_Command = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_NEXT_COMMAND_REG_ID); - state->Last_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_LAST_ACKNOWLEDGE_REG_ID); - state->Next_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_NEXT_ACKNOWLEDGE_REG_ID); - state->FSM_State_Info = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_FSM_STATE_INFO_REG_ID); - - return; -} - -static inline void acquisition_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - acquisition_unit_state_t *state) -{ - assert(sub_id == ACQUISITION_UNIT0_ID); - assert(state != NULL); - - state->Start_Addr = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_START_ADDR_REG_ID); - state->Mem_Region_Size = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_MEM_REGION_SIZE_REG_ID); - state->Num_Mem_Regions = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_NUM_MEM_REGIONS_REG_ID); -// AM: Illegal read from following registers. -/* state->Init = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_INIT_REG_ID); -*/ - state->Received_Short_Packets = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_RECEIVED_SHORT_PACKETS_REG_ID); - state->Received_Long_Packets = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_RECEIVED_LONG_PACKETS_REG_ID); - state->Last_Command = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_LAST_COMMAND_REG_ID); - state->Next_Command = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_NEXT_COMMAND_REG_ID); - state->Last_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_LAST_ACKNOWLEDGE_REG_ID); - state->Next_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_NEXT_ACKNOWLEDGE_REG_ID); - state->FSM_State_Info = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_FSM_STATE_INFO_REG_ID); - state->Int_Cntr_Info = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_INT_CNTR_INFO_REG_ID); - - return; -} - -static inline void ctrl_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - ctrl_unit_state_t *state) -{ - assert(sub_id == CTRL_UNIT0_ID); - assert(state != NULL); - - state->captA_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_A_REG_ID); - state->captB_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_B_REG_ID); - state->captC_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_C_REG_ID); - state->captA_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID); - state->captB_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID); - state->captC_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID); - state->captA_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID); - state->captB_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID); - state->captC_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID); - state->acq_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_START_ADDR_REG_ID); - state->acq_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID); - state->acq_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID); -// AM: Illegal read from following registers. -/* state->ctrl_init = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_INIT_REG_ID); -*/ - state->last_cmd = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_LAST_COMMAND_REG_ID); - state->next_cmd = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_NEXT_COMMAND_REG_ID); - state->last_ack = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID); - state->next_ack = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID); - state->top_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_FSM_STATE_INFO_REG_ID); - state->captA_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID); - state->captB_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID); - state->captC_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID); - state->acq_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID); - state->capt_reserve_one_mem_region = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID); - - return; -} - -static inline void mipi_port_get_state( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - mipi_port_state_t *state) -{ - int i; - - assert(ID < N_RX_ID); - assert(port_ID < N_MIPI_PORT_ID); - assert(state != NULL); - - state->device_ready = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); - state->irq_status = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); - state->irq_enable = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); - state->timeout_count = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_TIMEOUT_COUNT_REG_IDX); - state->init_count = (uint16_t)receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_INIT_COUNT_REG_IDX); - state->raw16_18 = (uint16_t)receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_RAW16_18_DATAID_REG_IDX); - state->sync_count = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_SYNC_COUNT_REG_IDX); - state->rx_count = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX); - - for (i = 0; i < MIPI_4LANE_CFG ; i++) { - state->lane_sync_count[i] = (uint8_t)((state->sync_count)>>(i*8)); - state->lane_rx_count[i] = (uint8_t)((state->rx_count)>>(i*8)); - } - - return; -} - -static inline void rx_channel_get_state( - const rx_ID_t ID, - const unsigned int ch_id, - rx_channel_state_t *state) -{ - int i; - - assert(ID < N_RX_ID); - assert(ch_id < N_RX_CHANNEL_ID); - assert(state != NULL); - - switch (ch_id) { - case 0: - state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX); - state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); - break; - case 1: - state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX); - state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); - break; - case 2: - state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX); - state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); - break; - case 3: - state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX); - state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); - break; - } - -/* See Table 7.1.17,..., 7.1.24 */ - for (i = 0; i < 6; i++) { - uint8_t val = (uint8_t)((state->comp_scheme0)>>(i*5)) & 0x1f; - state->comp[i] = (mipi_compressor_t)(val & 0x07); - state->pred[i] = (mipi_predictor_t)((val & 0x18) >> 3); - } - for (i = 6; i < N_MIPI_FORMAT_CUSTOM; i++) { - uint8_t val = (uint8_t)((state->comp_scheme0)>>((i-6)*5)) & 0x1f; - state->comp[i] = (mipi_compressor_t)(val & 0x07); - state->pred[i] = (mipi_predictor_t)((val & 0x18) >> 3); - } - - return; -} - -// MW: "2400" in the name is not good, but this is to avoid a naming conflict -static input_system_cfg2400_t config; - -static void receiver_rst( - const rx_ID_t ID) -{ - enum mipi_port_id port_id; - - assert(ID < N_RX_ID); - -// Disable all ports. - for (port_id = MIPI_PORT0_ID; port_id < N_MIPI_PORT_ID; port_id++) { - receiver_port_enable(ID, port_id, false); - } - - // AM: Additional actions for stopping receiver? - - return; -} - -//Single function to reset all the devices mapped via GP_DEVICE. -static void gp_device_rst(const gp_device_ID_t ID) -{ - assert(ID < N_GP_DEVICE_ID); - - gp_device_reg_store(ID, _REG_GP_SYNCGEN_ENABLE_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNCGEN_FREE_RUNNING_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNCGEN_PAUSE_ADDR, ONE); - // gp_device_reg_store(ID, _REG_GP_NR_FRAMES_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNGEN_NR_PIX_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNGEN_NR_PIX_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNGEN_NR_LINES_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR, ZERO); -// AM: Following calls cause strange warnings. Probably they should not be initialized. -// gp_device_reg_store(ID, _REG_GP_ISEL_SOF_ADDR, ZERO); -// gp_device_reg_store(ID, _REG_GP_ISEL_EOF_ADDR, ZERO); -// gp_device_reg_store(ID, _REG_GP_ISEL_SOL_ADDR, ZERO); -// gp_device_reg_store(ID, _REG_GP_ISEL_EOL_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_LFSR_ENABLE_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_LFSR_ENABLE_B_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_ENABLE_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_ENABLE_B_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_HOR_CNT_MASK_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_VER_CNT_MASK_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_XY_CNT_MASK_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_HOR_CNT_DELTA_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_VER_CNT_DELTA_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_MODE_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_RED1_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_GREEN1_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_BLUE1_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_RED2_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_GREEN2_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_TPG_BLUE2_ADDR, ZERO); - //gp_device_reg_store(ID, _REG_GP_ISEL_CH_ID_ADDR, ZERO); - //gp_device_reg_store(ID, _REG_GP_ISEL_FMT_TYPE_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_DATA_SEL_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_SBAND_SEL_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_SYNC_SEL_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNCGEN_HOR_CNT_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNCGEN_VER_CNT_ADDR, ZERO); - // gp_device_reg_store(ID, _REG_GP_SYNCGEN_FRAME_CNT_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_SOFT_RESET_ADDR, ZERO); // AM: Maybe this soft reset is not safe. - - return; -} - -static void input_selector_cfg_for_sensor(const gp_device_ID_t ID) -{ - assert(ID < N_GP_DEVICE_ID); - - gp_device_reg_store(ID, _REG_GP_ISEL_SOF_ADDR, ONE); - gp_device_reg_store(ID, _REG_GP_ISEL_EOF_ADDR, ONE); - gp_device_reg_store(ID, _REG_GP_ISEL_SOL_ADDR, ONE); - gp_device_reg_store(ID, _REG_GP_ISEL_EOL_ADDR, ONE); - gp_device_reg_store(ID, _REG_GP_ISEL_CH_ID_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_FMT_TYPE_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_DATA_SEL_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_SBAND_SEL_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_ISEL_SYNC_SEL_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_SOFT_RESET_ADDR, ZERO); - - return; -} - -static void input_switch_rst(const gp_device_ID_t ID) -{ - int addr; - - assert(ID < N_GP_DEVICE_ID); - - // Initialize the data&hsync LUT. - for (addr = _REG_GP_IFMT_input_switch_lut_reg0; - addr <= _REG_GP_IFMT_input_switch_lut_reg7; addr += SIZEOF_HRT_REG) { - - gp_device_reg_store(ID, addr, ZERO); - } - - // Initialize the vsync LUT. - gp_device_reg_store(ID, - _REG_GP_IFMT_input_switch_fsync_lut, - ZERO); - - return; -} - -static void input_switch_cfg( - const gp_device_ID_t ID, - const input_switch_cfg_t * const cfg) -{ - int addr_offset; - - assert(ID < N_GP_DEVICE_ID); - assert(cfg != NULL); - - // Initialize the data&hsync LUT. - for (addr_offset = 0; addr_offset < N_RX_CHANNEL_ID * 2; addr_offset++) { - assert(addr_offset * SIZEOF_HRT_REG + _REG_GP_IFMT_input_switch_lut_reg0 <= _REG_GP_IFMT_input_switch_lut_reg7); - gp_device_reg_store(ID, - _REG_GP_IFMT_input_switch_lut_reg0 + addr_offset * SIZEOF_HRT_REG, - cfg->hsync_data_reg[addr_offset]); - } - - // Initialize the vsync LUT. - gp_device_reg_store(ID, - _REG_GP_IFMT_input_switch_fsync_lut, - cfg->vsync_data_reg); - - return; -} - - -static void input_system_network_rst(const input_system_ID_t ID) -{ - unsigned int sub_id; - - // Reset all 3 multicasts. - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX, - INPUT_SYSTEM_DISCARD_ALL); - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_B_IDX, - INPUT_SYSTEM_DISCARD_ALL); - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_C_IDX, - INPUT_SYSTEM_DISCARD_ALL); - - // Reset stream mux. - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX, - N_INPUT_SYSTEM_MULTIPLEX); - - // Reset 3 capture units. - for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { - input_system_sub_system_reg_store(ID, - sub_id, - CAPT_INIT_REG_ID, - 1U << CAPT_INIT_RST_REG_BIT); - } - - // Reset acquisition unit. - for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { - input_system_sub_system_reg_store(ID, - sub_id, - ACQ_INIT_REG_ID, - 1U << ACQ_INIT_RST_REG_BIT); - } - - // DMA unit reset is not needed. - - // Reset controller units. - // NB: In future we need to keep part of ctrl_state for split capture and - for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_INIT_REG_ID, - 1U); //AM: Is there any named constant? - } - - return; -} - -// Function that resets current configuration. -input_system_error_t input_system_configuration_reset(void) -{ - unsigned int i; - - receiver_rst(RX0_ID); - - input_system_network_rst(INPUT_SYSTEM0_ID); - - gp_device_rst(INPUT_SYSTEM0_ID); - - input_switch_rst(INPUT_SYSTEM0_ID); - - //target_rst(); - - // Reset IRQ_CTRLs. - - // Reset configuration data structures. - for (i = 0; i < N_CHANNELS; i++ ) { - config.ch_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; - config.target_isp_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; - config.target_sp_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; - config.target_strm2mem_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; - } - - for (i = 0; i < N_CSI_PORTS; i++ ) { - config.csi_buffer_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; - config.multicast[i] = INPUT_SYSTEM_CFG_FLAG_RESET; - } - - config.source_type_flags = INPUT_SYSTEM_CFG_FLAG_RESET; - config.acquisition_buffer_unique_flags = INPUT_SYSTEM_CFG_FLAG_RESET; - config.unallocated_ib_mem_words = IB_CAPACITY_IN_WORDS; - //config.acq_allocated_ib_mem_words = 0; - - // Set the start of the session cofiguration. - config.session_flags = INPUT_SYSTEM_CFG_FLAG_REQUIRED; - - return INPUT_SYSTEM_ERR_NO_ERROR; -} - -// MW: Comments are good, but doxygen is required, place it at the declaration -// Function that appends the channel to current configuration. -static input_system_error_t input_system_configure_channel( - const channel_cfg_t channel) -{ - input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; - // Check if channel is not already configured. - if (config.ch_flags[channel.ch_id] & INPUT_SYSTEM_CFG_FLAG_SET){ - return INPUT_SYSTEM_ERR_CHANNEL_ALREADY_SET; - } else { - switch (channel.source_type){ - case INPUT_SYSTEM_SOURCE_SENSOR : - error = input_system_configure_channel_sensor(channel); - break; - case INPUT_SYSTEM_SOURCE_TPG : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_SOURCE_PRBS : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_SOURCE_FIFO : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - default : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - } - - if (error != INPUT_SYSTEM_ERR_NO_ERROR) return error; - // Input switch channel configurations must be combined in united config. - config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2] = - channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[0]; - config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2 + 1] = - channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[1]; - config.input_switch_cfg.vsync_data_reg |= - (channel.target_cfg.input_switch_channel_cfg.vsync_data_reg & 0x7) << (channel.source_cfg.csi_cfg.csi_port * 3); - - // Other targets are just copied and marked as set. - config.target_isp[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_isp_cfg; - config.target_sp[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_sp_cfg; - config.target_strm2mem[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_strm2mem_cfg; - config.target_isp_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; - config.target_sp_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; - config.target_strm2mem_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; - - config.ch_flags[channel.ch_id] = INPUT_SYSTEM_CFG_FLAG_SET; - } - return INPUT_SYSTEM_ERR_NO_ERROR; -} - -// Function that partitions input buffer space with determining addresses. -static input_system_error_t input_buffer_configuration(void) -{ - uint32_t current_address = 0; - uint32_t unallocated_memory = IB_CAPACITY_IN_WORDS; - - ib_buffer_t candidate_buffer_acq = IB_BUFFER_NULL; - uint32_t size_requested; - input_system_config_flags_t acq_already_specified = INPUT_SYSTEM_CFG_FLAG_RESET; - input_system_csi_port_t port; - for (port = INPUT_SYSTEM_PORT_A; port < N_INPUT_SYSTEM_PORTS; port++) { - - csi_cfg_t source = config.csi_value[port];//.csi_cfg; - - if ( config.csi_flags[port] & INPUT_SYSTEM_CFG_FLAG_SET) { - - // Check and set csi buffer in input buffer. - switch (source.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE : - case INPUT_SYSTEM_XMEM_ACQUIRE : - config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; // Well, not used. - break; - - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : - case INPUT_SYSTEM_SRAM_BUFFERING : - case INPUT_SYSTEM_XMEM_BUFFERING : - case INPUT_SYSTEM_XMEM_CAPTURE : - size_requested = source.csi_buffer.mem_reg_size * source.csi_buffer.nof_mem_regs; - if (source.csi_buffer.mem_reg_size > 0 - && source.csi_buffer.nof_mem_regs >0 - && size_requested <= unallocated_memory - ) { - config.csi_buffer[port].mem_reg_addr = current_address; - config.csi_buffer[port].mem_reg_size = source.csi_buffer.mem_reg_size; - config.csi_buffer[port].nof_mem_regs = source.csi_buffer.nof_mem_regs; - current_address += size_requested; - unallocated_memory -= size_requested; - config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_SET; - } else { - config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - break; - - default : - config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - } - - // Check acquisition buffer specified but set it later since it has to be unique. - switch (source.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE : - case INPUT_SYSTEM_SRAM_BUFFERING : - case INPUT_SYSTEM_XMEM_CAPTURE : - // Nothing to do. - break; - - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : - case INPUT_SYSTEM_XMEM_BUFFERING : - case INPUT_SYSTEM_XMEM_ACQUIRE : - if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_RESET) { - size_requested = source.acquisition_buffer.mem_reg_size - * source.acquisition_buffer.nof_mem_regs; - if (source.acquisition_buffer.mem_reg_size > 0 - && source.acquisition_buffer.nof_mem_regs >0 - && size_requested <= unallocated_memory - ) { - candidate_buffer_acq = source.acquisition_buffer; - acq_already_specified = INPUT_SYSTEM_CFG_FLAG_SET; - } - } else { - // Check if specified acquisition buffer is the same as specified before. - if (source.acquisition_buffer.mem_reg_size != candidate_buffer_acq.mem_reg_size - || source.acquisition_buffer.nof_mem_regs != candidate_buffer_acq.nof_mem_regs - ) { - config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - } - break; - - default : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - } - } else { - config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; - } - } // end of for ( port ) - - // Set the acquisition buffer at the end. - size_requested = candidate_buffer_acq.mem_reg_size * candidate_buffer_acq.nof_mem_regs; - if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_SET - && size_requested <= unallocated_memory) { - config.acquisition_buffer_unique.mem_reg_addr = current_address; - config.acquisition_buffer_unique.mem_reg_size = candidate_buffer_acq.mem_reg_size; - config.acquisition_buffer_unique.nof_mem_regs = candidate_buffer_acq.nof_mem_regs; - current_address += size_requested; - unallocated_memory -= size_requested; - config.acquisition_buffer_unique_flags = INPUT_SYSTEM_CFG_FLAG_SET; - - assert(current_address <= IB_CAPACITY_IN_WORDS); - } - - return INPUT_SYSTEM_ERR_NO_ERROR; -} - -static void capture_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); // Commented part is always true. - assert(cfg != NULL); - - input_system_sub_system_reg_store(ID, - sub_id, - CAPT_START_ADDR_REG_ID, - cfg->mem_reg_addr); - input_system_sub_system_reg_store(ID, - sub_id, - CAPT_MEM_REGION_SIZE_REG_ID, - cfg->mem_reg_size); - input_system_sub_system_reg_store(ID, - sub_id, - CAPT_NUM_MEM_REGIONS_REG_ID, - cfg->nof_mem_regs); - - return; -} - - -static void acquisition_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(sub_id == ACQUISITION_UNIT0_ID); - assert(cfg != NULL); - - input_system_sub_system_reg_store(ID, - sub_id, - ACQ_START_ADDR_REG_ID, - cfg->mem_reg_addr); - input_system_sub_system_reg_store(ID, - sub_id, - ACQ_NUM_MEM_REGIONS_REG_ID, - cfg->nof_mem_regs); - input_system_sub_system_reg_store(ID, - sub_id, - ACQ_MEM_REGION_SIZE_REG_ID, - cfg->mem_reg_size); - - return; -} - - -static void ctrl_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ctrl_unit_cfg_t* const cfg) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(sub_id == CTRL_UNIT0_ID); - assert(cfg != NULL); - - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_A_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_addr); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_size); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT0_ID].nof_mem_regs); - - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_B_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_addr); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_size); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT1_ID].nof_mem_regs); - - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_C_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_addr); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_size); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT2_ID].nof_mem_regs); - - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_ACQ_START_ADDR_REG_ID, - cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_addr); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID, - cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_size); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID, - cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].nof_mem_regs); - input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID, - 0); - return; -} - -static void input_system_network_configure( - const input_system_ID_t ID, - const input_system_network_cfg_t * const cfg) -{ - uint32_t sub_id; - - assert(ID < N_INPUT_SYSTEM_ID); - assert(cfg != NULL); - - // Set all 3 multicasts. - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX, - cfg->multicast_cfg[CAPTURE_UNIT0_ID]); - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_B_IDX, - cfg->multicast_cfg[CAPTURE_UNIT1_ID]); - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_C_IDX, - cfg->multicast_cfg[CAPTURE_UNIT2_ID]); - - // Set stream mux. - input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX, - cfg->mux_cfg); - - // Set capture units. - for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { - capture_unit_configure(ID, - sub_id, - &(cfg->ctrl_unit_cfg[ID].buffer_mipi[sub_id - CAPTURE_UNIT0_ID])); - } - - // Set acquisition units. - for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { - acquisition_unit_configure(ID, - sub_id, - &(cfg->ctrl_unit_cfg[sub_id - ACQUISITION_UNIT0_ID].buffer_acquire[sub_id - ACQUISITION_UNIT0_ID])); - } - - // No DMA configuration needed. Ctrl_unit will fully control it. - - // Set controller units. - for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { - ctrl_unit_configure(ID, - sub_id, - &(cfg->ctrl_unit_cfg[sub_id - CTRL_UNIT0_ID])); - } - - return; -} - -static input_system_error_t configuration_to_registers(void) -{ - input_system_network_cfg_t input_system_network_cfg; - int i; - - assert(config.source_type_flags & INPUT_SYSTEM_CFG_FLAG_SET); - - switch (config.source_type) { - case INPUT_SYSTEM_SOURCE_SENSOR : - - // Determine stream multicasts setting based on the mode of csi_cfg_t. - // AM: This should be moved towards earlier function call, e.g. in - // the commit function. - for (i = MIPI_PORT0_ID; i < N_MIPI_PORT_ID; i++) { - if (config.csi_flags[i] & INPUT_SYSTEM_CFG_FLAG_SET) { - - switch (config.csi_value[i].buffering_mode) { - - case INPUT_SYSTEM_FIFO_CAPTURE: - config.multicast[i] = INPUT_SYSTEM_CSI_BACKEND; - break; - - case INPUT_SYSTEM_XMEM_CAPTURE: - case INPUT_SYSTEM_SRAM_BUFFERING: - case INPUT_SYSTEM_XMEM_BUFFERING: - config.multicast[i] = INPUT_SYSTEM_INPUT_BUFFER; - break; - - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: - config.multicast[i] = INPUT_SYSTEM_MULTICAST; - break; - - case INPUT_SYSTEM_XMEM_ACQUIRE: - config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; - break; - - default: - config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - //break; - } - } else { - config.multicast[i]= INPUT_SYSTEM_DISCARD_ALL; - } - - input_system_network_cfg.multicast_cfg[i] = config.multicast[i]; - - } // for - - input_system_network_cfg.mux_cfg = config.multiplexer; - - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT0_ID] = config.csi_buffer[MIPI_PORT0_ID]; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT1_ID] = config.csi_buffer[MIPI_PORT1_ID]; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT2_ID] = config.csi_buffer[MIPI_PORT2_ID]; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID] = - config.acquisition_buffer_unique; - - // First set input network around CSI receiver. - input_system_network_configure(INPUT_SYSTEM0_ID, &input_system_network_cfg); - - // Set the CSI receiver. - //... - break; - - case INPUT_SYSTEM_SOURCE_TPG : - - break; - - case INPUT_SYSTEM_SOURCE_PRBS : - - break; - - case INPUT_SYSTEM_SOURCE_FIFO : - break; - - default : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - - } // end of switch (source_type) - - // Set input selector. - input_selector_cfg_for_sensor(INPUT_SYSTEM0_ID); - - // Set input switch. - input_switch_cfg(INPUT_SYSTEM0_ID, &config.input_switch_cfg); - - // Set input formatters. - // AM: IF are set dynamically. - return INPUT_SYSTEM_ERR_NO_ERROR; -} - - -// Function that applies the whole configuration. -input_system_error_t input_system_configuration_commit(void) -{ - // The last configuration step is to configure the input buffer. - input_system_error_t error = input_buffer_configuration(); - if (error != INPUT_SYSTEM_ERR_NO_ERROR) { - return error; - } - - // Translate the whole configuration into registers. - error = configuration_to_registers(); - if (error != INPUT_SYSTEM_ERR_NO_ERROR) { - return error; - } - - // Translate the whole configuration into ctrl commands etc. - - return INPUT_SYSTEM_ERR_NO_ERROR; -} - - - -// FIFO - -input_system_error_t input_system_csi_fifo_channel_cfg( - uint32_t ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - target_cfg2400_t target -) -{ - channel_cfg_t channel; - - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; - channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; - //channel.source - channel.source_cfg.csi_cfg.csi_port = port; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE; - channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; - channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; - channel.source_cfg.csi_cfg.nof_xmem_buffers = 0; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - - -input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( - uint32_t ch_id, - uint32_t nof_frames, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, - target_cfg2400_t target -) -{ - channel_cfg_t channel; - - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; - channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; - //channel.source - channel.source_cfg.csi_cfg.csi_port = port; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; - channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - - -// SRAM - -input_system_error_t input_system_csi_sram_channel_cfg( - uint32_t ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, - // uint32_t acq_mem_reg_size, - // uint32_t acq_nof_mem_regs, - target_cfg2400_t target -) -{ - channel_cfg_t channel; - - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; - channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; - //channel.source - channel.source_cfg.csi_cfg.csi_port = port; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_SRAM_BUFFERING; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; - channel.source_cfg.csi_cfg.nof_xmem_buffers = 0; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - - -//XMEM - -// Collects all parameters and puts them in channel_cfg_t. -input_system_error_t input_system_csi_xmem_channel_cfg( - uint32_t ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, - uint32_t acq_mem_reg_size, - uint32_t acq_nof_mem_regs, - target_cfg2400_t target, - uint32_t nof_xmem_buffers -) -{ - channel_cfg_t channel; - - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; - channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; - //channel.source - channel.source_cfg.csi_cfg.csi_port = port; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_BUFFERING; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; - channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; - channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_xmem_buffers; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - - - - -input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - uint32_t acq_mem_reg_size, - uint32_t acq_nof_mem_regs, - target_cfg2400_t target) -{ - channel_cfg_t channel; - - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; - channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; - //channel.source - channel.source_cfg.csi_cfg.csi_port = port; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_ACQUIRE; - channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; - channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; - channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; - channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - - -input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, - input_system_csi_port_t port, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, - uint32_t acq_mem_reg_size, - uint32_t acq_nof_mem_regs, - target_cfg2400_t target) -{ - channel_cfg_t channel; - - channel.ch_id = ch_id; - //channel.backend_ch = backend_ch; - channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; - //channel.source - channel.source_cfg.csi_cfg.csi_port = port; - //channel.source_cfg.csi_cfg.backend_ch = backend_ch; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_CAPTURE; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; - channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; - channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; - channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; - channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - - - -// Non - CSI - -input_system_error_t input_system_prbs_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames,//not used yet - uint32_t seed, - uint32_t sync_gen_width, - uint32_t sync_gen_height, - uint32_t sync_gen_hblank_cycles, - uint32_t sync_gen_vblank_cycles, - target_cfg2400_t target -) -{ - channel_cfg_t channel; - - (void)nof_frames; - - channel.ch_id = ch_id; - channel.source_type= INPUT_SYSTEM_SOURCE_PRBS; - - channel.source_cfg.prbs_cfg.seed = seed; - channel.source_cfg.prbs_cfg.sync_gen_cfg.width = sync_gen_width; - channel.source_cfg.prbs_cfg.sync_gen_cfg.height = sync_gen_height; - channel.source_cfg.prbs_cfg.sync_gen_cfg.hblank_cycles = sync_gen_hblank_cycles; - channel.source_cfg.prbs_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; - - channel.target_cfg = target; - - return input_system_configure_channel(channel); -} - - - -input_system_error_t input_system_tpg_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames,//not used yet - uint32_t x_mask, - uint32_t y_mask, - uint32_t x_delta, - uint32_t y_delta, - uint32_t xy_mask, - uint32_t sync_gen_width, - uint32_t sync_gen_height, - uint32_t sync_gen_hblank_cycles, - uint32_t sync_gen_vblank_cycles, - target_cfg2400_t target -) -{ - channel_cfg_t channel; - - (void)nof_frames; - - channel.ch_id = ch_id; - channel.source_type = INPUT_SYSTEM_SOURCE_TPG; - - channel.source_cfg.tpg_cfg.x_mask = x_mask; - channel.source_cfg.tpg_cfg.y_mask = y_mask; - channel.source_cfg.tpg_cfg.x_delta = x_delta; - channel.source_cfg.tpg_cfg.y_delta = y_delta; - channel.source_cfg.tpg_cfg.xy_mask = xy_mask; - channel.source_cfg.tpg_cfg.sync_gen_cfg.width = sync_gen_width; - channel.source_cfg.tpg_cfg.sync_gen_cfg.height = sync_gen_height; - channel.source_cfg.tpg_cfg.sync_gen_cfg.hblank_cycles = sync_gen_hblank_cycles; - channel.source_cfg.tpg_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - -// MW: Don't use system specific names, (even in system specific files) "cfg2400" -> cfg -input_system_error_t input_system_gpfifo_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, //not used yet - target_cfg2400_t target) -{ - channel_cfg_t channel; - - (void)nof_frames; - - channel.ch_id = ch_id; - channel.source_type = INPUT_SYSTEM_SOURCE_FIFO; - - channel.target_cfg = target; - return input_system_configure_channel(channel); -} - -/////////////////////////////////////////////////////////////////////////// -// -// Private specialized functions for channel setting. -// -/////////////////////////////////////////////////////////////////////////// - -// Fills the parameters to config.csi_value[port] -static input_system_error_t input_system_configure_channel_sensor( - const channel_cfg_t channel) -{ - const uint32_t port = channel.source_cfg.csi_cfg.csi_port; - input_system_error_t status = INPUT_SYSTEM_ERR_NO_ERROR; - - input_system_multiplex_t mux; - - if (port >= N_INPUT_SYSTEM_PORTS) - return INPUT_SYSTEM_ERR_GENERIC; - - //check if port > N_INPUT_SYSTEM_MULTIPLEX - - status = set_source_type(&(config.source_type), channel.source_type, &config.source_type_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - - // Check for conflicts on source (implicitly on multicast, capture unit and input buffer). - - status = set_csi_cfg(&(config.csi_value[port]), &channel.source_cfg.csi_cfg, &(config.csi_flags[port])); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - - - switch (channel.source_cfg.csi_cfg.buffering_mode){ - case INPUT_SYSTEM_FIFO_CAPTURE: - - // Check for conflicts on mux. - mux = INPUT_SYSTEM_MIPI_PORT0 + port; - status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - config.multicast[port] = INPUT_SYSTEM_CSI_BACKEND; - - // Shared resource, so it should be blocked. - //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - - break; - case INPUT_SYSTEM_SRAM_BUFFERING : - - // Check for conflicts on mux. - mux = INPUT_SYSTEM_ACQUISITION_UNIT; - status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; - - // Shared resource, so it should be blocked. - //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - - break; - case INPUT_SYSTEM_XMEM_BUFFERING : - - // Check for conflicts on mux. - mux = INPUT_SYSTEM_ACQUISITION_UNIT; - status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; - - // Shared resource, so it should be blocked. - //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - - break; - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_XMEM_CAPTURE : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_XMEM_ACQUIRE : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - default : - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - } - return INPUT_SYSTEM_ERR_NO_ERROR; -} - -// Test flags and set structure. -static input_system_error_t set_source_type( - input_system_source_t * const lhs, - const input_system_source_t rhs, - input_system_config_flags_t * const flags) -{ - // MW: Not enough asserts - assert(lhs != NULL); - assert(flags != NULL); - - if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - - if ((*flags) & INPUT_SYSTEM_CFG_FLAG_SET) { - // Check for consistency with already set value. - if ((*lhs) == (rhs)) { - return INPUT_SYSTEM_ERR_NO_ERROR; - } - else { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - } - // Check the value (individually). - if (rhs >= N_INPUT_SYSTEM_SOURCE) { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - // Set the value. - *lhs = rhs; - - *flags |= INPUT_SYSTEM_CFG_FLAG_SET; - return INPUT_SYSTEM_ERR_NO_ERROR; -} - - -// Test flags and set structure. -static input_system_error_t set_csi_cfg( - csi_cfg_t* const lhs, - const csi_cfg_t* const rhs, - input_system_config_flags_t * const flags) -{ - uint32_t memory_required; - uint32_t acq_memory_required; - - assert(lhs != NULL); - assert(flags != NULL); - - if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - - if (*flags & INPUT_SYSTEM_CFG_FLAG_SET) { - // check for consistency with already set value. - if (/*lhs->backend_ch == rhs.backend_ch - &&*/ lhs->buffering_mode == rhs->buffering_mode - && lhs->csi_buffer.mem_reg_size == rhs->csi_buffer.mem_reg_size - && lhs->csi_buffer.nof_mem_regs == rhs->csi_buffer.nof_mem_regs - && lhs->acquisition_buffer.mem_reg_size == rhs->acquisition_buffer.mem_reg_size - && lhs->acquisition_buffer.nof_mem_regs == rhs->acquisition_buffer.nof_mem_regs - && lhs->nof_xmem_buffers == rhs->nof_xmem_buffers - ) { - return INPUT_SYSTEM_ERR_NO_ERROR; - } - else { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - } - // Check the value (individually). - // no check for backend_ch - // no check for nof_xmem_buffers - memory_required = rhs->csi_buffer.mem_reg_size * rhs->csi_buffer.nof_mem_regs; - acq_memory_required = rhs->acquisition_buffer.mem_reg_size * rhs->acquisition_buffer.nof_mem_regs; - if (rhs->buffering_mode >= N_INPUT_SYSTEM_BUFFERING_MODE - || - // Check if required memory is available in input buffer (SRAM). - (memory_required + acq_memory_required )> config.unallocated_ib_mem_words - - ) { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - // Set the value. - //lhs[port]->backend_ch = rhs.backend_ch; - lhs->buffering_mode = rhs->buffering_mode; - lhs->nof_xmem_buffers = rhs->nof_xmem_buffers; - - lhs->csi_buffer.mem_reg_size = rhs->csi_buffer.mem_reg_size; - lhs->csi_buffer.nof_mem_regs = rhs->csi_buffer.nof_mem_regs; - lhs->acquisition_buffer.mem_reg_size = rhs->acquisition_buffer.mem_reg_size; - lhs->acquisition_buffer.nof_mem_regs = rhs->acquisition_buffer.nof_mem_regs; - // ALX: NB: Here we just set buffer parameters, but still not allocate it - // (no addresses determined). That will be done during commit. - - // FIXIT: acq_memory_required is not deducted, since it can be allocated multiple times. - config.unallocated_ib_mem_words -= memory_required; -//assert(config.unallocated_ib_mem_words >=0); - *flags |= INPUT_SYSTEM_CFG_FLAG_SET; - return INPUT_SYSTEM_ERR_NO_ERROR; -} - - -// Test flags and set structure. -static input_system_error_t input_system_multiplexer_cfg( - input_system_multiplex_t* const lhs, - const input_system_multiplex_t rhs, - input_system_config_flags_t* const flags) -{ - assert(lhs != NULL); - assert(flags != NULL); - - if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - - if ((*flags) & INPUT_SYSTEM_CFG_FLAG_SET) { - // Check for consistency with already set value. - if ((*lhs) == (rhs)) { - return INPUT_SYSTEM_ERR_NO_ERROR; - } - else { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - } - // Check the value (individually). - if (rhs >= N_INPUT_SYSTEM_MULTIPLEX) { - *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - } - // Set the value. - *lhs = rhs; - - *flags |= INPUT_SYSTEM_CFG_FLAG_SET; - return INPUT_SYSTEM_ERR_NO_ERROR; -} -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h deleted file mode 100644 index bf9230f..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h +++ /dev/null @@ -1,533 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ -#define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ - -#include <type_support.h> - -#include "input_system_global.h" - -#include "input_system_defs.h" /* HIVE_ISYS_GPREG_MULTICAST_A_IDX,... */ -#include "css_receiver_2400_defs.h" /* _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX, _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX,... */ -#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) -#include "isp_capture_defs.h" -#elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) -/* Same name, but keep the distinction,it is a different device */ -#include "isp_capture_defs.h" -#else -#error "input_system_local.h: 2400_SYSTEM must be one of {2400, 2401 }" -#endif -#include "isp_acquisition_defs.h" -#include "input_system_ctrl_defs.h" - - -typedef enum { - INPUT_SYSTEM_ERR_NO_ERROR = 0, - INPUT_SYSTEM_ERR_GENERIC, - INPUT_SYSTEM_ERR_CHANNEL_ALREADY_SET, - INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE, - INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED, - N_INPUT_SYSTEM_ERR -} input_system_error_t; - -typedef enum { - INPUT_SYSTEM_PORT_A = 0, - INPUT_SYSTEM_PORT_B, - INPUT_SYSTEM_PORT_C, - N_INPUT_SYSTEM_PORTS -} input_system_csi_port_t; - -typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; -typedef struct input_system_network_cfg_s input_system_network_cfg_t; -typedef struct target_cfg2400_s target_cfg2400_t; -typedef struct channel_cfg_s channel_cfg_t; -typedef struct backend_channel_cfg_s backend_channel_cfg_t; -typedef struct input_system_cfg2400_s input_system_cfg2400_t; -typedef struct mipi_port_state_s mipi_port_state_t; -typedef struct rx_channel_state_s rx_channel_state_t; -typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; -typedef struct input_switch_cfg_s input_switch_cfg_t; - -struct ctrl_unit_cfg_s { - ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; - ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; -}; - -struct input_system_network_cfg_s { - input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; - input_system_multiplex_t mux_cfg; - ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; -}; - -typedef struct { -// TBD. - uint32_t dummy_parameter; -} target_isp_cfg_t; - - -typedef struct { -// TBD. - uint32_t dummy_parameter; -} target_sp_cfg_t; - - -typedef struct { -// TBD. - uint32_t dummy_parameter; -} target_strm2mem_cfg_t; - -struct input_switch_cfg_channel_s { - uint32_t hsync_data_reg[2]; - uint32_t vsync_data_reg; -}; - -struct target_cfg2400_s { - input_switch_cfg_channel_t input_switch_channel_cfg; - target_isp_cfg_t target_isp_cfg; - target_sp_cfg_t target_sp_cfg; - target_strm2mem_cfg_t target_strm2mem_cfg; -}; - -struct backend_channel_cfg_s { - uint32_t fmt_control_word_1; // Format config. - uint32_t fmt_control_word_2; - uint32_t no_side_band; -}; - -typedef union { - csi_cfg_t csi_cfg; - tpg_cfg_t tpg_cfg; - prbs_cfg_t prbs_cfg; - gpfifo_cfg_t gpfifo_cfg; -} source_cfg_t; - - -struct input_switch_cfg_s { - uint32_t hsync_data_reg[N_RX_CHANNEL_ID * 2]; - uint32_t vsync_data_reg; -}; - -// Configuration of a channel. -struct channel_cfg_s { - uint32_t ch_id; - backend_channel_cfg_t backend_ch; - input_system_source_t source_type; - source_cfg_t source_cfg; - target_cfg2400_t target_cfg; -}; - - -// Complete configuration for input system. -struct input_system_cfg2400_s { - - input_system_source_t source_type; input_system_config_flags_t source_type_flags; - //channel_cfg_t channel[N_CHANNELS]; - input_system_config_flags_t ch_flags[N_CHANNELS]; - // This is the place where the buffers' settings are collected, as given. - csi_cfg_t csi_value[N_CSI_PORTS]; input_system_config_flags_t csi_flags[N_CSI_PORTS]; - - // Possible another struct for ib. - // This buffers set at the end, based on the all configurations. - ib_buffer_t csi_buffer[N_CSI_PORTS]; input_system_config_flags_t csi_buffer_flags[N_CSI_PORTS]; - ib_buffer_t acquisition_buffer_unique; input_system_config_flags_t acquisition_buffer_unique_flags; - uint32_t unallocated_ib_mem_words; // Used for check.DEFAULT = IB_CAPACITY_IN_WORDS. - //uint32_t acq_allocated_ib_mem_words; - - input_system_connection_t multicast[N_CSI_PORTS]; - input_system_multiplex_t multiplexer; input_system_config_flags_t multiplexer_flags; - - - tpg_cfg_t tpg_value; input_system_config_flags_t tpg_flags; - prbs_cfg_t prbs_value; input_system_config_flags_t prbs_flags; - gpfifo_cfg_t gpfifo_value; input_system_config_flags_t gpfifo_flags; - - - input_switch_cfg_t input_switch_cfg; - - - target_isp_cfg_t target_isp [N_CHANNELS]; input_system_config_flags_t target_isp_flags [N_CHANNELS]; - target_sp_cfg_t target_sp [N_CHANNELS]; input_system_config_flags_t target_sp_flags [N_CHANNELS]; - target_strm2mem_cfg_t target_strm2mem [N_CHANNELS]; input_system_config_flags_t target_strm2mem_flags [N_CHANNELS]; - - input_system_config_flags_t session_flags; - -}; - -/* - * For each MIPI port - */ -#define _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX -#define _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX -#define _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX -#define _HRT_CSS_RECEIVER_TIMEOUT_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX -#define _HRT_CSS_RECEIVER_INIT_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX -/* new regs for each MIPI port w.r.t. 2300 */ -#define _HRT_CSS_RECEIVER_RAW16_18_DATAID_REG_IDX _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX -#define _HRT_CSS_RECEIVER_SYNC_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX -#define _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX - -/* _HRT_CSS_RECEIVER_2400_COMP_FORMAT_REG_IDX is not defined per MIPI port but per channel */ -/* _HRT_CSS_RECEIVER_2400_COMP_PREDICT_REG_IDX is not defined per MIPI port but per channel */ -#define _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX -#define _HRT_CSS_RECEIVER_LS_TO_DATA_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX -#define _HRT_CSS_RECEIVER_DATA_TO_LE_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX -#define _HRT_CSS_RECEIVER_LE_TO_FE_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX -#define _HRT_CSS_RECEIVER_FE_TO_FS_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX -#define _HRT_CSS_RECEIVER_LE_TO_LS_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX -#define _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX -#define _HRT_CSS_RECEIVER_BACKEND_RST_REG_IDX _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX -#define _HRT_CSS_RECEIVER_RAW18_REG_IDX _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX -#define _HRT_CSS_RECEIVER_FORCE_RAW8_REG_IDX _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX -#define _HRT_CSS_RECEIVER_RAW16_REG_IDX _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX - -/* Previously MIPI port regs, now 2x2 logical channel regs */ -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC0_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC0_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC1_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC1_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC2_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC2_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC3_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX -#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC3_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX - -/* Second backend is at offset 0x0700 w.r.t. the first port at offset 0x0100 */ -#define _HRT_CSS_BE_OFFSET 448 -#define _HRT_CSS_RECEIVER_BE_GSP_ACC_OVL_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_SRST_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG0_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG1_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG2_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG3_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_SEL_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_RAW16_CONFIG_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_RAW18_CONFIG_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_FORCE_RAW8_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX + _HRT_CSS_BE_OFFSET) -#define _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX + _HRT_CSS_BE_OFFSET) - - -#define _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT -#define _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT -#define _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT -#define _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT -#define _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT -#define _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT - -#define _HRT_CSS_RECEIVER_FUNC_PROG_REG_IDX _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX -#define _HRT_CSS_RECEIVER_DATA_TIMEOUT_IDX _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX -#define _HRT_CSS_RECEIVER_DATA_TIMEOUT_BITS _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS - -typedef struct capture_unit_state_s capture_unit_state_t; -typedef struct acquisition_unit_state_s acquisition_unit_state_t; -typedef struct ctrl_unit_state_s ctrl_unit_state_t; - -/* - * In 2300 ports can be configured independently and stream - * formats need to be specified. In 2400, there are only 8 - * supported configurations but the HW is fused to support - * only a single one. - * - * In 2300 the compressed format types are programmed by the - * user. In 2400 all stream formats are encoded on the stream. - * - * Use the enum to check validity of a user configuration - */ -typedef enum { - MONO_4L_1L_0L = 0, - MONO_3L_1L_0L, - MONO_2L_1L_0L, - MONO_1L_1L_0L, - STEREO_2L_1L_2L, - STEREO_3L_1L_1L, - STEREO_2L_1L_1L, - STEREO_1L_1L_1L, - N_RX_MODE -} rx_mode_t; - -typedef enum { - MIPI_PREDICTOR_NONE = 0, - MIPI_PREDICTOR_TYPE1, - MIPI_PREDICTOR_TYPE2, - N_MIPI_PREDICTOR_TYPES -} mipi_predictor_t; - -typedef enum { - MIPI_COMPRESSOR_NONE = 0, - MIPI_COMPRESSOR_10_6_10, - MIPI_COMPRESSOR_10_7_10, - MIPI_COMPRESSOR_10_8_10, - MIPI_COMPRESSOR_12_6_12, - MIPI_COMPRESSOR_12_7_12, - MIPI_COMPRESSOR_12_8_12, - N_MIPI_COMPRESSOR_METHODS -} mipi_compressor_t; - -typedef enum { - MIPI_FORMAT_RGB888 = 0, - MIPI_FORMAT_RGB555, - MIPI_FORMAT_RGB444, - MIPI_FORMAT_RGB565, - MIPI_FORMAT_RGB666, - MIPI_FORMAT_RAW8, /* 5 */ - MIPI_FORMAT_RAW10, - MIPI_FORMAT_RAW6, - MIPI_FORMAT_RAW7, - MIPI_FORMAT_RAW12, - MIPI_FORMAT_RAW14, /* 10 */ - MIPI_FORMAT_YUV420_8, - MIPI_FORMAT_YUV420_10, - MIPI_FORMAT_YUV422_8, - MIPI_FORMAT_YUV422_10, - MIPI_FORMAT_CUSTOM0, /* 15 */ - MIPI_FORMAT_YUV420_8_LEGACY, - MIPI_FORMAT_EMBEDDED, - MIPI_FORMAT_CUSTOM1, - MIPI_FORMAT_CUSTOM2, - MIPI_FORMAT_CUSTOM3, /* 20 */ - MIPI_FORMAT_CUSTOM4, - MIPI_FORMAT_CUSTOM5, - MIPI_FORMAT_CUSTOM6, - MIPI_FORMAT_CUSTOM7, - MIPI_FORMAT_YUV420_8_SHIFT, /* 25 */ - MIPI_FORMAT_YUV420_10_SHIFT, - MIPI_FORMAT_RAW16, - MIPI_FORMAT_RAW18, - N_MIPI_FORMAT, -} mipi_format_t; - -#define MIPI_FORMAT_JPEG MIPI_FORMAT_CUSTOM0 -#define MIPI_FORMAT_BINARY_8 MIPI_FORMAT_CUSTOM0 -#define N_MIPI_FORMAT_CUSTOM 8 - -/* The number of stores for compressed format types */ -#define N_MIPI_COMPRESSOR_CONTEXT (N_RX_CHANNEL_ID * N_MIPI_FORMAT_CUSTOM) - -typedef enum { - RX_IRQ_INFO_BUFFER_OVERRUN = 1UL << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT, - RX_IRQ_INFO_INIT_TIMEOUT = 1UL << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT, - RX_IRQ_INFO_ENTER_SLEEP_MODE = 1UL << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT, - RX_IRQ_INFO_EXIT_SLEEP_MODE = 1UL << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT, - RX_IRQ_INFO_ECC_CORRECTED = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT, - RX_IRQ_INFO_ERR_SOT = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT, - RX_IRQ_INFO_ERR_SOT_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT, - RX_IRQ_INFO_ERR_CONTROL = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT, - RX_IRQ_INFO_ERR_ECC_DOUBLE = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT, -/* RX_IRQ_INFO_NO_ERR = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT, */ - RX_IRQ_INFO_ERR_CRC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT, - RX_IRQ_INFO_ERR_UNKNOWN_ID = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT, - RX_IRQ_INFO_ERR_FRAME_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT, - RX_IRQ_INFO_ERR_FRAME_DATA = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT, - RX_IRQ_INFO_ERR_DATA_TIMEOUT = 1UL << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT, - RX_IRQ_INFO_ERR_UNKNOWN_ESC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT, - RX_IRQ_INFO_ERR_LINE_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT, -} rx_irq_info_t; - -typedef struct rx_cfg_s rx_cfg_t; - -/* - * Applied per port - */ -struct rx_cfg_s { - rx_mode_t mode; /* The HW config */ - enum mipi_port_id port; /* The port ID to apply the control on */ - unsigned int timeout; - unsigned int initcount; - unsigned int synccount; - unsigned int rxcount; - mipi_predictor_t comp; /* Just for backward compatibility */ - bool is_two_ppc; -}; - -/* NOTE: The base has already an offset of 0x0100 */ -static const hrt_address MIPI_PORT_OFFSET[N_MIPI_PORT_ID] = { - 0x00000000UL, - 0x00000100UL, - 0x00000200UL}; - -static const mipi_lane_cfg_t MIPI_PORT_MAXLANES[N_MIPI_PORT_ID] = { - MIPI_4LANE_CFG, - MIPI_1LANE_CFG, - MIPI_2LANE_CFG}; - -static const bool MIPI_PORT_ACTIVE[N_RX_MODE][N_MIPI_PORT_ID] = { - {true, true, false}, - {true, true, false}, - {true, true, false}, - {true, true, false}, - {true, true, true}, - {true, true, true}, - {true, true, true}, - {true, true, true}}; - -static const mipi_lane_cfg_t MIPI_PORT_LANES[N_RX_MODE][N_MIPI_PORT_ID] = { - {MIPI_4LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, - {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, - {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, - {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, - {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_2LANE_CFG}, - {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}, - {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}, - {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}}; - -static const hrt_address SUB_SYSTEM_OFFSET[N_SUB_SYSTEM_ID] = { - 0x00001000UL, - 0x00002000UL, - 0x00003000UL, - 0x00004000UL, - 0x00005000UL, - 0x00009000UL, - 0x0000A000UL, - 0x0000B000UL, - 0x0000C000UL}; - -struct capture_unit_state_s { - int Packet_Length; - int Received_Length; - int Received_Short_Packets; - int Received_Long_Packets; - int Last_Command; - int Next_Command; - int Last_Acknowledge; - int Next_Acknowledge; - int FSM_State_Info; - int StartMode; - int Start_Addr; - int Mem_Region_Size; - int Num_Mem_Regions; -/* int Init; write-only registers - int Start; - int Stop; */ -}; - -struct acquisition_unit_state_s { -/* int Init; write-only register */ - int Received_Short_Packets; - int Received_Long_Packets; - int Last_Command; - int Next_Command; - int Last_Acknowledge; - int Next_Acknowledge; - int FSM_State_Info; - int Int_Cntr_Info; - int Start_Addr; - int Mem_Region_Size; - int Num_Mem_Regions; -}; - -struct ctrl_unit_state_s { - int last_cmd; - int next_cmd; - int last_ack; - int next_ack; - int top_fsm_state; - int captA_fsm_state; - int captB_fsm_state; - int captC_fsm_state; - int acq_fsm_state; - int captA_start_addr; - int captB_start_addr; - int captC_start_addr; - int captA_mem_region_size; - int captB_mem_region_size; - int captC_mem_region_size; - int captA_num_mem_regions; - int captB_num_mem_regions; - int captC_num_mem_regions; - int acq_start_addr; - int acq_mem_region_size; - int acq_num_mem_regions; -/* int ctrl_init; write only register */ - int capt_reserve_one_mem_region; -}; - -struct input_system_state_s { - int str_multicastA_sel; - int str_multicastB_sel; - int str_multicastC_sel; - int str_mux_sel; - int str_mon_status; - int str_mon_irq_cond; - int str_mon_irq_en; - int isys_srst; - int isys_slv_reg_srst; - int str_deint_portA_cnt; - int str_deint_portB_cnt; - struct capture_unit_state_s capture_unit[N_CAPTURE_UNIT_ID]; - struct acquisition_unit_state_s acquisition_unit[N_ACQUISITION_UNIT_ID]; - struct ctrl_unit_state_s ctrl_unit_state[N_CTRL_UNIT_ID]; -}; - -struct mipi_port_state_s { - int device_ready; - int irq_status; - int irq_enable; - uint32_t timeout_count; - uint16_t init_count; - uint16_t raw16_18; - uint32_t sync_count; /*4 x uint8_t */ - uint32_t rx_count; /*4 x uint8_t */ - uint8_t lane_sync_count[MIPI_4LANE_CFG]; - uint8_t lane_rx_count[MIPI_4LANE_CFG]; -}; - -struct rx_channel_state_s { - uint32_t comp_scheme0; - uint32_t comp_scheme1; - mipi_predictor_t pred[N_MIPI_FORMAT_CUSTOM]; - mipi_compressor_t comp[N_MIPI_FORMAT_CUSTOM]; -}; - -struct receiver_state_s { - uint8_t fs_to_ls_delay; - uint8_t ls_to_data_delay; - uint8_t data_to_le_delay; - uint8_t le_to_fe_delay; - uint8_t fe_to_fs_delay; - uint8_t le_to_fs_delay; - bool is_two_ppc; - int backend_rst; - uint16_t raw18; - bool force_raw8; - uint16_t raw16; - struct mipi_port_state_s mipi_port_state[N_MIPI_PORT_ID]; - struct rx_channel_state_s rx_channel_state[N_RX_CHANNEL_ID]; - int be_gsp_acc_ovl; - int be_srst; - int be_is_two_ppc; - int be_comp_format0; - int be_comp_format1; - int be_comp_format2; - int be_comp_format3; - int be_sel; - int be_raw16_config; - int be_raw18_config; - int be_force_raw8; - int be_irq_status; - int be_irq_clear; -}; - -#endif /* __INPUT_SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h deleted file mode 100644 index 48876bb0..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ -#define __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ - -#include "input_system_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_INPUT_SYSTEM_C void input_system_reg_store( - const input_system_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_reg_load( - const input_system_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg*sizeof(hrt_data)); -} - -STORAGE_CLASS_INPUT_SYSTEM_C void receiver_reg_store( - const rx_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_RX_ID); - assert(RX_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(RX_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_reg_load( - const rx_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_RX_ID); - assert(RX_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(RX_BASE[ID] + reg*sizeof(hrt_data)); -} - -STORAGE_CLASS_INPUT_SYSTEM_C void receiver_port_reg_store( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_RX_ID); - assert(port_ID < N_MIPI_PORT_ID); - assert(RX_BASE[ID] != (hrt_address)-1); - assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); - ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_port_reg_load( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const hrt_address reg) -{ - assert(ID < N_RX_ID); - assert(port_ID < N_MIPI_PORT_ID); - assert(RX_BASE[ID] != (hrt_address)-1); - assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); - return ia_css_device_load_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg*sizeof(hrt_data)); -} - -STORAGE_CLASS_INPUT_SYSTEM_C void input_system_sub_system_reg_store( - const input_system_ID_t ID, - const sub_system_ID_t sub_ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(sub_ID < N_SUB_SYSTEM_ID); - assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); - ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_sub_system_reg_load( - const input_system_ID_t ID, - const sub_system_ID_t sub_ID, - const hrt_address reg) -{ - assert(ID < N_INPUT_SYSTEM_ID); - assert(sub_ID < N_SUB_SYSTEM_ID); - assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); - return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg*sizeof(hrt_data)); -} - -#endif /* __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c deleted file mode 100644 index 51daf76..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c +++ /dev/null @@ -1,448 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "assert_support.h" -#include "irq.h" - -#ifndef __INLINE_GP_DEVICE__ -#define __INLINE_GP_DEVICE__ -#endif -#include "gp_device.h" /* _REG_GP_IRQ_REQUEST_ADDR */ - -#include "platform_support.h" /* hrt_sleep() */ - -static inline void irq_wait_for_write_complete( - const irq_ID_t ID); - -static inline bool any_irq_channel_enabled( - const irq_ID_t ID); - -static inline irq_ID_t virq_get_irq_id( - const virq_id_t irq_ID, - unsigned int *channel_ID); - -#ifndef __INLINE_IRQ__ -#include "irq_private.h" -#endif /* __INLINE_IRQ__ */ - -static unsigned short IRQ_N_CHANNEL[N_IRQ_ID] = { - IRQ0_ID_N_CHANNEL, - IRQ1_ID_N_CHANNEL, - IRQ2_ID_N_CHANNEL, - IRQ3_ID_N_CHANNEL}; - -static unsigned short IRQ_N_ID_OFFSET[N_IRQ_ID + 1] = { - IRQ0_ID_OFFSET, - IRQ1_ID_OFFSET, - IRQ2_ID_OFFSET, - IRQ3_ID_OFFSET, - IRQ_END_OFFSET}; - -static virq_id_t IRQ_NESTING_ID[N_IRQ_ID] = { - N_virq_id, - virq_ifmt, - virq_isys, - virq_isel}; - -void irq_clear_all( - const irq_ID_t ID) -{ - hrt_data mask = 0xFFFFFFFF; - - assert(ID < N_IRQ_ID); - assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); - - if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { - mask = ~((~(hrt_data)0)>>IRQ_N_CHANNEL[ID]); - } - - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, mask); - return; -} - -/* - * Do we want the user to be able to set the signalling method ? - */ -void irq_enable_channel( - const irq_ID_t ID, - const unsigned int irq_id) -{ - unsigned int mask = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX); - unsigned int enable = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); - unsigned int edge_in = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); - unsigned int me = 1U << irq_id; - - assert(ID < N_IRQ_ID); - assert(irq_id < IRQ_N_CHANNEL[ID]); - - mask |= me; - enable |= me; - edge_in |= me; /* rising edge */ - -/* to avoid mishaps configuration must follow the following order */ - -/* mask this interrupt */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask & ~me); -/* rising edge at input */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_EDGE_REG_IDX, edge_in); -/* enable interrupt to output */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); -/* clear current irq only */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); -/* unmask interrupt from input */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); - - irq_wait_for_write_complete(ID); - - return; -} - -void irq_enable_pulse( - const irq_ID_t ID, - bool pulse) -{ - unsigned int edge_out = 0x0; - - if (pulse) { - edge_out = 0xffffffff; - } - /* output is given as edge, not pulse */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX, edge_out); - return; -} - -void irq_disable_channel( - const irq_ID_t ID, - const unsigned int irq_id) -{ - unsigned int mask = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX); - unsigned int enable = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); - unsigned int me = 1U << irq_id; - - assert(ID < N_IRQ_ID); - assert(irq_id < IRQ_N_CHANNEL[ID]); - - mask &= ~me; - enable &= ~me; - -/* enable interrupt to output */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); -/* unmask interrupt from input */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); -/* clear current irq only */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); - - irq_wait_for_write_complete(ID); - - return; -} - -enum hrt_isp_css_irq_status irq_get_channel_id( - const irq_ID_t ID, - unsigned int *irq_id) -{ - unsigned int irq_status = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); - unsigned int idx; - enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; - - assert(ID < N_IRQ_ID); - assert(irq_id != NULL); - -/* find the first irq bit */ - for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { - if (irq_status & (1U << idx)) - break; - } - if (idx == IRQ_N_CHANNEL[ID]) - return hrt_isp_css_irq_status_error; - -/* now check whether there are more bits set */ - if (irq_status != (1U << idx)) - status = hrt_isp_css_irq_status_more_irqs; - - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); - - irq_wait_for_write_complete(ID); - - if (irq_id != NULL) - *irq_id = (unsigned int)idx; - - return status; -} - -static const hrt_address IRQ_REQUEST_ADDR[N_IRQ_SW_CHANNEL_ID] = { - _REG_GP_IRQ_REQUEST0_ADDR, - _REG_GP_IRQ_REQUEST1_ADDR}; - -void irq_raise( - const irq_ID_t ID, - const irq_sw_channel_id_t irq_id) -{ - hrt_address addr; - - OP___assert(ID == IRQ0_ID); - OP___assert(IRQ_BASE[ID] != (hrt_address)-1); - OP___assert(irq_id < N_IRQ_SW_CHANNEL_ID); - - (void)ID; - - addr = IRQ_REQUEST_ADDR[irq_id]; -/* The SW IRQ pins are remapped to offset zero */ - gp_device_reg_store(GP_DEVICE0_ID, - (unsigned int)addr, 1); - gp_device_reg_store(GP_DEVICE0_ID, - (unsigned int)addr, 0); - return; -} - -void irq_controller_get_state( - const irq_ID_t ID, - irq_controller_state_t *state) -{ - assert(ID < N_IRQ_ID); - assert(state != NULL); - - state->irq_edge = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); - state->irq_mask = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX); - state->irq_status = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); - state->irq_enable = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); - state->irq_level_not_pulse = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX); - return; -} - -bool any_virq_signal(void) -{ - unsigned int irq_status = irq_reg_load(IRQ0_ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); - - return (irq_status != 0); -} - -void cnd_virq_enable_channel( - const virq_id_t irq_ID, - const bool en) -{ - irq_ID_t i; - unsigned int channel_ID; - irq_ID_t ID = virq_get_irq_id(irq_ID, &channel_ID); - - assert(ID < N_IRQ_ID); - - for (i=IRQ1_ID;i<N_IRQ_ID;i++) { - /* It is not allowed to enable the pin of a nested IRQ directly */ - assert(irq_ID != IRQ_NESTING_ID[i]); - } - - if (en) { - irq_enable_channel(ID, channel_ID); - if (IRQ_NESTING_ID[ID] != N_virq_id) { -/* Single level nesting, otherwise we'd need to recurse */ - irq_enable_channel(IRQ0_ID, IRQ_NESTING_ID[ID]); - } - } else { - irq_disable_channel(ID, channel_ID); - if ((IRQ_NESTING_ID[ID] != N_virq_id) && !any_irq_channel_enabled(ID)) { -/* Only disable the top if the nested ones are empty */ - irq_disable_channel(IRQ0_ID, IRQ_NESTING_ID[ID]); - } - } - return; -} - - -void virq_clear_all(void) -{ - irq_ID_t irq_id; - - for (irq_id = (irq_ID_t)0; irq_id < N_IRQ_ID; irq_id++) { - irq_clear_all(irq_id); - } - return; -} - -enum hrt_isp_css_irq_status virq_get_channel_signals( - virq_info_t *irq_info) -{ - enum hrt_isp_css_irq_status irq_status = hrt_isp_css_irq_status_error; - irq_ID_t ID; - - assert(irq_info != NULL); - - for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { - if (any_irq_channel_enabled(ID)) { - hrt_data irq_data = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); - - if (irq_data != 0) { -/* The error condition is an IRQ pulse received with no IRQ status written */ - irq_status = hrt_isp_css_irq_status_success; - } - - irq_info->irq_status_reg[ID] |= irq_data; - - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, irq_data); - - irq_wait_for_write_complete(ID); - } - } - - return irq_status; -} - -void virq_clear_info( - virq_info_t *irq_info) -{ - irq_ID_t ID; - - assert(irq_info != NULL); - - for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { - irq_info->irq_status_reg[ID] = 0; - } - return; -} - -enum hrt_isp_css_irq_status virq_get_channel_id( - virq_id_t *irq_id) -{ - unsigned int irq_status = irq_reg_load(IRQ0_ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); - unsigned int idx; - enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; - irq_ID_t ID; - - assert(irq_id != NULL); - -/* find the first irq bit on device 0 */ - for (idx = 0; idx < IRQ_N_CHANNEL[IRQ0_ID]; idx++) { - if (irq_status & (1U << idx)) - break; - } - - if (idx == IRQ_N_CHANNEL[IRQ0_ID]) { - return hrt_isp_css_irq_status_error; - } - -/* Check whether there are more bits set on device 0 */ - if (irq_status != (1U << idx)) { - status = hrt_isp_css_irq_status_more_irqs; - } - -/* Check whether we have an IRQ on one of the nested devices */ - for (ID = N_IRQ_ID-1 ; ID > (irq_ID_t)0; ID--) { - if (IRQ_NESTING_ID[ID] == (virq_id_t)idx) { - break; - } - } - -/* If we have a nested IRQ, load that state, discard the device 0 state */ - if (ID != IRQ0_ID) { - irq_status = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); -/* find the first irq bit on device "id" */ - for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { - if (irq_status & (1U << idx)) - break; - } - - if (idx == IRQ_N_CHANNEL[ID]) { - return hrt_isp_css_irq_status_error; - } - -/* Alternatively check whether there are more bits set on this device */ - if (irq_status != (1U << idx)) { - status = hrt_isp_css_irq_status_more_irqs; - } else { -/* If this device is empty, clear the state on device 0 */ - irq_reg_store(IRQ0_ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << IRQ_NESTING_ID[ID]); - } - } /* if (ID != IRQ0_ID) */ - -/* Here we proceed to clear the IRQ on detected device, if no nested IRQ, this is device 0 */ - irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); - - irq_wait_for_write_complete(ID); - - idx += IRQ_N_ID_OFFSET[ID]; - if (irq_id != NULL) - *irq_id = (virq_id_t)idx; - - return status; -} - -static inline void irq_wait_for_write_complete( - const irq_ID_t ID) -{ - assert(ID < N_IRQ_ID); - assert(IRQ_BASE[ID] != (hrt_address)-1); - (void)ia_css_device_load_uint32(IRQ_BASE[ID] + - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX*sizeof(hrt_data)); -} - -static inline bool any_irq_channel_enabled( - const irq_ID_t ID) -{ - hrt_data en_reg; - - assert(ID < N_IRQ_ID); - - en_reg = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); - - return (en_reg != 0); -} - -static inline irq_ID_t virq_get_irq_id( - const virq_id_t irq_ID, - unsigned int *channel_ID) -{ - irq_ID_t ID; - - assert(channel_ID != NULL); - - for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { - if (irq_ID < IRQ_N_ID_OFFSET[ID + 1]) { - break; - } - } - - *channel_ID = (unsigned int)irq_ID - IRQ_N_ID_OFFSET[ID]; - - return ID; -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h deleted file mode 100644 index f522dfd..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IRQ_LOCAL_H_INCLUDED__ -#define __IRQ_LOCAL_H_INCLUDED__ - -#include "irq_global.h" - -#include <irq_controller_defs.h> - -/* IRQ0_ID */ -#include "hive_isp_css_defs.h" -#define HIVE_GP_DEV_IRQ_NUM_IRQS 32 -/* IRQ1_ID */ -#include "input_formatter_subsystem_defs.h" -#define HIVE_IFMT_IRQ_NUM_IRQS 5 -/* IRQ2_ID */ -#include "input_system_defs.h" -/* IRQ3_ID */ -#include "input_selector_defs.h" - - -#define IRQ_ID_OFFSET 32 -#define IRQ0_ID_OFFSET 0 -#define IRQ1_ID_OFFSET IRQ_ID_OFFSET -#define IRQ2_ID_OFFSET (2*IRQ_ID_OFFSET) -#define IRQ3_ID_OFFSET (3*IRQ_ID_OFFSET) -#define IRQ_END_OFFSET (4*IRQ_ID_OFFSET) - -#define IRQ0_ID_N_CHANNEL HIVE_GP_DEV_IRQ_NUM_IRQS -#define IRQ1_ID_N_CHANNEL HIVE_IFMT_IRQ_NUM_IRQS -#define IRQ2_ID_N_CHANNEL HIVE_ISYS_IRQ_NUM_BITS -#define IRQ3_ID_N_CHANNEL HIVE_ISEL_IRQ_NUM_IRQS - -typedef struct virq_info_s virq_info_t; -typedef struct irq_controller_state_s irq_controller_state_t; - - -typedef enum { - virq_gpio_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, - virq_gpio_pin_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, - virq_gpio_pin_2 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, - virq_gpio_pin_3 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, - virq_gpio_pin_4 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, - virq_gpio_pin_5 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, - virq_gpio_pin_6 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, - virq_gpio_pin_7 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, - virq_gpio_pin_8 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, - virq_gpio_pin_9 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, - virq_gpio_pin_10 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, - virq_gpio_pin_11 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, - virq_sp = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_BIT_ID, - virq_isp = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_BIT_ID, - virq_isys = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISYS_BIT_ID, - virq_isel = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISEL_BIT_ID, - virq_ifmt = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_IFMT_BIT_ID, - virq_sp_stream_mon = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, - virq_isp_stream_mon = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, - virq_mod_stream_mon = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, -#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) - virq_isp_pmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, -#elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) - virq_isys_2401 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_IS2401_BIT_ID, -#else -#error "irq_local.h: 2400_SYSTEM must be one of {2400, 2401 }" -#endif - virq_isp_bamem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, - virq_isp_dmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, - virq_sp_icache_mem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, - virq_sp_dmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, - virq_mmu_cache_mem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, - virq_gp_timer_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, - virq_gp_timer_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, - virq_sw_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, - virq_sw_pin_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, - virq_dma = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_DMA_BIT_ID, - virq_sp_stream_mon_b = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, - - virq_ifmt0_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID, - virq_ifmt1_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID, - virq_ifmt2_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_IFT_SEC_BIT_ID, - virq_ifmt3_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_MEM_CPY_BIT_ID, - virq_ifmt_sideband_changed = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID, - - virq_isys_sof = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_SOF_BIT_ID, - virq_isys_eof = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_EOF_BIT_ID, - virq_isys_sol = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_SOL_BIT_ID, - virq_isys_eol = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_EOL_BIT_ID, - virq_isys_csi = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID, - virq_isys_csi_be = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID, - virq_isys_capt0_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP, - virq_isys_capt0_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP, - virq_isys_capt1_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP, - virq_isys_capt1_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP, - virq_isys_capt2_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP, - virq_isys_capt2_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP, - virq_isys_acq_sop_mismatch = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH, - virq_isys_ctrl_capt0 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPA, - virq_isys_ctrl_capt1 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPB, - virq_isys_ctrl_capt2 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPC, - virq_isys_cio_to_ahb = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CIO2AHB, - virq_isys_dma = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_DMA_BIT_ID, - virq_isys_fifo_monitor = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_STREAM_MON_BIT_ID, - - virq_isel_sof = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID, - virq_isel_eof = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID, - virq_isel_sol = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID, - virq_isel_eol = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID, - - N_virq_id = IRQ_END_OFFSET -} virq_id_t; - -struct virq_info_s { - hrt_data irq_status_reg[N_IRQ_ID]; -}; - -struct irq_controller_state_s { - unsigned int irq_edge; - unsigned int irq_mask; - unsigned int irq_status; - unsigned int irq_enable; - unsigned int irq_level_not_pulse; -}; - -#endif /* __IRQ_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h deleted file mode 100644 index 23a13ac..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IRQ_PRIVATE_H_INCLUDED__ -#define __IRQ_PRIVATE_H_INCLUDED__ - -#include "irq_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_IRQ_C void irq_reg_store( - const irq_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ - assert(ID < N_IRQ_ID); - assert(IRQ_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(IRQ_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_IRQ_C hrt_data irq_reg_load( - const irq_ID_t ID, - const unsigned int reg) -{ - assert(ID < N_IRQ_ID); - assert(IRQ_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(IRQ_BASE[ID] + reg*sizeof(hrt_data)); -} - -#endif /* __IRQ_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c deleted file mode 100644 index 531c932..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include <system_global.h> -#include "isp.h" - -#ifndef __INLINE_ISP__ -#include "isp_private.h" -#endif /* __INLINE_ISP__ */ - -#include "assert_support.h" -#include "platform_support.h" /* hrt_sleep() */ - -void cnd_isp_irq_enable( - const isp_ID_t ID, - const bool cnd) -{ - if (cnd) { - isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); -/* Enabling the IRQ immediately triggers an interrupt, clear it */ - isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); - } else { - isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, - ISP_IRQ_READY_BIT); - } - return; -} - -void isp_get_state( - const isp_ID_t ID, - isp_state_t *state, - isp_stall_t *stall) -{ - hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); - - assert(state != NULL); - assert(stall != NULL); - -#if defined(_hrt_sysmem_ident_address) - /* Patch to avoid compiler unused symbol warning in C_RUN build */ - (void)__hrt_sysmem_ident_address; - (void)_hrt_sysmem_map_var; -#endif - - state->pc = isp_ctrl_load(ID, ISP_PC_REG); - state->status_register = sc; - state->is_broken = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_BROKEN_BIT); - state->is_idle = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); - state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); - state->is_stalling = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_STALLING_BIT); - stall->stat_ctrl = - !isp_ctrl_getbit(ID, ISP_CTRL_SINK_REG, ISP_CTRL_SINK_BIT); - stall->pmem = - !isp_ctrl_getbit(ID, ISP_PMEM_SINK_REG, ISP_PMEM_SINK_BIT); - stall->dmem = - !isp_ctrl_getbit(ID, ISP_DMEM_SINK_REG, ISP_DMEM_SINK_BIT); - stall->vmem = - !isp_ctrl_getbit(ID, ISP_VMEM_SINK_REG, ISP_VMEM_SINK_BIT); - stall->fifo0 = - !isp_ctrl_getbit(ID, ISP_FIFO0_SINK_REG, ISP_FIFO0_SINK_BIT); - stall->fifo1 = - !isp_ctrl_getbit(ID, ISP_FIFO1_SINK_REG, ISP_FIFO1_SINK_BIT); - stall->fifo2 = - !isp_ctrl_getbit(ID, ISP_FIFO2_SINK_REG, ISP_FIFO2_SINK_BIT); - stall->fifo3 = - !isp_ctrl_getbit(ID, ISP_FIFO3_SINK_REG, ISP_FIFO3_SINK_BIT); - stall->fifo4 = - !isp_ctrl_getbit(ID, ISP_FIFO4_SINK_REG, ISP_FIFO4_SINK_BIT); - stall->fifo5 = - !isp_ctrl_getbit(ID, ISP_FIFO5_SINK_REG, ISP_FIFO5_SINK_BIT); - stall->fifo6 = - !isp_ctrl_getbit(ID, ISP_FIFO6_SINK_REG, ISP_FIFO6_SINK_BIT); - stall->vamem1 = - !isp_ctrl_getbit(ID, ISP_VAMEM1_SINK_REG, ISP_VAMEM1_SINK_BIT); - stall->vamem2 = - !isp_ctrl_getbit(ID, ISP_VAMEM2_SINK_REG, ISP_VAMEM2_SINK_BIT); - stall->vamem3 = - !isp_ctrl_getbit(ID, ISP_VAMEM3_SINK_REG, ISP_VAMEM3_SINK_BIT); - stall->hmem = - !isp_ctrl_getbit(ID, ISP_HMEM_SINK_REG, ISP_HMEM_SINK_BIT); -/* - stall->icache_master = - !isp_ctrl_getbit(ID, ISP_ICACHE_MT_SINK_REG, - ISP_ICACHE_MT_SINK_BIT); - */ - return; -} - -/* ISP functions to control the ISP state from the host, even in crun. */ - -/* Inspect readiness of an ISP indexed by ID */ -unsigned isp_is_ready(isp_ID_t ID) -{ - assert (ID < N_ISP_ID); - return isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); -} - -/* Inspect sleeping of an ISP indexed by ID */ -unsigned isp_is_sleeping(isp_ID_t ID) -{ - assert (ID < N_ISP_ID); - return isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); -} - -/* To be called by the host immediately before starting ISP ID. */ -void isp_start(isp_ID_t ID) -{ - assert (ID < N_ISP_ID); -} - -/* Wake up ISP ID. */ -void isp_wake(isp_ID_t ID) -{ - assert (ID < N_ISP_ID); - isp_ctrl_setbit(ID, ISP_SC_REG, ISP_START_BIT); - hrt_sleep(); -} - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h deleted file mode 100644 index 5dcc52d..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISP_LOCAL_H_INCLUDED__ -#define __ISP_LOCAL_H_INCLUDED__ - -#include <stdbool.h> - -#include "isp_global.h" - -#include <isp2400_support.h> - -#define HIVE_ISP_VMEM_MASK ((1U<<ISP_VMEM_ELEMBITS)-1) - -typedef struct isp_state_s isp_state_t; -typedef struct isp_stall_s isp_stall_t; - -struct isp_state_s { - int pc; - int status_register; - bool is_broken; - bool is_idle; - bool is_sleeping; - bool is_stalling; -}; - -struct isp_stall_s { - bool fifo0; - bool fifo1; - bool fifo2; - bool fifo3; - bool fifo4; - bool fifo5; - bool fifo6; - bool stat_ctrl; - bool dmem; - bool vmem; - bool vamem1; - bool vamem2; - bool vamem3; - bool hmem; - bool pmem; - bool icache_master; -}; - -#endif /* __ISP_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h deleted file mode 100644 index 7f63255..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISP_PRIVATE_H_INCLUDED__ -#define __ISP_PRIVATE_H_INCLUDED__ - -#ifdef HRT_MEMORY_ACCESS -#include <hrt/api.h> -#endif - -#include "isp_public.h" - -#include "device_access.h" - -#include "assert_support.h" -#include "type_support.h" - -STORAGE_CLASS_ISP_C void isp_ctrl_store( - const isp_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ - assert(ID < N_ISP_ID); - assert(ISP_CTRL_BASE[ID] != (hrt_address)-1); -#if !defined(HRT_MEMORY_ACCESS) - ia_css_device_store_uint32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -#else - hrt_master_port_store_32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -#endif - return; -} - -STORAGE_CLASS_ISP_C hrt_data isp_ctrl_load( - const isp_ID_t ID, - const unsigned int reg) -{ - assert(ID < N_ISP_ID); - assert(ISP_CTRL_BASE[ID] != (hrt_address)-1); -#if !defined(HRT_MEMORY_ACCESS) - return ia_css_device_load_uint32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -#else - return hrt_master_port_uload_32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -#endif -} - -STORAGE_CLASS_ISP_C bool isp_ctrl_getbit( - const isp_ID_t ID, - const unsigned int reg, - const unsigned int bit) -{ - hrt_data val = isp_ctrl_load(ID, reg); - return (val & (1UL << bit)) != 0; -} - -STORAGE_CLASS_ISP_C void isp_ctrl_setbit( - const isp_ID_t ID, - const unsigned int reg, - const unsigned int bit) -{ - hrt_data data = isp_ctrl_load(ID, reg); - isp_ctrl_store(ID, reg, (data | (1UL << bit))); - return; -} - -STORAGE_CLASS_ISP_C void isp_ctrl_clearbit( - const isp_ID_t ID, - const unsigned int reg, - const unsigned int bit) -{ - hrt_data data = isp_ctrl_load(ID, reg); - isp_ctrl_store(ID, reg, (data & ~(1UL << bit))); - return; -} - -STORAGE_CLASS_ISP_C void isp_dmem_store( - const isp_ID_t ID, - unsigned int addr, - const void *data, - const size_t size) -{ - assert(ID < N_ISP_ID); - assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); -#if !defined(HRT_MEMORY_ACCESS) - ia_css_device_store(ISP_DMEM_BASE[ID] + addr, data, size); -#else - hrt_master_port_store(ISP_DMEM_BASE[ID] + addr, data, size); -#endif - return; -} - -STORAGE_CLASS_ISP_C void isp_dmem_load( - const isp_ID_t ID, - const unsigned int addr, - void *data, - const size_t size) -{ - assert(ID < N_ISP_ID); - assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); -#if !defined(HRT_MEMORY_ACCESS) - ia_css_device_load(ISP_DMEM_BASE[ID] + addr, data, size); -#else - hrt_master_port_load(ISP_DMEM_BASE[ID] + addr, data, size); -#endif - return; -} - -STORAGE_CLASS_ISP_C void isp_dmem_store_uint32( - const isp_ID_t ID, - unsigned int addr, - const uint32_t data) -{ - assert(ID < N_ISP_ID); - assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; -#if !defined(HRT_MEMORY_ACCESS) - ia_css_device_store_uint32(ISP_DMEM_BASE[ID] + addr, data); -#else - hrt_master_port_store_32(ISP_DMEM_BASE[ID] + addr, data); -#endif - return; -} - -STORAGE_CLASS_ISP_C uint32_t isp_dmem_load_uint32( - const isp_ID_t ID, - const unsigned int addr) -{ - assert(ID < N_ISP_ID); - assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; -#if !defined(HRT_MEMORY_ACCESS) - return ia_css_device_load_uint32(ISP_DMEM_BASE[ID] + addr); -#else - return hrt_master_port_uload_32(ISP_DMEM_BASE[ID] + addr); -#endif -} - -STORAGE_CLASS_ISP_C uint32_t isp_2w_cat_1w( - const uint16_t x0, - const uint16_t x1) -{ - uint32_t out = ((uint32_t)(x1 & HIVE_ISP_VMEM_MASK) << ISP_VMEM_ELEMBITS) - | (x0 & HIVE_ISP_VMEM_MASK); - return out; -} - -#endif /* __ISP_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c deleted file mode 100644 index a28b67eb..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* The name "mmu.h is already taken" */ -#include "mmu_device.h" - -#ifndef __INLINE_MMU__ -#include "mmu_private.h" -#endif /* __INLINE_MMU__ */ - -void mmu_set_page_table_base_index( - const mmu_ID_t ID, - const hrt_data base_index) -{ - mmu_reg_store(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX, base_index); - return; -} - -hrt_data mmu_get_page_table_base_index( - const mmu_ID_t ID) -{ - return mmu_reg_load(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX); -} - -void mmu_invalidate_cache( - const mmu_ID_t ID) -{ - mmu_reg_store(ID, _HRT_MMU_INVALIDATE_TLB_REG_IDX, 1); - return; -} - -void mmu_invalidate_cache_all(void) -{ - mmu_ID_t mmu_id; - for (mmu_id = (mmu_ID_t)0;mmu_id < N_MMU_ID; mmu_id++) { - mmu_invalidate_cache(mmu_id); - } -} - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h deleted file mode 100644 index 7c3ad15..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __MMU_LOCAL_H_INCLUDED__ -#define __MMU_LOCAL_H_INCLUDED__ - -#include "mmu_global.h" - -#endif /* __MMU_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_private.h deleted file mode 100644 index 7377666..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_private.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __MMU_PRIVATE_H_INCLUDED__ -#define __MMU_PRIVATE_H_INCLUDED__ - -#include "mmu_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_MMU_H void mmu_reg_store( - const mmu_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ - assert(ID < N_MMU_ID); - assert(MMU_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(MMU_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_MMU_H hrt_data mmu_reg_load( - const mmu_ID_t ID, - const unsigned int reg) -{ - assert(ID < N_MMU_ID); - assert(MMU_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(MMU_BASE[ID] + reg*sizeof(hrt_data)); -} - -#endif /* __MMU_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c deleted file mode 100644 index db694d3..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "sp.h" - -#ifndef __INLINE_SP__ -#include "sp_private.h" -#endif /* __INLINE_SP__ */ - -#include "assert_support.h" - -void cnd_sp_irq_enable( - const sp_ID_t ID, - const bool cnd) -{ - if (cnd) { - sp_ctrl_setbit(ID, SP_IRQ_READY_REG, SP_IRQ_READY_BIT); -/* Enabling the IRQ immediately triggers an interrupt, clear it */ - sp_ctrl_setbit(ID, SP_IRQ_CLEAR_REG, SP_IRQ_CLEAR_BIT); - } else { - sp_ctrl_clearbit(ID, SP_IRQ_READY_REG, SP_IRQ_READY_BIT); - } -} - -void sp_get_state( - const sp_ID_t ID, - sp_state_t *state, - sp_stall_t *stall) -{ - hrt_data sc = sp_ctrl_load(ID, SP_SC_REG); - - assert(state != NULL); - assert(stall != NULL); - - state->pc = sp_ctrl_load(ID, SP_PC_REG); - state->status_register = sc; - state->is_broken = (sc & (1U << SP_BROKEN_BIT)) != 0; - state->is_idle = (sc & (1U << SP_IDLE_BIT)) != 0; - state->is_sleeping = (sc & (1U << SP_SLEEPING_BIT)) != 0; - state->is_stalling = (sc & (1U << SP_STALLING_BIT)) != 0; - stall->fifo0 = - !sp_ctrl_getbit(ID, SP_FIFO0_SINK_REG, SP_FIFO0_SINK_BIT); - stall->fifo1 = - !sp_ctrl_getbit(ID, SP_FIFO1_SINK_REG, SP_FIFO1_SINK_BIT); - stall->fifo2 = - !sp_ctrl_getbit(ID, SP_FIFO2_SINK_REG, SP_FIFO2_SINK_BIT); - stall->fifo3 = - !sp_ctrl_getbit(ID, SP_FIFO3_SINK_REG, SP_FIFO3_SINK_BIT); - stall->fifo4 = - !sp_ctrl_getbit(ID, SP_FIFO4_SINK_REG, SP_FIFO4_SINK_BIT); - stall->fifo5 = - !sp_ctrl_getbit(ID, SP_FIFO5_SINK_REG, SP_FIFO5_SINK_BIT); - stall->fifo6 = - !sp_ctrl_getbit(ID, SP_FIFO6_SINK_REG, SP_FIFO6_SINK_BIT); - stall->fifo7 = - !sp_ctrl_getbit(ID, SP_FIFO7_SINK_REG, SP_FIFO7_SINK_BIT); - stall->fifo8 = - !sp_ctrl_getbit(ID, SP_FIFO8_SINK_REG, SP_FIFO8_SINK_BIT); - stall->fifo9 = - !sp_ctrl_getbit(ID, SP_FIFO9_SINK_REG, SP_FIFO9_SINK_BIT); - stall->fifoa = - !sp_ctrl_getbit(ID, SP_FIFOA_SINK_REG, SP_FIFOA_SINK_BIT); - stall->dmem = - !sp_ctrl_getbit(ID, SP_DMEM_SINK_REG, SP_DMEM_SINK_BIT); - stall->control_master = - !sp_ctrl_getbit(ID, SP_CTRL_MT_SINK_REG, SP_CTRL_MT_SINK_BIT); - stall->icache_master = - !sp_ctrl_getbit(ID, SP_ICACHE_MT_SINK_REG, - SP_ICACHE_MT_SINK_BIT); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h deleted file mode 100644 index 3c70b8f..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __SP_LOCAL_H_INCLUDED__ -#define __SP_LOCAL_H_INCLUDED__ - -#include <type_support.h> -#include "sp_global.h" - -struct sp_state_s { - int pc; - int status_register; - bool is_broken; - bool is_idle; - bool is_sleeping; - bool is_stalling; -}; - -struct sp_stall_s { - bool fifo0; - bool fifo1; - bool fifo2; - bool fifo3; - bool fifo4; - bool fifo5; - bool fifo6; - bool fifo7; - bool fifo8; - bool fifo9; - bool fifoa; - bool dmem; - bool control_master; - bool icache_master; -}; - -#define sp_address_of(var) (HIVE_ADDR_ ## var) - -/* - * deprecated - */ -#define store_sp_int(var, value) \ - sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(var), \ - (uint32_t)(value)) - -#define store_sp_ptr(var, value) \ - sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(var), \ - (uint32_t)(value)) - -#define load_sp_uint(var) \ - sp_dmem_load_uint32(SP0_ID, (unsigned)sp_address_of(var)) - -#define load_sp_array_uint8(array_name, index) \ - sp_dmem_load_uint8(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint8_t)) - -#define load_sp_array_uint16(array_name, index) \ - sp_dmem_load_uint16(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint16_t)) - -#define load_sp_array_uint(array_name, index) \ - sp_dmem_load_uint32(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint32_t)) - -#define store_sp_var(var, data, bytes) \ - sp_dmem_store(SP0_ID, (unsigned)sp_address_of(var), data, bytes) - -#define store_sp_array_uint8(array_name, index, value) \ - sp_dmem_store_uint8(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint8_t), value) - -#define store_sp_array_uint16(array_name, index, value) \ - sp_dmem_store_uint16(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint16_t), value) - -#define store_sp_array_uint(array_name, index, value) \ - sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint32_t), value) - -#define store_sp_var_with_offset(var, offset, data, bytes) \ - sp_dmem_store(SP0_ID, (unsigned)sp_address_of(var) + \ - offset, data, bytes) - -#define load_sp_var(var, data, bytes) \ - sp_dmem_load(SP0_ID, (unsigned)sp_address_of(var), data, bytes) - -#define load_sp_var_with_offset(var, offset, data, bytes) \ - sp_dmem_load(SP0_ID, (unsigned)sp_address_of(var) + offset, \ - data, bytes) - -#endif /* __SP_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h deleted file mode 100644 index 5ea81c0..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __SP_PRIVATE_H_INCLUDED__ -#define __SP_PRIVATE_H_INCLUDED__ - -#include "sp_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_SP_C void sp_ctrl_store( - const sp_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_SP_ID); - assert(SP_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); - return; -} - -STORAGE_CLASS_SP_C hrt_data sp_ctrl_load( - const sp_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_SP_ID); - assert(SP_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -} - -STORAGE_CLASS_SP_C bool sp_ctrl_getbit( - const sp_ID_t ID, - const hrt_address reg, - const unsigned int bit) -{ - hrt_data val = sp_ctrl_load(ID, reg); - return (val & (1UL << bit)) != 0; -} - -STORAGE_CLASS_SP_C void sp_ctrl_setbit( - const sp_ID_t ID, - const hrt_address reg, - const unsigned int bit) -{ - hrt_data data = sp_ctrl_load(ID, reg); - sp_ctrl_store(ID, reg, (data | (1UL << bit))); - return; -} - -STORAGE_CLASS_SP_C void sp_ctrl_clearbit( - const sp_ID_t ID, - const hrt_address reg, - const unsigned int bit) -{ - hrt_data data = sp_ctrl_load(ID, reg); - sp_ctrl_store(ID, reg, (data & ~(1UL << bit))); - return; -} - -STORAGE_CLASS_SP_C void sp_dmem_store( - const sp_ID_t ID, - hrt_address addr, - const void *data, - const size_t size) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - ia_css_device_store(SP_DMEM_BASE[ID] + addr, data, size); - return; -} - -STORAGE_CLASS_SP_C void sp_dmem_load( - const sp_ID_t ID, - const hrt_address addr, - void *data, - const size_t size) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - ia_css_device_load(SP_DMEM_BASE[ID] + addr, data, size); - return; -} - -STORAGE_CLASS_SP_C void sp_dmem_store_uint8( - const sp_ID_t ID, - hrt_address addr, - const uint8_t data) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; - ia_css_device_store_uint8(SP_DMEM_BASE[SP0_ID] + addr, data); - return; -} - -STORAGE_CLASS_SP_C void sp_dmem_store_uint16( - const sp_ID_t ID, - hrt_address addr, - const uint16_t data) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; - ia_css_device_store_uint16(SP_DMEM_BASE[SP0_ID] + addr, data); - return; -} - -STORAGE_CLASS_SP_C void sp_dmem_store_uint32( - const sp_ID_t ID, - hrt_address addr, - const uint32_t data) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; - ia_css_device_store_uint32(SP_DMEM_BASE[SP0_ID] + addr, data); - return; -} - -STORAGE_CLASS_SP_C uint8_t sp_dmem_load_uint8( - const sp_ID_t ID, - const hrt_address addr) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; - return ia_css_device_load_uint8(SP_DMEM_BASE[SP0_ID] + addr); -} - -STORAGE_CLASS_SP_C uint16_t sp_dmem_load_uint16( - const sp_ID_t ID, - const hrt_address addr) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; - return ia_css_device_load_uint16(SP_DMEM_BASE[SP0_ID] + addr); -} - -STORAGE_CLASS_SP_C uint32_t sp_dmem_load_uint32( - const sp_ID_t ID, - const hrt_address addr) -{ - assert(ID < N_SP_ID); - assert(SP_DMEM_BASE[ID] != (hrt_address)-1); - (void)ID; - return ia_css_device_load_uint32(SP_DMEM_BASE[SP0_ID] + addr); -} - -#endif /* __SP_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h deleted file mode 100644 index 111b346..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h +++ /dev/null @@ -1,306 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __SYSTEM_LOCAL_H_INCLUDED__ -#define __SYSTEM_LOCAL_H_INCLUDED__ - -#ifdef HRT_ISP_CSS_CUSTOM_HOST -#ifndef HRT_USE_VIR_ADDRS -#define HRT_USE_VIR_ADDRS -#endif -/* This interface is deprecated */ -/*#include "hive_isp_css_custom_host_hrt.h"*/ -#endif - -#include "system_global.h" - -#ifdef __FIST__ -#define HRT_ADDRESS_WIDTH 32 /* Surprise, this is a local property and even differs per platform */ -#else -/* HRT assumes 32 by default (see Linux/include/hrt/hive_types.h), overrule it in case it is different */ -#undef HRT_ADDRESS_WIDTH -#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ -#endif - -#if !defined(__KERNEL__) || (1==1) -/* This interface is deprecated */ -#include "hrt/hive_types.h" -#else /* __KERNEL__ */ -#include <linux/types.h> - -#if HRT_ADDRESS_WIDTH==64 -typedef uint64_t hrt_address; -#elif HRT_ADDRESS_WIDTH==32 -typedef uint32_t hrt_address; -#else -#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" -#endif - -typedef uint32_t hrt_vaddress; -typedef uint32_t hrt_data; -#endif /* __KERNEL__ */ - -/* - * Cell specific address maps - */ -#if HRT_ADDRESS_WIDTH==64 - -#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */ - -/* DDR */ -static const hrt_address DDR_BASE[N_DDR_ID] = { - (hrt_address)0x0000000120000000ULL}; - -/* ISP */ -static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - (hrt_address)0x0000000000020000ULL}; - -static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - (hrt_address)0x0000000000200000ULL}; - -static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - (hrt_address)0x0000000000100000ULL}; - -static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { - (hrt_address)0x00000000001C0000ULL, - (hrt_address)0x00000000001D0000ULL, - (hrt_address)0x00000000001E0000ULL}; - -static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - (hrt_address)0x00000000001F0000ULL}; - -/* SP */ -static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - (hrt_address)0x0000000000010000ULL}; - -static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - (hrt_address)0x0000000000300000ULL}; - -static const hrt_address SP_PMEM_BASE[N_SP_ID] = { - (hrt_address)0x00000000000B0000ULL}; - -/* MMU */ -#if defined (IS_ISP_2400_MAMOIADA_SYSTEM) || defined (IS_ISP_2401_MAMOIADA_SYSTEM) -/* - * MMU0_ID: The data MMU - * MMU1_ID: The icache MMU - */ -static const hrt_address MMU_BASE[N_MMU_ID] = { - (hrt_address)0x0000000000070000ULL, - (hrt_address)0x00000000000A0000ULL}; -#else -#error "system_local.h: SYSTEM must be one of {2400, 2401 }" -#endif - -/* DMA */ -static const hrt_address DMA_BASE[N_DMA_ID] = { - (hrt_address)0x0000000000040000ULL}; - -/* IRQ */ -static const hrt_address IRQ_BASE[N_IRQ_ID] = { - (hrt_address)0x0000000000000500ULL, - (hrt_address)0x0000000000030A00ULL, - (hrt_address)0x000000000008C000ULL, - (hrt_address)0x0000000000090200ULL}; -/* - (hrt_address)0x0000000000000500ULL}; - */ - -/* GDC */ -static const hrt_address GDC_BASE[N_GDC_ID] = { - (hrt_address)0x0000000000050000ULL, - (hrt_address)0x0000000000060000ULL}; - -/* FIFO_MONITOR (not a subset of GP_DEVICE) */ -static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - (hrt_address)0x0000000000000000ULL}; - -/* -static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { - (hrt_address)0x0000000000000000ULL}; - -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - (hrt_address)0x0000000000090000ULL}; -*/ - -/* GP_DEVICE (single base for all separate GP_REG instances) */ -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - (hrt_address)0x0000000000000000ULL}; - -/*GP TIMER , all timer registers are inter-twined, - * so, having multiple base addresses for - * different timers does not help*/ -static const hrt_address GP_TIMER_BASE = - (hrt_address)0x0000000000000600ULL; -/* GPIO */ -static const hrt_address GPIO_BASE[N_GPIO_ID] = { - (hrt_address)0x0000000000000400ULL}; - -/* TIMED_CTRL */ -static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - (hrt_address)0x0000000000000100ULL}; - - -/* INPUT_FORMATTER */ -static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { - (hrt_address)0x0000000000030000ULL, - (hrt_address)0x0000000000030200ULL, - (hrt_address)0x0000000000030400ULL, - (hrt_address)0x0000000000030600ULL}; /* memcpy() */ - -/* INPUT_SYSTEM */ -static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - (hrt_address)0x0000000000080000ULL}; -/* (hrt_address)0x0000000000081000ULL, */ /* capture A */ -/* (hrt_address)0x0000000000082000ULL, */ /* capture B */ -/* (hrt_address)0x0000000000083000ULL, */ /* capture C */ -/* (hrt_address)0x0000000000084000ULL, */ /* Acquisition */ -/* (hrt_address)0x0000000000085000ULL, */ /* DMA */ -/* (hrt_address)0x0000000000089000ULL, */ /* ctrl */ -/* (hrt_address)0x000000000008A000ULL, */ /* GP regs */ -/* (hrt_address)0x000000000008B000ULL, */ /* FIFO */ -/* (hrt_address)0x000000000008C000ULL, */ /* IRQ */ - -/* RX, the MIPI lane control regs start at offset 0 */ -static const hrt_address RX_BASE[N_RX_ID] = { - (hrt_address)0x0000000000080100ULL}; - -#elif HRT_ADDRESS_WIDTH==32 - -#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */ - -/* DDR : Attention, this value not defined in 32-bit */ -static const hrt_address DDR_BASE[N_DDR_ID] = { - (hrt_address)0x00000000UL}; - -/* ISP */ -static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - (hrt_address)0x00020000UL}; - -static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - (hrt_address)0x00200000UL}; - -static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - (hrt_address)0x100000UL}; - -static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { - (hrt_address)0xffffffffUL, - (hrt_address)0xffffffffUL, - (hrt_address)0xffffffffUL}; - -static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - (hrt_address)0xffffffffUL}; - -/* SP */ -static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - (hrt_address)0x00010000UL}; - -static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - (hrt_address)0x00300000UL}; - -static const hrt_address SP_PMEM_BASE[N_SP_ID] = { - (hrt_address)0x000B0000UL}; - -/* MMU */ -#if defined (IS_ISP_2400_MAMOIADA_SYSTEM) || defined (IS_ISP_2401_MAMOIADA_SYSTEM) -/* - * MMU0_ID: The data MMU - * MMU1_ID: The icache MMU - */ -static const hrt_address MMU_BASE[N_MMU_ID] = { - (hrt_address)0x00070000UL, - (hrt_address)0x000A0000UL}; -#else -#error "system_local.h: SYSTEM must be one of {2400, 2401 }" -#endif - -/* DMA */ -static const hrt_address DMA_BASE[N_DMA_ID] = { - (hrt_address)0x00040000UL}; - -/* IRQ */ -static const hrt_address IRQ_BASE[N_IRQ_ID] = { - (hrt_address)0x00000500UL, - (hrt_address)0x00030A00UL, - (hrt_address)0x0008C000UL, - (hrt_address)0x00090200UL}; -/* - (hrt_address)0x00000500UL}; - */ - -/* GDC */ -static const hrt_address GDC_BASE[N_GDC_ID] = { - (hrt_address)0x00050000UL, - (hrt_address)0x00060000UL}; - -/* FIFO_MONITOR (not a subset of GP_DEVICE) */ -static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - (hrt_address)0x00000000UL}; - -/* -static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { - (hrt_address)0x00000000UL}; - -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - (hrt_address)0x00090000UL}; -*/ - -/* GP_DEVICE (single base for all separate GP_REG instances) */ -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - (hrt_address)0x00000000UL}; - -/*GP TIMER , all timer registers are inter-twined, - * so, having multiple base addresses for - * different timers does not help*/ -static const hrt_address GP_TIMER_BASE = - (hrt_address)0x00000600UL; - -/* GPIO */ -static const hrt_address GPIO_BASE[N_GPIO_ID] = { - (hrt_address)0x00000400UL}; - -/* TIMED_CTRL */ -static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - (hrt_address)0x00000100UL}; - - -/* INPUT_FORMATTER */ -static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { - (hrt_address)0x00030000UL, - (hrt_address)0x00030200UL, - (hrt_address)0x00030400UL}; -/* (hrt_address)0x00030600UL, */ /* memcpy() */ - -/* INPUT_SYSTEM */ -static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - (hrt_address)0x00080000UL}; -/* (hrt_address)0x00081000UL, */ /* capture A */ -/* (hrt_address)0x00082000UL, */ /* capture B */ -/* (hrt_address)0x00083000UL, */ /* capture C */ -/* (hrt_address)0x00084000UL, */ /* Acquisition */ -/* (hrt_address)0x00085000UL, */ /* DMA */ -/* (hrt_address)0x00089000UL, */ /* ctrl */ -/* (hrt_address)0x0008A000UL, */ /* GP regs */ -/* (hrt_address)0x0008B000UL, */ /* FIFO */ -/* (hrt_address)0x0008C000UL, */ /* IRQ */ - -/* RX, the MIPI lane control regs start at offset 0 */ -static const hrt_address RX_BASE[N_RX_ID] = { - (hrt_address)0x00080100UL}; - -#else -#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" -#endif - -#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c deleted file mode 100644 index cd12d74..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "timed_ctrl.h" - -#ifndef __INLINE_TIMED_CTRL__ -#include "timed_ctrl_private.h" -#endif /* __INLINE_TIMED_CTRL__ */ - -#include "assert_support.h" - -void timed_ctrl_snd_commnd( - const timed_ctrl_ID_t ID, - hrt_data mask, - hrt_data condition, - hrt_data counter, - hrt_address addr, - hrt_data value) -{ - OP___assert(ID == TIMED_CTRL0_ID); - OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); - - timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, mask); - timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, condition); - timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, counter); - timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, (hrt_data)addr); - timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, value); -} - -/* pqiao TODO: make sure the following commands get - correct BASE address both for csim and android */ - -void timed_ctrl_snd_sp_commnd( - const timed_ctrl_ID_t ID, - hrt_data mask, - hrt_data condition, - hrt_data counter, - const sp_ID_t SP_ID, - hrt_address offset, - hrt_data value) -{ - OP___assert(SP_ID < N_SP_ID); - OP___assert(SP_DMEM_BASE[SP_ID] != (hrt_address)-1); - - timed_ctrl_snd_commnd(ID, mask, condition, counter, - SP_DMEM_BASE[SP_ID]+offset, value); -} - -void timed_ctrl_snd_gpio_commnd( - const timed_ctrl_ID_t ID, - hrt_data mask, - hrt_data condition, - hrt_data counter, - const gpio_ID_t GPIO_ID, - hrt_address offset, - hrt_data value) -{ - OP___assert(GPIO_ID < N_GPIO_ID); - OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1); - - timed_ctrl_snd_commnd(ID, mask, condition, counter, - GPIO_BASE[GPIO_ID]+offset, value); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h deleted file mode 100644 index e570813..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __TIMED_CTRL_LOCAL_H_INCLUDED__ -#define __TIMED_CTRL_LOCAL_H_INCLUDED__ - -#include "timed_ctrl_global.h" - -#endif /* __TIMED_CTRL_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h deleted file mode 100644 index fb0fdbb..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __TIMED_CTRL_PRIVATE_H_INCLUDED__ -#define __TIMED_CTRL_PRIVATE_H_INCLUDED__ - -#include "timed_ctrl_public.h" - -#include "device_access.h" - -#include "assert_support.h" - -STORAGE_CLASS_TIMED_CTRL_C void timed_ctrl_reg_store( - const timed_ctrl_ID_t ID, - const unsigned int reg, - const hrt_data value) -{ -OP___assert(ID < N_TIMED_CTRL_ID); -OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(TIMED_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -} - -#endif /* __GP_DEVICE_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h deleted file mode 100644 index c4e99af..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __VAMEM_LOCAL_H_INCLUDED__ -#define __VAMEM_LOCAL_H_INCLUDED__ - -#include "vamem_global.h" - -#endif /* __VAMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h deleted file mode 100644 index 5e05258..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __VAMEM_PRIVATE_H_INCLUDED__ -#define __VAMEM_PRIVATE_H_INCLUDED__ - -#include "vamem_public.h" - -#include <hrt/api.h> - -#include "assert_support.h" - - -STORAGE_CLASS_ISP_C void isp_vamem_store( - const vamem_ID_t ID, - vamem_data_t *addr, - const vamem_data_t *data, - const size_t size) /* in vamem_data_t */ -{ - assert(ID < N_VAMEM_ID); - assert(ISP_VAMEM_BASE[ID] != (hrt_address)-1); - hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned)addr, data, size * sizeof(vamem_data_t)); -} - - -#endif /* __VAMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c deleted file mode 100644 index ea22c23..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c +++ /dev/null @@ -1,258 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010 - 2016, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "isp.h" -#include "vmem.h" -#include "vmem_local.h" - -#if !defined(HRT_MEMORY_ACCESS) -#include "ia_css_device_access.h" -#endif -#include "assert_support.h" -#include "platform_support.h" /* hrt_sleep() */ - -typedef unsigned long long hive_uedge; -typedef hive_uedge *hive_wide; - -/* Copied from SDK: sim_semantics.c */ - -/* subword bits move like this: MSB[____xxxx____]LSB -> MSB[00000000xxxx]LSB */ -#define SUBWORD(w, start, end) (((w) & (((1ULL << ((end)-1))-1) << 1 | 1)) >> (start)) - -/* inverse subword bits move like this: MSB[xxxx____xxxx]LSB -> MSB[xxxx0000xxxx]LSB */ -#define INV_SUBWORD(w, start, end) ((w) & (~(((1ULL << ((end)-1))-1) << 1 | 1) | ((1ULL << (start))-1)) ) - -#define uedge_bits (8*sizeof(hive_uedge)) -#define move_lower_bits(target, target_bit, src, src_bit) move_subword(target, target_bit, src, 0, src_bit) -#define move_upper_bits(target, target_bit, src, src_bit) move_subword(target, target_bit, src, src_bit, uedge_bits) -#define move_word(target, target_bit, src) move_subword(target, target_bit, src, 0, uedge_bits) - -static void -move_subword ( - hive_uedge *target, - unsigned target_bit, - hive_uedge src, - unsigned src_start, - unsigned src_end) -{ - unsigned int start_elem = target_bit / uedge_bits; - unsigned int start_bit = target_bit % uedge_bits; - unsigned subword_width = src_end - src_start; - - hive_uedge src_subword = SUBWORD(src, src_start, src_end); - - if (subword_width + start_bit > uedge_bits) { /* overlap */ - hive_uedge old_val1; - hive_uedge old_val0 = INV_SUBWORD(target[start_elem], start_bit, uedge_bits); - target[start_elem] = old_val0 | (src_subword << start_bit); - old_val1 = INV_SUBWORD(target[start_elem+1], 0, subword_width + start_bit - uedge_bits); - target[start_elem+1] = old_val1 | (src_subword >> ( uedge_bits - start_bit)); - } else { - hive_uedge old_val = INV_SUBWORD(target[start_elem], start_bit, start_bit + subword_width); - target[start_elem] = old_val | (src_subword << start_bit); - } -} - -static void -hive_sim_wide_unpack( - hive_wide vector, - hive_wide elem, - hive_uint elem_bits, - hive_uint index) -{ - /* pointers into wide_type: */ - unsigned int start_elem = (elem_bits * index) / uedge_bits; - unsigned int start_bit = (elem_bits * index) % uedge_bits; - unsigned int end_elem = (elem_bits * (index + 1) - 1) / uedge_bits; - unsigned int end_bit = ((elem_bits * (index + 1) - 1) % uedge_bits) + 1; - - if (elem_bits == uedge_bits) { - /* easy case for speedup: */ - elem[0] = vector[index]; - } else if (start_elem == end_elem) { - /* only one (<=64 bits) element needs to be (partly) copied: */ - move_subword(elem, 0, vector[start_elem], start_bit, end_bit); - } else { - /* general case: handles edge spanning cases (includes >64bit elements) */ - unsigned int bits_written = 0; - unsigned int i; - move_upper_bits(elem, bits_written, vector[start_elem], start_bit); - bits_written += (64 - start_bit); - for(i = start_elem+1; i < end_elem; i++) { - move_word(elem, bits_written, vector[i]); - bits_written += uedge_bits; - } - move_lower_bits(elem, bits_written , vector[end_elem], end_bit); - } -} - -static void -hive_sim_wide_pack( - hive_wide vector, - hive_wide elem, - hive_uint elem_bits, - hive_uint index) -{ - /* pointers into wide_type: */ - unsigned int start_elem = (elem_bits * index) / uedge_bits; - - /* easy case for speedup: */ - if (elem_bits == uedge_bits) { - vector[start_elem] = elem[0]; - } else if (elem_bits > uedge_bits) { - unsigned bits_to_write = elem_bits; - unsigned start_bit = elem_bits * index; - unsigned i = 0; - for(; bits_to_write > uedge_bits; bits_to_write -= uedge_bits, i++, start_bit += uedge_bits) { - move_word(vector, start_bit, elem[i]); - } - move_lower_bits(vector, start_bit, elem[i], bits_to_write); - } else { - /* only one element needs to be (partly) copied: */ - move_lower_bits(vector, elem_bits * index, elem[0], elem_bits); - } -} - -static void load_vector ( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from) -{ - unsigned i; - hive_uedge *data; - unsigned size = sizeof(short)*ISP_NWAY; - VMEM_ARRAY(v, 2*ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ - assert(ISP_BAMEM_BASE[ID] != (hrt_address)-1); -#if !defined(HRT_MEMORY_ACCESS) - ia_css_device_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); -#else - hrt_master_port_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); -#endif - data = (hive_uedge *)v; - for (i = 0; i < ISP_NWAY; i++) { - hive_uedge elem = 0; - hive_sim_wide_unpack(data, &elem, ISP_VEC_ELEMBITS, i); - to[i] = elem; - } - hrt_sleep(); /* Spend at least 1 cycles per vector */ -} - -static void store_vector ( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from) -{ - unsigned i; - unsigned size = sizeof(short)*ISP_NWAY; - VMEM_ARRAY(v, 2*ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ - //load_vector (&v[1][0], &to[ISP_NWAY]); /* Fetch the next vector, since it will be overwritten. */ - hive_uedge *data = (hive_uedge *)v; - for (i = 0; i < ISP_NWAY; i++) { - hive_sim_wide_pack(data, (hive_wide)&from[i], ISP_VEC_ELEMBITS, i); - } - assert(ISP_BAMEM_BASE[ID] != (hrt_address)-1); -#if !defined(HRT_MEMORY_ACCESS) - ia_css_device_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); -#else - //hrt_mem_store (ISP, VMEM, (unsigned)to, &v, siz); /* This will overwrite the next vector as well */ - hrt_master_port_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); -#endif - hrt_sleep(); /* Spend at least 1 cycles per vector */ -} - -void isp_vmem_load( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned elems) /* In t_vmem_elem */ -{ - unsigned c; - const t_vmem_elem *vp = from; - assert(ID < N_ISP_ID); - assert((unsigned long)from % ISP_VEC_ALIGN == 0); - assert(elems % ISP_NWAY == 0); - for (c = 0; c < elems; c += ISP_NWAY) { - load_vector(ID, &to[c], vp); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); - } -} - -void isp_vmem_store( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned elems) /* In t_vmem_elem */ -{ - unsigned c; - t_vmem_elem *vp = to; - assert(ID < N_ISP_ID); - assert((unsigned long)to % ISP_VEC_ALIGN == 0); - assert(elems % ISP_NWAY == 0); - for (c = 0; c < elems; c += ISP_NWAY) { - store_vector (ID, vp, &from[c]); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); - } -} - -void isp_vmem_2d_load ( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ - unsigned stride_from /* In t_vmem_elem */) -{ - unsigned h; - - assert(ID < N_ISP_ID); - assert((unsigned long)from % ISP_VEC_ALIGN == 0); - assert(width % ISP_NWAY == 0); - assert(stride_from % ISP_NWAY == 0); - for (h = 0; h < height; h++) { - unsigned c; - const t_vmem_elem *vp = from; - for (c = 0; c < width; c += ISP_NWAY) { - load_vector(ID, &to[stride_to*h + c], vp); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); - } - from = (const t_vmem_elem *)((const char *)from + stride_from/ISP_NWAY*ISP_VEC_ALIGN); - } -} - -void isp_vmem_2d_store ( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ - unsigned stride_from /* In t_vmem_elem */) -{ - unsigned h; - - assert(ID < N_ISP_ID); - assert((unsigned long)to % ISP_VEC_ALIGN == 0); - assert(width % ISP_NWAY == 0); - assert(stride_to % ISP_NWAY == 0); - for (h = 0; h < height; h++) { - unsigned c; - t_vmem_elem *vp = to; - for (c = 0; c < width; c += ISP_NWAY) { - store_vector (ID, vp, &from[stride_from*h + c]); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); - } - to = (t_vmem_elem *)((char *)to + stride_to/ISP_NWAY*ISP_VEC_ALIGN); - } -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h deleted file mode 100644 index de85644b..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __VMEM_LOCAL_H_INCLUDED__ -#define __VMEM_LOCAL_H_INCLUDED__ - -#include "type_support.h" -#include "vmem_global.h" - -typedef uint16_t t_vmem_elem; - -#define VMEM_ARRAY(x,s) t_vmem_elem x[s/ISP_NWAY][ISP_NWAY] - -void isp_vmem_load( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned elems); /* In t_vmem_elem */ - -void isp_vmem_store( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned elems); /* In t_vmem_elem */ - -void isp_vmem_2d_load ( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ - unsigned stride_from /* In t_vmem_elem */); - -void isp_vmem_2d_store ( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ - unsigned stride_from /* In t_vmem_elem */); - -#endif /* __VMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h deleted file mode 100644 index f48d128..0000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __VMEM_PRIVATE_H_INCLUDED__ -#define __VMEM_PRIVATE_H_INCLUDED__ - -#include "vmem_public.h" - -#endif /* __VMEM_PRIVATE_H_INCLUDED__ */ |
