diff options
Diffstat (limited to 'drivers/staging/iio/adc')
-rw-r--r-- | drivers/staging/iio/adc/Kconfig | 22 | ||||
-rw-r--r-- | drivers/staging/iio/adc/Makefile | 2 | ||||
-rw-r--r-- | drivers/staging/iio/adc/ad7192.c | 20 | ||||
-rw-r--r-- | drivers/staging/iio/adc/ad7280a.c | 34 | ||||
-rw-r--r-- | drivers/staging/iio/adc/ad7606.c | 9 | ||||
-rw-r--r-- | drivers/staging/iio/adc/ad7606.h | 3 | ||||
-rw-r--r-- | drivers/staging/iio/adc/ad7780.c | 2 | ||||
-rw-r--r-- | drivers/staging/iio/adc/lpc32xx_adc.c | 215 | ||||
-rw-r--r-- | drivers/staging/iio/adc/spear_adc.c | 395 |
9 files changed, 37 insertions, 665 deletions
diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig index deff899..e17efb0 100644 --- a/drivers/staging/iio/adc/Kconfig +++ b/drivers/staging/iio/adc/Kconfig @@ -80,26 +80,4 @@ config AD7280 To compile this driver as a module, choose M here: the module will be called ad7280a -config LPC32XX_ADC - tristate "NXP LPC32XX ADC" - depends on ARCH_LPC32XX || COMPILE_TEST - depends on HAS_IOMEM - help - Say yes here to build support for the integrated ADC inside the - LPC32XX SoC. Note that this feature uses the same hardware as the - touchscreen driver, so you should either select only one of the two - drivers (lpc32xx_adc or lpc32xx_ts) or, in the OpenFirmware case, - activate only one via device tree selection. Provides direct access - via sysfs. - -config SPEAR_ADC - tristate "ST SPEAr ADC" - depends on PLAT_SPEAR || COMPILE_TEST - depends on HAS_IOMEM - help - Say yes here to build support for the integrated ADC inside the - ST SPEAr SoC. Provides direct access via sysfs. - - To compile this driver as a module, choose M here: the - module will be called spear_adc. endmenu diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile index ac09485..bf18bdd 100644 --- a/drivers/staging/iio/adc/Makefile +++ b/drivers/staging/iio/adc/Makefile @@ -10,5 +10,3 @@ obj-$(CONFIG_AD7780) += ad7780.o obj-$(CONFIG_AD7816) += ad7816.o obj-$(CONFIG_AD7192) += ad7192.o obj-$(CONFIG_AD7280) += ad7280a.o -obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o -obj-$(CONFIG_SPEAR_ADC) += spear_adc.o diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c index 1fb68c0..d11c6de 100644 --- a/drivers/staging/iio/adc/ad7192.c +++ b/drivers/staging/iio/adc/ad7192.c @@ -342,9 +342,9 @@ ad7192_show_scale_available(struct device *dev, static IIO_DEVICE_ATTR_NAMED(in_v_m_v_scale_available, in_voltage-voltage_scale_available, - S_IRUGO, ad7192_show_scale_available, NULL, 0); + 0444, ad7192_show_scale_available, NULL, 0); -static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO, +static IIO_DEVICE_ATTR(in_voltage_scale_available, 0444, ad7192_show_scale_available, NULL, 0); static ssize_t ad7192_show_ac_excitation(struct device *dev, @@ -412,11 +412,11 @@ static ssize_t ad7192_set(struct device *dev, return ret ? ret : len; } -static IIO_DEVICE_ATTR(bridge_switch_en, S_IRUGO | S_IWUSR, +static IIO_DEVICE_ATTR(bridge_switch_en, 0644, ad7192_show_bridge_switch, ad7192_set, AD7192_REG_GPOCON); -static IIO_DEVICE_ATTR(ac_excitation_en, S_IRUGO | S_IWUSR, +static IIO_DEVICE_ATTR(ac_excitation_en, 0644, ad7192_show_ac_excitation, ad7192_set, AD7192_REG_MODE); @@ -564,18 +564,18 @@ static int ad7192_write_raw_get_fmt(struct iio_dev *indio_dev, } static const struct iio_info ad7192_info = { - .read_raw = &ad7192_read_raw, - .write_raw = &ad7192_write_raw, - .write_raw_get_fmt = &ad7192_write_raw_get_fmt, + .read_raw = ad7192_read_raw, + .write_raw = ad7192_write_raw, + .write_raw_get_fmt = ad7192_write_raw_get_fmt, .attrs = &ad7192_attribute_group, .validate_trigger = ad_sd_validate_trigger, .driver_module = THIS_MODULE, }; static const struct iio_info ad7195_info = { - .read_raw = &ad7192_read_raw, - .write_raw = &ad7192_write_raw, - .write_raw_get_fmt = &ad7192_write_raw_get_fmt, + .read_raw = ad7192_read_raw, + .write_raw = ad7192_write_raw, + .write_raw_get_fmt = ad7192_write_raw_get_fmt, .attrs = &ad7195_attribute_group, .validate_trigger = ad_sd_validate_trigger, .driver_module = THIS_MODULE, diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index ee679ac..d5ab83f 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -134,6 +134,7 @@ struct ad7280_state { unsigned char aux_threshhigh; unsigned char aux_threshlow; unsigned char cb_mask[AD7280A_MAX_CHAIN]; + struct mutex lock; /* protect sensor state */ __be32 buf[2] ____cacheline_aligned; }; @@ -410,7 +411,7 @@ static ssize_t ad7280_store_balance_sw(struct device *dev, devaddr = this_attr->address >> 8; ch = this_attr->address & 0xFF; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if (readin) st->cb_mask[devaddr] |= 1 << (ch + 2); else @@ -418,7 +419,7 @@ static ssize_t ad7280_store_balance_sw(struct device *dev, ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE, 0, st->cb_mask[devaddr]); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : len; } @@ -433,10 +434,10 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, int ret; unsigned int msecs; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad7280_read(st, this_attr->address >> 8, this_attr->address & 0xFF); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); if (ret < 0) return ret; @@ -466,11 +467,11 @@ static ssize_t ad7280_store_balance_timer(struct device *dev, if (val > 31) return -EINVAL; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad7280_write(st, this_attr->address >> 8, this_attr->address & 0xFF, 0, (val & 0x1F) << 3); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : len; } @@ -559,7 +560,7 @@ static int ad7280_attr_init(struct ad7280_state *st) st->iio_attr[cnt].address = AD7280A_DEVADDR(dev) << 8 | ch; st->iio_attr[cnt].dev_attr.attr.mode = - S_IWUSR | S_IRUGO; + 0644; st->iio_attr[cnt].dev_attr.show = ad7280_show_balance_sw; st->iio_attr[cnt].dev_attr.store = @@ -576,7 +577,7 @@ static int ad7280_attr_init(struct ad7280_state *st) AD7280A_DEVADDR(dev) << 8 | (AD7280A_CB1_TIMER + ch); st->iio_attr[cnt].dev_attr.attr.mode = - S_IWUSR | S_IRUGO; + 0644; st->iio_attr[cnt].dev_attr.show = ad7280_show_balance_timer; st->iio_attr[cnt].dev_attr.store = @@ -655,7 +656,7 @@ static ssize_t ad7280_write_channel_config(struct device *dev, val = clamp(val, 0L, 0xFFL); - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); switch ((u32)this_attr->address) { case AD7280A_CELL_OVERVOLTAGE: st->cell_threshhigh = val; @@ -674,7 +675,7 @@ static ssize_t ad7280_write_channel_config(struct device *dev, ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, this_attr->address, 1, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : len; } @@ -745,26 +746,26 @@ out: static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value, in_voltage-voltage_thresh_low_value, - S_IRUGO | S_IWUSR, + 0644, ad7280_read_channel_config, ad7280_write_channel_config, AD7280A_CELL_UNDERVOLTAGE); static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value, in_voltage-voltage_thresh_high_value, - S_IRUGO | S_IWUSR, + 0644, ad7280_read_channel_config, ad7280_write_channel_config, AD7280A_CELL_OVERVOLTAGE); static IIO_DEVICE_ATTR(in_temp_thresh_low_value, - S_IRUGO | S_IWUSR, + 0644, ad7280_read_channel_config, ad7280_write_channel_config, AD7280A_AUX_ADC_UNDERVOLTAGE); static IIO_DEVICE_ATTR(in_temp_thresh_high_value, - S_IRUGO | S_IWUSR, + 0644, ad7280_read_channel_config, ad7280_write_channel_config, AD7280A_AUX_ADC_OVERVOLTAGE); @@ -792,13 +793,13 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, switch (m) { case IIO_CHAN_INFO_RAW: - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if (chan->address == AD7280A_ALL_CELLS) ret = ad7280_read_all_channels(st, st->scan_cnt, NULL); else ret = ad7280_read_channel(st, chan->address >> 8, chan->address & 0xFF); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); if (ret < 0) return ret; @@ -847,6 +848,7 @@ static int ad7280_probe(struct spi_device *spi) st = iio_priv(indio_dev); spi_set_drvdata(spi, indio_dev); st->spi = spi; + mutex_init(&st->lock); if (!pdata) pdata = &ad7793_default_pdata; diff --git a/drivers/staging/iio/adc/ad7606.c b/drivers/staging/iio/adc/ad7606.c index 9dbfa64..18f5f13 100644 --- a/drivers/staging/iio/adc/ad7606.c +++ b/drivers/staging/iio/adc/ad7606.c @@ -208,7 +208,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_SCALE: ret = -EINVAL; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); for (i = 0; i < ARRAY_SIZE(scale_avail); i++) if (val2 == scale_avail[i][1]) { gpiod_set_value(st->gpio_range, i); @@ -217,7 +217,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, ret = 0; break; } - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -231,11 +231,11 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, values[1] = (ret >> 1) & 1; values[2] = (ret >> 2) & 1; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, values); st->oversampling = val; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return 0; default: @@ -413,6 +413,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st = iio_priv(indio_dev); st->dev = dev; + mutex_init(&st->lock); st->bops = bops; st->base_address = base_address; /* tied to logic low, analog input range is +/- 5V */ diff --git a/drivers/staging/iio/adc/ad7606.h b/drivers/staging/iio/adc/ad7606.h index 746f955..acaed8d 100644 --- a/drivers/staging/iio/adc/ad7606.h +++ b/drivers/staging/iio/adc/ad7606.h @@ -14,6 +14,7 @@ * @name: identification string for chip * @channels: channel specification * @num_channels: number of channels + * @lock protect sensor state */ struct ad7606_chip_info { @@ -23,6 +24,7 @@ struct ad7606_chip_info { /** * struct ad7606_state - driver instance specific data + * @lock protect sensor state */ struct ad7606_state { @@ -37,6 +39,7 @@ struct ad7606_state { bool done; void __iomem *base_address; + struct mutex lock; /* protect sensor state */ struct gpio_desc *gpio_convst; struct gpio_desc *gpio_reset; struct gpio_desc *gpio_range; diff --git a/drivers/staging/iio/adc/ad7780.c b/drivers/staging/iio/adc/ad7780.c index e149600..dec3ba6 100644 --- a/drivers/staging/iio/adc/ad7780.c +++ b/drivers/staging/iio/adc/ad7780.c @@ -154,7 +154,7 @@ static const struct ad7780_chip_info ad7780_chip_info_tbl[] = { }; static const struct iio_info ad7780_info = { - .read_raw = &ad7780_read_raw, + .read_raw = ad7780_read_raw, .driver_module = THIS_MODULE, }; diff --git a/drivers/staging/iio/adc/lpc32xx_adc.c b/drivers/staging/iio/adc/lpc32xx_adc.c deleted file mode 100644 index b51f237..0000000 --- a/drivers/staging/iio/adc/lpc32xx_adc.c +++ /dev/null @@ -1,215 +0,0 @@ -/* - * lpc32xx_adc.c - Support for ADC in LPC32XX - * - * 3-channel, 10-bit ADC - * - * Copyright (C) 2011, 2012 Roland Stigge <stigge@antcom.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/device.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/io.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/completion.h> -#include <linux/of.h> - -#include <linux/iio/iio.h> -#include <linux/iio/sysfs.h> - -/* - * LPC32XX registers definitions - */ -#define LPC32XX_ADC_SELECT(x) ((x) + 0x04) -#define LPC32XX_ADC_CTRL(x) ((x) + 0x08) -#define LPC32XX_ADC_VALUE(x) ((x) + 0x48) - -/* Bit definitions for LPC32XX_ADC_SELECT: */ -#define AD_REFm 0x00000200 /* constant, always write this value! */ -#define AD_REFp 0x00000080 /* constant, always write this value! */ -#define AD_IN 0x00000010 /* multiple of this is the */ - /* channel number: 0, 1, 2 */ -#define AD_INTERNAL 0x00000004 /* constant, always write this value! */ - -/* Bit definitions for LPC32XX_ADC_CTRL: */ -#define AD_STROBE 0x00000002 -#define AD_PDN_CTRL 0x00000004 - -/* Bit definitions for LPC32XX_ADC_VALUE: */ -#define ADC_VALUE_MASK 0x000003FF - -#define MOD_NAME "lpc32xx-adc" - -struct lpc32xx_adc_info { - void __iomem *adc_base; - struct clk *clk; - struct completion completion; - - u32 value; -}; - -static int lpc32xx_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long mask) -{ - struct lpc32xx_adc_info *info = iio_priv(indio_dev); - - if (mask == IIO_CHAN_INFO_RAW) { - mutex_lock(&indio_dev->mlock); - clk_prepare_enable(info->clk); - /* Measurement setup */ - __raw_writel(AD_INTERNAL | (chan->address) | AD_REFp | AD_REFm, - LPC32XX_ADC_SELECT(info->adc_base)); - /* Trigger conversion */ - __raw_writel(AD_PDN_CTRL | AD_STROBE, - LPC32XX_ADC_CTRL(info->adc_base)); - wait_for_completion(&info->completion); /* set by ISR */ - clk_disable_unprepare(info->clk); - *val = info->value; - mutex_unlock(&indio_dev->mlock); - - return IIO_VAL_INT; - } - - return -EINVAL; -} - -static const struct iio_info lpc32xx_adc_iio_info = { - .read_raw = &lpc32xx_read_raw, - .driver_module = THIS_MODULE, -}; - -#define LPC32XX_ADC_CHANNEL(_index) { \ - .type = IIO_VOLTAGE, \ - .indexed = 1, \ - .channel = _index, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .address = AD_IN * _index, \ - .scan_index = _index, \ -} - -static const struct iio_chan_spec lpc32xx_adc_iio_channels[] = { - LPC32XX_ADC_CHANNEL(0), - LPC32XX_ADC_CHANNEL(1), - LPC32XX_ADC_CHANNEL(2), -}; - -static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id) -{ - struct lpc32xx_adc_info *info = dev_id; - - /* Read value and clear irq */ - info->value = __raw_readl(LPC32XX_ADC_VALUE(info->adc_base)) & - ADC_VALUE_MASK; - complete(&info->completion); - - return IRQ_HANDLED; -} - -static int lpc32xx_adc_probe(struct platform_device *pdev) -{ - struct lpc32xx_adc_info *info = NULL; - struct resource *res; - int retval = -ENODEV; - struct iio_dev *iodev = NULL; - int irq; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "failed to get platform I/O memory\n"); - return -ENXIO; - } - - iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); - if (!iodev) - return -ENOMEM; - - info = iio_priv(iodev); - - info->adc_base = devm_ioremap(&pdev->dev, res->start, - resource_size(res)); - if (!info->adc_base) { - dev_err(&pdev->dev, "failed mapping memory\n"); - return -EBUSY; - } - - info->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(info->clk)) { - dev_err(&pdev->dev, "failed getting clock\n"); - return PTR_ERR(info->clk); - } - - irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - dev_err(&pdev->dev, "failed getting interrupt resource\n"); - return -ENXIO; - } - - retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0, - MOD_NAME, info); - if (retval < 0) { - dev_err(&pdev->dev, "failed requesting interrupt\n"); - return retval; - } - - platform_set_drvdata(pdev, iodev); - - init_completion(&info->completion); - - iodev->name = MOD_NAME; - iodev->dev.parent = &pdev->dev; - iodev->info = &lpc32xx_adc_iio_info; - iodev->modes = INDIO_DIRECT_MODE; - iodev->channels = lpc32xx_adc_iio_channels; - iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels); - - retval = devm_iio_device_register(&pdev->dev, iodev); - if (retval) - return retval; - - dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq); - - return 0; -} - -#ifdef CONFIG_OF -static const struct of_device_id lpc32xx_adc_match[] = { - { .compatible = "nxp,lpc3220-adc" }, - {}, -}; -MODULE_DEVICE_TABLE(of, lpc32xx_adc_match); -#endif - -static struct platform_driver lpc32xx_adc_driver = { - .probe = lpc32xx_adc_probe, - .driver = { - .name = MOD_NAME, - .of_match_table = of_match_ptr(lpc32xx_adc_match), - }, -}; - -module_platform_driver(lpc32xx_adc_driver); - -MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>"); -MODULE_DESCRIPTION("LPC32XX ADC driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/iio/adc/spear_adc.c b/drivers/staging/iio/adc/spear_adc.c deleted file mode 100644 index 5dd61f6..0000000 --- a/drivers/staging/iio/adc/spear_adc.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * ST SPEAr ADC driver - * - * Copyright 2012 Stefan Roese <sr@denx.de> - * - * Licensed under the GPL-2. - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/device.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/io.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/completion.h> -#include <linux/of.h> -#include <linux/of_address.h> - -#include <linux/iio/iio.h> -#include <linux/iio/sysfs.h> - -/* SPEAR registers definitions */ -#define SPEAR600_ADC_SCAN_RATE_LO(x) ((x) & 0xFFFF) -#define SPEAR600_ADC_SCAN_RATE_HI(x) (((x) >> 0x10) & 0xFFFF) -#define SPEAR_ADC_CLK_LOW(x) (((x) & 0xf) << 0) -#define SPEAR_ADC_CLK_HIGH(x) (((x) & 0xf) << 4) - -/* Bit definitions for SPEAR_ADC_STATUS */ -#define SPEAR_ADC_STATUS_START_CONVERSION BIT(0) -#define SPEAR_ADC_STATUS_CHANNEL_NUM(x) ((x) << 1) -#define SPEAR_ADC_STATUS_ADC_ENABLE BIT(4) -#define SPEAR_ADC_STATUS_AVG_SAMPLE(x) ((x) << 5) -#define SPEAR_ADC_STATUS_VREF_INTERNAL BIT(9) - -#define SPEAR_ADC_DATA_MASK 0x03ff -#define SPEAR_ADC_DATA_BITS 10 - -#define SPEAR_ADC_MOD_NAME "spear-adc" - -#define SPEAR_ADC_CHANNEL_NUM 8 - -#define SPEAR_ADC_CLK_MIN 2500000 -#define SPEAR_ADC_CLK_MAX 20000000 - -struct adc_regs_spear3xx { - u32 status; - u32 average; - u32 scan_rate; - u32 clk; /* Not avail for 1340 & 1310 */ - u32 ch_ctrl[SPEAR_ADC_CHANNEL_NUM]; - u32 ch_data[SPEAR_ADC_CHANNEL_NUM]; -}; - -struct chan_data { - u32 lsb; - u32 msb; -}; - -struct adc_regs_spear6xx { - u32 status; - u32 pad[2]; - u32 clk; - u32 ch_ctrl[SPEAR_ADC_CHANNEL_NUM]; - struct chan_data ch_data[SPEAR_ADC_CHANNEL_NUM]; - u32 scan_rate_lo; - u32 scan_rate_hi; - struct chan_data average; -}; - -struct spear_adc_state { - struct device_node *np; - struct adc_regs_spear3xx __iomem *adc_base_spear3xx; - struct adc_regs_spear6xx __iomem *adc_base_spear6xx; - struct clk *clk; - struct completion completion; - u32 current_clk; - u32 sampling_freq; - u32 avg_samples; - u32 vref_external; - u32 value; -}; - -/* - * Functions to access some SPEAr ADC register. Abstracted into - * static inline functions, because of different register offsets - * on different SoC variants (SPEAr300 vs SPEAr600 etc). - */ -static void spear_adc_set_status(struct spear_adc_state *st, u32 val) -{ - __raw_writel(val, &st->adc_base_spear6xx->status); -} - -static void spear_adc_set_clk(struct spear_adc_state *st, u32 val) -{ - u32 clk_high, clk_low, count; - u32 apb_clk = clk_get_rate(st->clk); - - count = DIV_ROUND_UP(apb_clk, val); - clk_low = count / 2; - clk_high = count - clk_low; - st->current_clk = apb_clk / count; - - __raw_writel(SPEAR_ADC_CLK_LOW(clk_low) | SPEAR_ADC_CLK_HIGH(clk_high), - &st->adc_base_spear6xx->clk); -} - -static void spear_adc_set_ctrl(struct spear_adc_state *st, int n, - u32 val) -{ - __raw_writel(val, &st->adc_base_spear6xx->ch_ctrl[n]); -} - -static u32 spear_adc_get_average(struct spear_adc_state *st) -{ - if (of_device_is_compatible(st->np, "st,spear600-adc")) { - return __raw_readl(&st->adc_base_spear6xx->average.msb) & - SPEAR_ADC_DATA_MASK; - } else { - return __raw_readl(&st->adc_base_spear3xx->average) & - SPEAR_ADC_DATA_MASK; - } -} - -static void spear_adc_set_scanrate(struct spear_adc_state *st, u32 rate) -{ - if (of_device_is_compatible(st->np, "st,spear600-adc")) { - __raw_writel(SPEAR600_ADC_SCAN_RATE_LO(rate), - &st->adc_base_spear6xx->scan_rate_lo); - __raw_writel(SPEAR600_ADC_SCAN_RATE_HI(rate), - &st->adc_base_spear6xx->scan_rate_hi); - } else { - __raw_writel(rate, &st->adc_base_spear3xx->scan_rate); - } -} - -static int spear_adc_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long mask) -{ - struct spear_adc_state *st = iio_priv(indio_dev); - u32 status; - - switch (mask) { - case IIO_CHAN_INFO_RAW: - mutex_lock(&indio_dev->mlock); - - status = SPEAR_ADC_STATUS_CHANNEL_NUM(chan->channel) | - SPEAR_ADC_STATUS_AVG_SAMPLE(st->avg_samples) | - SPEAR_ADC_STATUS_START_CONVERSION | - SPEAR_ADC_STATUS_ADC_ENABLE; - if (st->vref_external == 0) - status |= SPEAR_ADC_STATUS_VREF_INTERNAL; - - spear_adc_set_status(st, status); - wait_for_completion(&st->completion); /* set by ISR */ - *val = st->value; - - mutex_unlock(&indio_dev->mlock); - - return IIO_VAL_INT; - - case IIO_CHAN_INFO_SCALE: - *val = st->vref_external; - *val2 = SPEAR_ADC_DATA_BITS; - return IIO_VAL_FRACTIONAL_LOG2; - case IIO_CHAN_INFO_SAMP_FREQ: - *val = st->current_clk; - return IIO_VAL_INT; - } - - return -EINVAL; -} - -static int spear_adc_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int val, - int val2, - long mask) -{ - struct spear_adc_state *st = iio_priv(indio_dev); - int ret = 0; - - if (mask != IIO_CHAN_INFO_SAMP_FREQ) - return -EINVAL; - - mutex_lock(&indio_dev->mlock); - - if ((val < SPEAR_ADC_CLK_MIN) || - (val > SPEAR_ADC_CLK_MAX) || - (val2 != 0)) { - ret = -EINVAL; - goto out; - } - - spear_adc_set_clk(st, val); - -out: - mutex_unlock(&indio_dev->mlock); - return ret; -} - -#define SPEAR_ADC_CHAN(idx) { \ - .type = IIO_VOLTAGE, \ - .indexed = 1, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ - .channel = idx, \ -} - -static const struct iio_chan_spec spear_adc_iio_channels[] = { - SPEAR_ADC_CHAN(0), - SPEAR_ADC_CHAN(1), - SPEAR_ADC_CHAN(2), - SPEAR_ADC_CHAN(3), - SPEAR_ADC_CHAN(4), - SPEAR_ADC_CHAN(5), - SPEAR_ADC_CHAN(6), - SPEAR_ADC_CHAN(7), -}; - -static irqreturn_t spear_adc_isr(int irq, void *dev_id) -{ - struct spear_adc_state *st = dev_id; - - /* Read value to clear IRQ */ - st->value = spear_adc_get_average(st); - complete(&st->completion); - - return IRQ_HANDLED; -} - -static int spear_adc_configure(struct spear_adc_state *st) -{ - int i; - - /* Reset ADC core */ - spear_adc_set_status(st, 0); - __raw_writel(0, &st->adc_base_spear6xx->clk); - for (i = 0; i < 8; i++) - spear_adc_set_ctrl(st, i, 0); - spear_adc_set_scanrate(st, 0); - - spear_adc_set_clk(st, st->sampling_freq); - - return 0; -} - -static const struct iio_info spear_adc_info = { - .read_raw = &spear_adc_read_raw, - .write_raw = &spear_adc_write_raw, - .driver_module = THIS_MODULE, -}; - -static int spear_adc_probe(struct platform_device *pdev) -{ - struct device_node *np = pdev->dev.of_node; - struct device *dev = &pdev->dev; - struct spear_adc_state *st; - struct resource *res; - struct iio_dev *indio_dev = NULL; - int ret = -ENODEV; - int irq; - - indio_dev = devm_iio_device_alloc(dev, sizeof(struct spear_adc_state)); - if (!indio_dev) { - dev_err(dev, "failed allocating iio device\n"); - return -ENOMEM; - } - - st = iio_priv(indio_dev); - st->np = np; - - /* - * SPEAr600 has a different register layout than other SPEAr SoC's - * (e.g. SPEAr3xx). Let's provide two register base addresses - * to support multi-arch kernels. - */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - st->adc_base_spear6xx = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(st->adc_base_spear6xx)) - return PTR_ERR(st->adc_base_spear6xx); - - st->adc_base_spear3xx = - (struct adc_regs_spear3xx __iomem *)st->adc_base_spear6xx; - - st->clk = devm_clk_get(dev, NULL); - if (IS_ERR(st->clk)) { - dev_err(dev, "failed getting clock\n"); - return PTR_ERR(st->clk); - } - - ret = clk_prepare_enable(st->clk); - if (ret) { - dev_err(dev, "failed enabling clock\n"); - return ret; - } - - irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - dev_err(dev, "failed getting interrupt resource\n"); - ret = -EINVAL; - goto errout2; - } - - ret = devm_request_irq(dev, irq, spear_adc_isr, 0, SPEAR_ADC_MOD_NAME, - st); - if (ret < 0) { - dev_err(dev, "failed requesting interrupt\n"); - goto errout2; - } - - if (of_property_read_u32(np, "sampling-frequency", - &st->sampling_freq)) { - dev_err(dev, "sampling-frequency missing in DT\n"); - ret = -EINVAL; - goto errout2; - } - - /* - * Optional avg_samples defaults to 0, resulting in single data - * conversion - */ - of_property_read_u32(np, "average-samples", &st->avg_samples); - - /* - * Optional vref_external defaults to 0, resulting in internal vref - * selection - */ - of_property_read_u32(np, "vref-external", &st->vref_external); - - spear_adc_configure(st); - - platform_set_drvdata(pdev, indio_dev); - - init_completion(&st->completion); - - indio_dev->name = SPEAR_ADC_MOD_NAME; - indio_dev->dev.parent = dev; - indio_dev->info = &spear_adc_info; - indio_dev->modes = INDIO_DIRECT_MODE; - indio_dev->channels = spear_adc_iio_channels; - indio_dev->num_channels = ARRAY_SIZE(spear_adc_iio_channels); - - ret = iio_device_register(indio_dev); - if (ret) - goto errout2; - - dev_info(dev, "SPEAR ADC driver loaded, IRQ %d\n", irq); - - return 0; - -errout2: - clk_disable_unprepare(st->clk); - return ret; -} - -static int spear_adc_remove(struct platform_device *pdev) -{ - struct iio_dev *indio_dev = platform_get_drvdata(pdev); - struct spear_adc_state *st = iio_priv(indio_dev); - - iio_device_unregister(indio_dev); - clk_disable_unprepare(st->clk); - - return 0; -} - -#ifdef CONFIG_OF -static const struct of_device_id spear_adc_dt_ids[] = { - { .compatible = "st,spear600-adc", }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, spear_adc_dt_ids); -#endif - -static struct platform_driver spear_adc_driver = { - .probe = spear_adc_probe, - .remove = spear_adc_remove, - .driver = { - .name = SPEAR_ADC_MOD_NAME, - .of_match_table = of_match_ptr(spear_adc_dt_ids), - }, -}; - -module_platform_driver(spear_adc_driver); - -MODULE_AUTHOR("Stefan Roese <sr@denx.de>"); -MODULE_DESCRIPTION("SPEAr ADC driver"); -MODULE_LICENSE("GPL"); |