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-rw-r--r--drivers/staging/et131x/et1310_address_map.h323
-rw-r--r--drivers/staging/et131x/et1310_mac.c265
-rw-r--r--drivers/staging/et131x/et1310_phy.c33
-rw-r--r--drivers/staging/et131x/et1310_phy.h169
-rw-r--r--drivers/staging/et131x/et1310_pm.c4
-rw-r--r--drivers/staging/et131x/et1310_rx.c214
-rw-r--r--drivers/staging/et131x/et1310_tx.c12
-rw-r--r--drivers/staging/et131x/et131x.h4
-rw-r--r--drivers/staging/et131x/et131x_adapter.h21
-rw-r--r--drivers/staging/et131x/et131x_defs.h1
-rw-r--r--drivers/staging/et131x/et131x_initpci.c34
-rw-r--r--drivers/staging/et131x/et131x_isr.c20
-rw-r--r--drivers/staging/et131x/et131x_netdev.c139
13 files changed, 572 insertions, 667 deletions
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h
index 425e927..410677e 100644
--- a/drivers/staging/et131x/et1310_address_map.h
+++ b/drivers/staging/et131x/et1310_address_map.h
@@ -267,19 +267,19 @@ struct txdma_regs { /* Location: */
u32 service_complete; /* 0x1028 */
u32 cache_rd_index; /* 0x102C */
u32 cache_wr_index; /* 0x1030 */
- u32 TxDmaError; /* 0x1034 */
- u32 DescAbortCount; /* 0x1038 */
- u32 PayloadAbortCnt; /* 0x103c */
- u32 WriteBackAbortCnt; /* 0x1040 */
- u32 DescTimeoutCnt; /* 0x1044 */
- u32 PayloadTimeoutCnt; /* 0x1048 */
- u32 WriteBackTimeoutCnt; /* 0x104c */
- u32 DescErrorCount; /* 0x1050 */
- u32 PayloadErrorCnt; /* 0x1054 */
- u32 WriteBackErrorCnt; /* 0x1058 */
- u32 DroppedTLPCount; /* 0x105c */
- u32 NewServiceComplete; /* 0x1060 */
- u32 EthernetPacketCount; /* 0x1064 */
+ u32 tx_dma_error; /* 0x1034 */
+ u32 desc_abort_cnt; /* 0x1038 */
+ u32 payload_abort_cnt; /* 0x103c */
+ u32 writeback_abort_cnt; /* 0x1040 */
+ u32 desc_timeout_cnt; /* 0x1044 */
+ u32 payload_timeout_cnt; /* 0x1048 */
+ u32 writeback_timeout_cnt; /* 0x104c */
+ u32 desc_error_cnt; /* 0x1050 */
+ u32 payload_error_cnt; /* 0x1054 */
+ u32 writeback_error_cnt; /* 0x1058 */
+ u32 dropped_tlp_cnt; /* 0x105c */
+ u32 new_service_complete; /* 0x1060 */
+ u32 ethernet_packet_cnt; /* 0x1064 */
};
/* END OF TXDMA REGISTER ADDRESS MAP */
@@ -700,42 +700,27 @@ struct txmac_regs { /* Location: */
/*
* structure for Wake On Lan Source Address Lo reg in rxmac address map
* located at address 0x4010
+ *
+ * 31-24: sa3
+ * 23-16: sa4
+ * 15-8: sa5
+ * 7-0: sa6
*/
-typedef union _RXMAC_WOL_SA_LO_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 sa3:8; /* bits 24-31 */
- u32 sa4:8; /* bits 16-23 */
- u32 sa5:8; /* bits 8-15 */
- u32 sa6:8; /* bits 0-7 */
-#else
- u32 sa6:8; /* bits 0-7 */
- u32 sa5:8; /* bits 8-15 */
- u32 sa4:8; /* bits 16-23 */
- u32 sa3:8; /* bits 24-31 */
-#endif
- } bits;
-} RXMAC_WOL_SA_LO_t, *PRXMAC_WOL_SA_LO_t;
+
+#define ET_WOL_LO_SA3_SHIFT 24
+#define ET_WOL_LO_SA4_SHIFT 16
+#define ET_WOL_LO_SA5_SHIFT 8
/*
* structure for Wake On Lan Source Address Hi reg in rxmac address map
* located at address 0x4014
+ *
+ * 31-16: reserved
+ * 15-8: sa1
+ * 7-0: sa2
*/
-typedef union _RXMAC_WOL_SA_HI_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 reserved:16; /* bits 16-31 */
- u32 sa1:8; /* bits 8-15 */
- u32 sa2:8; /* bits 0-7 */
-#else
- u32 sa2:8; /* bits 0-7 */
- u32 sa1:8; /* bits 8-15 */
- u32 reserved:16; /* bits 16-31 */
-#endif
- } bits;
-} RXMAC_WOL_SA_HI_t, *PRXMAC_WOL_SA_HI_t;
+
+#define ET_WOL_HI_SA1_SHIFT 8
/*
* structure for Wake On Lan mask reg in rxmac address map
@@ -746,65 +731,45 @@ typedef union _RXMAC_WOL_SA_HI_t {
/*
* structure for Unicast Paket Filter Address 1 reg in rxmac address map
* located at address 0x4068
+ *
+ * 31-24: addr1_3
+ * 23-16: addr1_4
+ * 15-8: addr1_5
+ * 7-0: addr1_6
*/
-typedef union _RXMAC_UNI_PF_ADDR1_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 addr1_3:8; /* bits 24-31 */
- u32 addr1_4:8; /* bits 16-23 */
- u32 addr1_5:8; /* bits 8-15 */
- u32 addr1_6:8; /* bits 0-7 */
-#else
- u32 addr1_6:8; /* bits 0-7 */
- u32 addr1_5:8; /* bits 8-15 */
- u32 addr1_4:8; /* bits 16-23 */
- u32 addr1_3:8; /* bits 24-31 */
-#endif
- } bits;
-} RXMAC_UNI_PF_ADDR1_t, *PRXMAC_UNI_PF_ADDR1_t;
+
+#define ET_UNI_PF_ADDR1_3_SHIFT 24
+#define ET_UNI_PF_ADDR1_4_SHIFT 16
+#define ET_UNI_PF_ADDR1_5_SHIFT 8
/*
* structure for Unicast Paket Filter Address 2 reg in rxmac address map
* located at address 0x406C
+ *
+ * 31-24: addr2_3
+ * 23-16: addr2_4
+ * 15-8: addr2_5
+ * 7-0: addr2_6
*/
-typedef union _RXMAC_UNI_PF_ADDR2_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 addr2_3:8; /* bits 24-31 */
- u32 addr2_4:8; /* bits 16-23 */
- u32 addr2_5:8; /* bits 8-15 */
- u32 addr2_6:8; /* bits 0-7 */
-#else
- u32 addr2_6:8; /* bits 0-7 */
- u32 addr2_5:8; /* bits 8-15 */
- u32 addr2_4:8; /* bits 16-23 */
- u32 addr2_3:8; /* bits 24-31 */
-#endif
- } bits;
-} RXMAC_UNI_PF_ADDR2_t, *PRXMAC_UNI_PF_ADDR2_t;
+
+#define ET_UNI_PF_ADDR2_3_SHIFT 24
+#define ET_UNI_PF_ADDR2_4_SHIFT 16
+#define ET_UNI_PF_ADDR2_5_SHIFT 8
/*
* structure for Unicast Paket Filter Address 1 & 2 reg in rxmac address map
* located at address 0x4070
+ *
+ * 31-24: addr2_1
+ * 23-16: addr2_2
+ * 15-8: addr1_1
+ * 7-0: addr1_2
*/
-typedef union _RXMAC_UNI_PF_ADDR3_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 addr2_1:8; /* bits 24-31 */
- u32 addr2_2:8; /* bits 16-23 */
- u32 addr1_1:8; /* bits 8-15 */
- u32 addr1_2:8; /* bits 0-7 */
-#else
- u32 addr1_2:8; /* bits 0-7 */
- u32 addr1_1:8; /* bits 8-15 */
- u32 addr2_2:8; /* bits 16-23 */
- u32 addr2_1:8; /* bits 24-31 */
-#endif
- } bits;
-} RXMAC_UNI_PF_ADDR3_t, *PRXMAC_UNI_PF_ADDR3_t;
+
+#define ET_UNI_PF_ADDR2_1_SHIFT 24
+#define ET_UNI_PF_ADDR2_2_SHIFT 16
+#define ET_UNI_PF_ADDR1_1_SHIFT 8
+
/*
* structure for Multicast Hash reg in rxmac address map
@@ -888,13 +853,13 @@ typedef union _RXMAC_UNI_PF_ADDR3_t {
/*
* Rx MAC Module of JAGCore Address Mapping
*/
-typedef struct _RXMAC_t { /* Location: */
+struct rxmac_regs { /* Location: */
u32 ctrl; /* 0x4000 */
u32 crc0; /* 0x4004 */
u32 crc12; /* 0x4008 */
u32 crc34; /* 0x400C */
- RXMAC_WOL_SA_LO_t sa_lo; /* 0x4010 */
- RXMAC_WOL_SA_HI_t sa_hi; /* 0x4014 */
+ u32 sa_lo; /* 0x4010 */
+ u32 sa_hi; /* 0x4014 */
u32 mask0_word0; /* 0x4018 */
u32 mask0_word1; /* 0x401C */
u32 mask0_word2; /* 0x4020 */
@@ -915,9 +880,9 @@ typedef struct _RXMAC_t { /* Location: */
u32 mask4_word1; /* 0x405C */
u32 mask4_word2; /* 0x4060 */
u32 mask4_word3; /* 0x4064 */
- RXMAC_UNI_PF_ADDR1_t uni_pf_addr1; /* 0x4068 */
- RXMAC_UNI_PF_ADDR2_t uni_pf_addr2; /* 0x406C */
- RXMAC_UNI_PF_ADDR3_t uni_pf_addr3; /* 0x4070 */
+ u32 uni_pf_addr1; /* 0x4068 */
+ u32 uni_pf_addr2; /* 0x406C */
+ u32 uni_pf_addr3; /* 0x4070 */
u32 multi_hash1; /* 0x4074 */
u32 multi_hash2; /* 0x4078 */
u32 multi_hash3; /* 0x407C */
@@ -930,7 +895,7 @@ typedef struct _RXMAC_t { /* Location: */
u32 mif_ctrl; /* 0x4098 */
u32 err_reg; /* 0x409C */
-} RXMAC_t, *PRXMAC_t;
+};
/* END OF RXMAC REGISTER ADDRESS MAP */
@@ -1123,47 +1088,33 @@ typedef struct _RXMAC_t { /* Location: */
/*
* structure for Mac Station Address, Part 1 reg in mac address map.
* located at address 0x5040
+ *
+ * 31-24: Octet6
+ * 23-16: Octet5
+ * 15-8: Octet4
+ * 7-0: Octet3
*/
-typedef union _MAC_STATION_ADDR1_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 Octet6:8; /* bits 24-31 */
- u32 Octet5:8; /* bits 16-23 */
- u32 Octet4:8; /* bits 8-15 */
- u32 Octet3:8; /* bits 0-7 */
-#else
- u32 Octet3:8; /* bits 0-7 */
- u32 Octet4:8; /* bits 8-15 */
- u32 Octet5:8; /* bits 16-23 */
- u32 Octet6:8; /* bits 24-31 */
-#endif
- } bits;
-} MAC_STATION_ADDR1_t, *PMAC_STATION_ADDR1_t;
+
+#define ET_MAC_STATION_ADDR1_OC6_SHIFT 24
+#define ET_MAC_STATION_ADDR1_OC5_SHIFT 16
+#define ET_MAC_STATION_ADDR1_OC4_SHIFT 8
/*
* structure for Mac Station Address, Part 2 reg in mac address map.
* located at address 0x5044
+ *
+ * 31-24: Octet2
+ * 23-16: Octet1
+ * 15-0: reserved
*/
-typedef union _MAC_STATION_ADDR2_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 Octet2:8; /* bits 24-31 */
- u32 Octet1:8; /* bits 16-23 */
- u32 reserved:16; /* bits 0-15 */
-#else
- u32 reserved:16; /* bit 0-15 */
- u32 Octet1:8; /* bits 16-23 */
- u32 Octet2:8; /* bits 24-31 */
-#endif
- } bits;
-} MAC_STATION_ADDR2_t, *PMAC_STATION_ADDR2_t;
+
+#define ET_MAC_STATION_ADDR2_OC2_SHIFT 24
+#define ET_MAC_STATION_ADDR2_OC1_SHIFT 16
/*
* MAC Module of JAGCore Address Mapping
*/
-typedef struct _MAC_t { /* Location: */
+struct mac_regs { /* Location: */
u32 cfg1; /* 0x5000 */
u32 cfg2; /* 0x5004 */
u32 ipg; /* 0x5008 */
@@ -1180,9 +1131,9 @@ typedef struct _MAC_t { /* Location: */
u32 mii_mgmt_indicator; /* 0x5034 */
u32 if_ctrl; /* 0x5038 */
u32 if_stat; /* 0x503C */
- MAC_STATION_ADDR1_t station_addr_1; /* 0x5040 */
- MAC_STATION_ADDR2_t station_addr_2; /* 0x5044 */
-} MAC_t, *PMAC_t;
+ u32 station_addr_1; /* 0x5040 */
+ u32 station_addr_2; /* 0x5044 */
+};
/* END OF MAC REGISTER ADDRESS MAP */
@@ -1253,148 +1204,148 @@ struct macstat_regs { /* Location: */
u32 pad[32]; /* 0x6000 - 607C */
/* Tx/Rx 0-64 Byte Frame Counter */
- u32 TR64; /* 0x6080 */
+ u32 txrx_0_64_byte_frames; /* 0x6080 */
/* Tx/Rx 65-127 Byte Frame Counter */
- u32 TR127; /* 0x6084 */
+ u32 txrx_65_127_byte_frames; /* 0x6084 */
/* Tx/Rx 128-255 Byte Frame Counter */
- u32 TR255; /* 0x6088 */
+ u32 txrx_128_255_byte_frames; /* 0x6088 */
/* Tx/Rx 256-511 Byte Frame Counter */
- u32 TR511; /* 0x608C */
+ u32 txrx_256_511_byte_frames; /* 0x608C */
/* Tx/Rx 512-1023 Byte Frame Counter */
- u32 TR1K; /* 0x6090 */
+ u32 txrx_512_1023_byte_frames; /* 0x6090 */
/* Tx/Rx 1024-1518 Byte Frame Counter */
- u32 TRMax; /* 0x6094 */
+ u32 txrx_1024_1518_byte_frames; /* 0x6094 */
/* Tx/Rx 1519-1522 Byte Good VLAN Frame Count */
- u32 TRMgv; /* 0x6098 */
+ u32 txrx_1519_1522_gvln_frames; /* 0x6098 */
/* Rx Byte Counter */
- u32 RByt; /* 0x609C */
+ u32 rx_bytes; /* 0x609C */
/* Rx Packet Counter */
- u32 RPkt; /* 0x60A0 */
+ u32 rx_packets; /* 0x60A0 */
/* Rx FCS Error Counter */
- u32 RFcs; /* 0x60A4 */
+ u32 rx_fcs_errs; /* 0x60A4 */
/* Rx Multicast Packet Counter */
- u32 RMca; /* 0x60A8 */
+ u32 rx_multicast_packets; /* 0x60A8 */
/* Rx Broadcast Packet Counter */
- u32 RBca; /* 0x60AC */
+ u32 rx_broadcast_packets; /* 0x60AC */
/* Rx Control Frame Packet Counter */
- u32 RxCf; /* 0x60B0 */
+ u32 rx_control_frames; /* 0x60B0 */
/* Rx Pause Frame Packet Counter */
- u32 RxPf; /* 0x60B4 */
+ u32 rx_pause_frames; /* 0x60B4 */
/* Rx Unknown OP Code Counter */
- u32 RxUo; /* 0x60B8 */
+ u32 rx_unknown_opcodes; /* 0x60B8 */
/* Rx Alignment Error Counter */
- u32 RAln; /* 0x60BC */
+ u32 rx_align_errs; /* 0x60BC */
/* Rx Frame Length Error Counter */
- u32 RFlr; /* 0x60C0 */
+ u32 rx_frame_len_errs; /* 0x60C0 */
/* Rx Code Error Counter */
- u32 RCde; /* 0x60C4 */
+ u32 rx_code_errs; /* 0x60C4 */
/* Rx Carrier Sense Error Counter */
- u32 RCse; /* 0x60C8 */
+ u32 rx_carrier_sense_errs; /* 0x60C8 */
/* Rx Undersize Packet Counter */
- u32 RUnd; /* 0x60CC */
+ u32 rx_undersize_packets; /* 0x60CC */
/* Rx Oversize Packet Counter */
- u32 ROvr; /* 0x60D0 */
+ u32 rx_oversize_packets; /* 0x60D0 */
/* Rx Fragment Counter */
- u32 RFrg; /* 0x60D4 */
+ u32 rx_fragment_packets; /* 0x60D4 */
/* Rx Jabber Counter */
- u32 RJbr; /* 0x60D8 */
+ u32 rx_jabbers; /* 0x60D8 */
/* Rx Drop */
- u32 RDrp; /* 0x60DC */
+ u32 rx_drops; /* 0x60DC */
/* Tx Byte Counter */
- u32 TByt; /* 0x60E0 */
+ u32 tx_bytes; /* 0x60E0 */
/* Tx Packet Counter */
- u32 TPkt; /* 0x60E4 */
+ u32 tx_packets; /* 0x60E4 */
/* Tx Multicast Packet Counter */
- u32 TMca; /* 0x60E8 */
+ u32 tx_multicast_packets; /* 0x60E8 */
/* Tx Broadcast Packet Counter */
- u32 TBca; /* 0x60EC */
+ u32 tx_broadcast_packets; /* 0x60EC */
/* Tx Pause Control Frame Counter */
- u32 TxPf; /* 0x60F0 */
+ u32 tx_pause_frames; /* 0x60F0 */
/* Tx Deferral Packet Counter */
- u32 TDfr; /* 0x60F4 */
+ u32 tx_deferred; /* 0x60F4 */
/* Tx Excessive Deferral Packet Counter */
- u32 TEdf; /* 0x60F8 */
+ u32 tx_excessive_deferred; /* 0x60F8 */
/* Tx Single Collision Packet Counter */
- u32 TScl; /* 0x60FC */
+ u32 tx_single_collisions; /* 0x60FC */
/* Tx Multiple Collision Packet Counter */
- u32 TMcl; /* 0x6100 */
+ u32 tx_multiple_collisions; /* 0x6100 */
/* Tx Late Collision Packet Counter */
- u32 TLcl; /* 0x6104 */
+ u32 tx_late_collisions; /* 0x6104 */
/* Tx Excessive Collision Packet Counter */
- u32 TXcl; /* 0x6108 */
+ u32 tx_excessive_collisions; /* 0x6108 */
/* Tx Total Collision Packet Counter */
- u32 TNcl; /* 0x610C */
+ u32 tx_total_collisions; /* 0x610C */
/* Tx Pause Frame Honored Counter */
- u32 TPfh; /* 0x6110 */
+ u32 tx_pause_honored_frames; /* 0x6110 */
/* Tx Drop Frame Counter */
- u32 TDrp; /* 0x6114 */
+ u32 tx_drops; /* 0x6114 */
/* Tx Jabber Frame Counter */
- u32 TJbr; /* 0x6118 */
+ u32 tx_jabbers; /* 0x6118 */
/* Tx FCS Error Counter */
- u32 TFcs; /* 0x611C */
+ u32 tx_fcs_errs; /* 0x611C */
/* Tx Control Frame Counter */
- u32 TxCf; /* 0x6120 */
+ u32 tx_control_frames; /* 0x6120 */
/* Tx Oversize Frame Counter */
- u32 TOvr; /* 0x6124 */
+ u32 tx_oversize_frames; /* 0x6124 */
/* Tx Undersize Frame Counter */
- u32 TUnd; /* 0x6128 */
+ u32 tx_undersize_frames; /* 0x6128 */
/* Tx Fragments Frame Counter */
- u32 TFrg; /* 0x612C */
+ u32 tx_fragments; /* 0x612C */
/* Carry Register One Register */
- u32 Carry1; /* 0x6130 */
+ u32 carry_reg1; /* 0x6130 */
/* Carry Register Two Register */
- u32 Carry2; /* 0x6134 */
+ u32 carry_reg2; /* 0x6134 */
/* Carry Register One Mask Register */
- u32 Carry1M; /* 0x6138 */
+ u32 carry_reg1_mask; /* 0x6138 */
/* Carry Register Two Mask Register */
- u32 Carry2M; /* 0x613C */
+ u32 carry_reg2_mask; /* 0x613C */
};
/* END OF MAC STAT REGISTER ADDRESS MAP */
@@ -1448,7 +1399,7 @@ struct mmc_regs { /* Location: */
/*
* JAGCore Address Mapping
*/
-typedef struct _ADDRESS_MAP_t {
+struct address_map {
struct global_regs global;
/* unused section of global address map */
u8 unused_global[4096 - sizeof(struct global_regs)];
@@ -1461,12 +1412,12 @@ typedef struct _ADDRESS_MAP_t {
struct txmac_regs txmac;
/* unused section of txmac address map */
u8 unused_txmac[4096 - sizeof(struct txmac_regs)];
- RXMAC_t rxmac;
+ struct rxmac_regs rxmac;
/* unused section of rxmac address map */
- u8 unused_rxmac[4096 - sizeof(RXMAC_t)];
- MAC_t mac;
+ u8 unused_rxmac[4096 - sizeof(struct rxmac_regs)];
+ struct mac_regs mac;
/* unused section of mac address map */
- u8 unused_mac[4096 - sizeof(MAC_t)];
+ u8 unused_mac[4096 - sizeof(struct mac_regs)];
struct macstat_regs macstat;
/* unused section of mac stat address map */
u8 unused_mac_stat[4096 - sizeof(struct macstat_regs)];
@@ -1478,6 +1429,6 @@ typedef struct _ADDRESS_MAP_t {
u8 unused_exp_rom[4096]; /* MGS-size TBD */
u8 unused__[524288]; /* unused section of address map */
-} ADDRESS_MAP_t, *PADDRESS_MAP_t;
+};
#endif /* _ET1310_ADDRESS_MAP_H_ */
diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c
index 78f72fa..656be4b 100644
--- a/drivers/staging/et131x/et1310_mac.c
+++ b/drivers/staging/et131x/et1310_mac.c
@@ -104,9 +104,9 @@
*/
void ConfigMACRegs1(struct et131x_adapter *etdev)
{
- struct _MAC_t __iomem *pMac = &etdev->regs->mac;
- MAC_STATION_ADDR1_t station1;
- MAC_STATION_ADDR2_t station2;
+ struct mac_regs __iomem *pMac = &etdev->regs->mac;
+ u32 station1;
+ u32 station2;
u32 ipg;
/* First we need to reset everything. Write to MAC configuration
@@ -136,14 +136,14 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
* station address is used for generating and checking pause control
* packets.
*/
- station2.bits.Octet1 = etdev->addr[0];
- station2.bits.Octet2 = etdev->addr[1];
- station1.bits.Octet3 = etdev->addr[2];
- station1.bits.Octet4 = etdev->addr[3];
- station1.bits.Octet5 = etdev->addr[4];
- station1.bits.Octet6 = etdev->addr[5];
- writel(station1.value, &pMac->station_addr_1.value);
- writel(station2.value, &pMac->station_addr_2.value);
+ station2 = (etdev->addr[1] << ET_MAC_STATION_ADDR2_OC2_SHIFT) |
+ (etdev->addr[0] << ET_MAC_STATION_ADDR2_OC1_SHIFT);
+ station1 = (etdev->addr[5] << ET_MAC_STATION_ADDR1_OC6_SHIFT) |
+ (etdev->addr[4] << ET_MAC_STATION_ADDR1_OC5_SHIFT) |
+ (etdev->addr[3] << ET_MAC_STATION_ADDR1_OC4_SHIFT) |
+ etdev->addr[2];
+ writel(station1, &pMac->station_addr_1);
+ writel(station2, &pMac->station_addr_2);
/* Max ethernet packet in bytes that will passed by the mac without
* being truncated. Allow the MAC to pass 4 more than our max packet
@@ -165,7 +165,7 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
void ConfigMACRegs2(struct et131x_adapter *etdev)
{
int32_t delay = 0;
- struct _MAC_t __iomem *pMac = &etdev->regs->mac;
+ struct mac_regs __iomem *pMac = &etdev->regs->mac;
u32 cfg1;
u32 cfg2;
u32 ifctrl;
@@ -229,7 +229,7 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
writel(ctl, &etdev->regs->txmac.ctl);
/* Ready to start the RXDMA/TXDMA engine */
- if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) {
+ if (etdev->flags & fMP_ADAPTER_LOWER_POWER) {
et131x_rx_dma_enable(etdev);
et131x_tx_dma_enable(etdev);
}
@@ -237,9 +237,9 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
void ConfigRxMacRegs(struct et131x_adapter *etdev)
{
- struct _RXMAC_t __iomem *pRxMac = &etdev->regs->rxmac;
- RXMAC_WOL_SA_LO_t sa_lo;
- RXMAC_WOL_SA_HI_t sa_hi;
+ struct rxmac_regs __iomem *pRxMac = &etdev->regs->rxmac;
+ u32 sa_lo;
+ u32 sa_hi = 0;
u32 pf_ctrl = 0;
/* Disable the MAC while it is being configured (also disable WOL) */
@@ -280,15 +280,15 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev)
writel(0, &pRxMac->mask4_word3);
/* Lets setup the WOL Source Address */
- sa_lo.bits.sa3 = etdev->addr[2];
- sa_lo.bits.sa4 = etdev->addr[3];
- sa_lo.bits.sa5 = etdev->addr[4];
- sa_lo.bits.sa6 = etdev->addr[5];
- writel(sa_lo.value, &pRxMac->sa_lo.value);
+ sa_lo = (etdev->addr[2] << ET_WOL_LO_SA3_SHIFT) |
+ (etdev->addr[3] << ET_WOL_LO_SA4_SHIFT) |
+ (etdev->addr[4] << ET_WOL_LO_SA5_SHIFT) |
+ etdev->addr[5];
+ writel(sa_lo, &pRxMac->sa_lo);
- sa_hi.bits.sa1 = etdev->addr[0];
- sa_hi.bits.sa2 = etdev->addr[1];
- writel(sa_hi.value, &pRxMac->sa_hi.value);
+ sa_hi = (u32) (etdev->addr[0] << ET_WOL_HI_SA1_SHIFT) |
+ etdev->addr[1];
+ writel(sa_hi, &pRxMac->sa_hi);
/* Disable all Packet Filtering */
writel(0, &pRxMac->pf_ctrl);
@@ -298,9 +298,9 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev)
SetupDeviceForUnicast(etdev);
pf_ctrl |= 4; /* Unicast filter */
} else {
- writel(0, &pRxMac->uni_pf_addr1.value);
- writel(0, &pRxMac->uni_pf_addr2.value);
- writel(0, &pRxMac->uni_pf_addr3.value);
+ writel(0, &pRxMac->uni_pf_addr1);
+ writel(0, &pRxMac->uni_pf_addr2);
+ writel(0, &pRxMac->uni_pf_addr3);
}
/* Let's initialize the Multicast hash */
@@ -384,31 +384,64 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev)
struct macstat_regs __iomem *macstat =
&etdev->regs->macstat;
- /* Next we need to initialize all the MAC_STAT registers to zero on
+ /* Next we need to initialize all the macstat registers to zero on
* the device.
*/
- writel(0, &macstat->RFcs);
- writel(0, &macstat->RAln);
- writel(0, &macstat->RFlr);
- writel(0, &macstat->RDrp);
- writel(0, &macstat->RCde);
- writel(0, &macstat->ROvr);
- writel(0, &macstat->RFrg);
-
- writel(0, &macstat->TScl);
- writel(0, &macstat->TDfr);
- writel(0, &macstat->TMcl);
- writel(0, &macstat->TLcl);
- writel(0, &macstat->TNcl);
- writel(0, &macstat->TOvr);
- writel(0, &macstat->TUnd);
+ writel(0, &macstat->txrx_0_64_byte_frames);
+ writel(0, &macstat->txrx_65_127_byte_frames);
+ writel(0, &macstat->txrx_128_255_byte_frames);
+ writel(0, &macstat->txrx_256_511_byte_frames);
+ writel(0, &macstat->txrx_512_1023_byte_frames);
+ writel(0, &macstat->txrx_1024_1518_byte_frames);
+ writel(0, &macstat->txrx_1519_1522_gvln_frames);
+
+ writel(0, &macstat->rx_bytes);
+ writel(0, &macstat->rx_packets);
+ writel(0, &macstat->rx_fcs_errs);
+ writel(0, &macstat->rx_multicast_packets);
+ writel(0, &macstat->rx_broadcast_packets);
+ writel(0, &macstat->rx_control_frames);
+ writel(0, &macstat->rx_pause_frames);
+ writel(0, &macstat->rx_unknown_opcodes);
+ writel(0, &macstat->rx_align_errs);
+ writel(0, &macstat->rx_frame_len_errs);
+ writel(0, &macstat->rx_code_errs);
+ writel(0, &macstat->rx_carrier_sense_errs);
+ writel(0, &macstat->rx_undersize_packets);
+ writel(0, &macstat->rx_oversize_packets);
+ writel(0, &macstat->rx_fragment_packets);
+ writel(0, &macstat->rx_jabbers);
+ writel(0, &macstat->rx_drops);
+
+ writel(0, &macstat->tx_bytes);
+ writel(0, &macstat->tx_packets);
+ writel(0, &macstat->tx_multicast_packets);
+ writel(0, &macstat->tx_broadcast_packets);
+ writel(0, &macstat->tx_pause_frames);
+ writel(0, &macstat->tx_deferred);
+ writel(0, &macstat->tx_excessive_deferred);
+ writel(0, &macstat->tx_single_collisions);
+ writel(0, &macstat->tx_multiple_collisions);
+ writel(0, &macstat->tx_late_collisions);
+ writel(0, &macstat->tx_excessive_collisions);
+ writel(0, &macstat->tx_total_collisions);
+ writel(0, &macstat->tx_pause_honored_frames);
+ writel(0, &macstat->tx_drops);
+ writel(0, &macstat->tx_jabbers);
+ writel(0, &macstat->tx_fcs_errs);
+ writel(0, &macstat->tx_control_frames);
+ writel(0, &macstat->tx_oversize_frames);
+ writel(0, &macstat->tx_undersize_frames);
+ writel(0, &macstat->tx_fragments);
+ writel(0, &macstat->carry_reg1);
+ writel(0, &macstat->carry_reg2);
/* Unmask any counters that we want to track the overflow of.
* Initially this will be all counters. It may become clear later
* that we do not need to track all counters.
*/
- writel(0xFFFFBE32, &macstat->Carry1M);
- writel(0xFFFE7E8B, &macstat->Carry2M);
+ writel(0xFFFFBE32, &macstat->carry_reg1_mask);
+ writel(0xFFFE7E8B, &macstat->carry_reg2_mask);
}
void ConfigFlowControl(struct et131x_adapter *etdev)
@@ -452,26 +485,26 @@ void ConfigFlowControl(struct et131x_adapter *etdev)
*/
void UpdateMacStatHostCounters(struct et131x_adapter *etdev)
{
- struct _ce_stats_t *stats = &etdev->Stats;
+ struct ce_stats *stats = &etdev->stats;
struct macstat_regs __iomem *macstat =
&etdev->regs->macstat;
- stats->collisions += readl(&macstat->TNcl);
- stats->first_collision += readl(&macstat->TScl);
- stats->tx_deferred += readl(&macstat->TDfr);
- stats->excessive_collisions += readl(&macstat->TMcl);
- stats->late_collisions += readl(&macstat->TLcl);
- stats->tx_uflo += readl(&macstat->TUnd);
- stats->max_pkt_error += readl(&macstat->TOvr);
-
- stats->alignment_err += readl(&macstat->RAln);
- stats->crc_err += readl(&macstat->RCde);
- stats->norcvbuf += readl(&macstat->RDrp);
- stats->rx_ov_flow += readl(&macstat->ROvr);
- stats->code_violations += readl(&macstat->RFcs);
- stats->length_err += readl(&macstat->RFlr);
-
- stats->other_errors += readl(&macstat->RFrg);
+ stats->collisions += readl(&macstat->tx_total_collisions);
+ stats->first_collision += readl(&macstat->tx_single_collisions);
+ stats->tx_deferred += readl(&macstat->tx_deferred);
+ stats->excessive_collisions += readl(&macstat->tx_multiple_collisions);
+ stats->late_collisions += readl(&macstat->tx_late_collisions);
+ stats->tx_uflo += readl(&macstat->tx_undersize_frames);
+ stats->max_pkt_error += readl(&macstat->tx_oversize_frames);
+
+ stats->alignment_err += readl(&macstat->rx_align_errs);
+ stats->crc_err += readl(&macstat->rx_code_errs);
+ stats->norcvbuf += readl(&macstat->rx_drops);
+ stats->rx_ov_flow += readl(&macstat->rx_oversize_packets);
+ stats->code_violations += readl(&macstat->rx_fcs_errs);
+ stats->length_err += readl(&macstat->rx_frame_len_errs);
+
+ stats->other_errors += readl(&macstat->rx_fragment_packets);
}
/**
@@ -484,17 +517,17 @@ void UpdateMacStatHostCounters(struct et131x_adapter *etdev)
*/
void HandleMacStatInterrupt(struct et131x_adapter *etdev)
{
- u32 Carry1;
- u32 Carry2;
+ u32 carry_reg1;
+ u32 carry_reg2;
/* Read the interrupt bits from the register(s). These are Clear On
* Write.
*/
- Carry1 = readl(&etdev->regs->macstat.Carry1);
- Carry2 = readl(&etdev->regs->macstat.Carry2);
+ carry_reg1 = readl(&etdev->regs->macstat.carry_reg1);
+ carry_reg2 = readl(&etdev->regs->macstat.carry_reg2);
- writel(Carry1, &etdev->regs->macstat.Carry1);
- writel(Carry2, &etdev->regs->macstat.Carry2);
+ writel(carry_reg2, &etdev->regs->macstat.carry_reg1);
+ writel(carry_reg2, &etdev->regs->macstat.carry_reg2);
/* We need to do update the host copy of all the MAC_STAT counters.
* For each counter, check it's overflow bit. If the overflow bit is
@@ -502,39 +535,39 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev)
* revolution of the counter. This routine is called when the counter
* block indicates that one of the counters has wrapped.
*/
- if (Carry1 & (1 << 14))
- etdev->Stats.code_violations += COUNTER_WRAP_16_BIT;
- if (Carry1 & (1 << 8))
- etdev->Stats.alignment_err += COUNTER_WRAP_12_BIT;
- if (Carry1 & (1 << 7))
- etdev->Stats.length_err += COUNTER_WRAP_16_BIT;
- if (Carry1 & (1 << 2))
- etdev->Stats.other_errors += COUNTER_WRAP_16_BIT;
- if (Carry1 & (1 << 6))
- etdev->Stats.crc_err += COUNTER_WRAP_16_BIT;
- if (Carry1 & (1 << 3))
- etdev->Stats.rx_ov_flow += COUNTER_WRAP_16_BIT;
- if (Carry1 & (1 << 0))
- etdev->Stats.norcvbuf += COUNTER_WRAP_16_BIT;
- if (Carry2 & (1 << 16))
- etdev->Stats.max_pkt_error += COUNTER_WRAP_12_BIT;
- if (Carry2 & (1 << 15))
- etdev->Stats.tx_uflo += COUNTER_WRAP_12_BIT;
- if (Carry2 & (1 << 6))
- etdev->Stats.first_collision += COUNTER_WRAP_12_BIT;
- if (Carry2 & (1 << 8))
- etdev->Stats.tx_deferred += COUNTER_WRAP_12_BIT;
- if (Carry2 & (1 << 5))
- etdev->Stats.excessive_collisions += COUNTER_WRAP_12_BIT;
- if (Carry2 & (1 << 4))
- etdev->Stats.late_collisions += COUNTER_WRAP_12_BIT;
- if (Carry2 & (1 << 2))
- etdev->Stats.collisions += COUNTER_WRAP_12_BIT;
+ if (carry_reg1 & (1 << 14))
+ etdev->stats.code_violations += COUNTER_WRAP_16_BIT;
+ if (carry_reg1 & (1 << 8))
+ etdev->stats.alignment_err += COUNTER_WRAP_12_BIT;
+ if (carry_reg1 & (1 << 7))
+ etdev->stats.length_err += COUNTER_WRAP_16_BIT;
+ if (carry_reg1 & (1 << 2))
+ etdev->stats.other_errors += COUNTER_WRAP_16_BIT;
+ if (carry_reg1 & (1 << 6))
+ etdev->stats.crc_err += COUNTER_WRAP_16_BIT;
+ if (carry_reg1 & (1 << 3))
+ etdev->stats.rx_ov_flow += COUNTER_WRAP_16_BIT;
+ if (carry_reg1 & (1 << 0))
+ etdev->stats.norcvbuf += COUNTER_WRAP_16_BIT;
+ if (carry_reg2 & (1 << 16))
+ etdev->stats.max_pkt_error += COUNTER_WRAP_12_BIT;
+ if (carry_reg2 & (1 << 15))
+ etdev->stats.tx_uflo += COUNTER_WRAP_12_BIT;
+ if (carry_reg2 & (1 << 6))
+ etdev->stats.first_collision += COUNTER_WRAP_12_BIT;
+ if (carry_reg2 & (1 << 8))
+ etdev->stats.tx_deferred += COUNTER_WRAP_12_BIT;
+ if (carry_reg2 & (1 << 5))
+ etdev->stats.excessive_collisions += COUNTER_WRAP_12_BIT;
+ if (carry_reg2 & (1 << 4))
+ etdev->stats.late_collisions += COUNTER_WRAP_12_BIT;
+ if (carry_reg2 & (1 << 2))
+ etdev->stats.collisions += COUNTER_WRAP_12_BIT;
}
void SetupDeviceForMulticast(struct et131x_adapter *etdev)
{
- struct _RXMAC_t __iomem *rxmac = &etdev->regs->rxmac;
+ struct rxmac_regs __iomem *rxmac = &etdev->regs->rxmac;
uint32_t nIndex;
uint32_t result;
uint32_t hash1 = 0;
@@ -582,10 +615,10 @@ void SetupDeviceForMulticast(struct et131x_adapter *etdev)
void SetupDeviceForUnicast(struct et131x_adapter *etdev)
{
- struct _RXMAC_t __iomem *rxmac = &etdev->regs->rxmac;
- RXMAC_UNI_PF_ADDR1_t uni_pf1;
- RXMAC_UNI_PF_ADDR2_t uni_pf2;
- RXMAC_UNI_PF_ADDR3_t uni_pf3;
+ struct rxmac_regs __iomem *rxmac = &etdev->regs->rxmac;
+ u32 uni_pf1;
+ u32 uni_pf2;
+ u32 uni_pf3;
u32 pm_csr;
/* Set up unicast packet filter reg 3 to be the first two octets of
@@ -597,25 +630,25 @@ void SetupDeviceForUnicast(struct et131x_adapter *etdev)
* Set up unicast packet filter reg 3 to be the octets 2 - 5 of the
* MAC address for first address
*/
- uni_pf3.bits.addr1_1 = etdev->addr[0];
- uni_pf3.bits.addr1_2 = etdev->addr[1];
- uni_pf3.bits.addr2_1 = etdev->addr[0];
- uni_pf3.bits.addr2_2 = etdev->addr[1];
+ uni_pf3 = (etdev->addr[0] << ET_UNI_PF_ADDR2_1_SHIFT) |
+ (etdev->addr[1] << ET_UNI_PF_ADDR2_2_SHIFT) |
+ (etdev->addr[0] << ET_UNI_PF_ADDR1_1_SHIFT) |
+ etdev->addr[1];
- uni_pf2.bits.addr2_3 = etdev->addr[2];
- uni_pf2.bits.addr2_4 = etdev->addr[3];
- uni_pf2.bits.addr2_5 = etdev->addr[4];
- uni_pf2.bits.addr2_6 = etdev->addr[5];
+ uni_pf2 = (etdev->addr[2] << ET_UNI_PF_ADDR2_3_SHIFT) |
+ (etdev->addr[3] << ET_UNI_PF_ADDR2_4_SHIFT) |
+ (etdev->addr[4] << ET_UNI_PF_ADDR2_5_SHIFT) |
+ etdev->addr[5];
- uni_pf1.bits.addr1_3 = etdev->addr[2];
- uni_pf1.bits.addr1_4 = etdev->addr[3];
- uni_pf1.bits.addr1_5 = etdev->addr[4];
- uni_pf1.bits.addr1_6 = etdev->addr[5];
+ uni_pf1 = (etdev->addr[2] << ET_UNI_PF_ADDR1_3_SHIFT) |
+ (etdev->addr[3] << ET_UNI_PF_ADDR1_4_SHIFT) |
+ (etdev->addr[4] << ET_UNI_PF_ADDR1_5_SHIFT) |
+ etdev->addr[5];
pm_csr = readl(&etdev->regs->global.pm_csr);
if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
- writel(uni_pf1.value, &rxmac->uni_pf_addr1.value);
- writel(uni_pf2.value, &rxmac->uni_pf_addr2.value);
- writel(uni_pf3.value, &rxmac->uni_pf_addr3.value);
+ writel(uni_pf1, &rxmac->uni_pf_addr1);
+ writel(uni_pf2, &rxmac->uni_pf_addr2);
+ writel(uni_pf3, &rxmac->uni_pf_addr3);
}
}
diff --git a/drivers/staging/et131x/et1310_phy.c b/drivers/staging/et131x/et1310_phy.c
index 2798a2f..0bcb7fb 100644
--- a/drivers/staging/et131x/et1310_phy.c
+++ b/drivers/staging/et131x/et1310_phy.c
@@ -99,7 +99,7 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev);
/**
* PhyMiRead - Read from the PHY through the MII Interface on the MAC
* @etdev: pointer to our private adapter structure
- * @xcvrAddr: the address of the transciever
+ * @xcvrAddr: the address of the transceiver
* @xcvrReg: the register to read
* @value: pointer to a 16-bit value in which the value will be stored
*
@@ -108,7 +108,7 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev);
int PhyMiRead(struct et131x_adapter *etdev, u8 xcvrAddr,
u8 xcvrReg, u16 *value)
{
- struct _MAC_t __iomem *mac = &etdev->regs->mac;
+ struct mac_regs __iomem *mac = &etdev->regs->mac;
int status = 0;
u32 delay;
u32 miiAddr;
@@ -176,9 +176,9 @@ int PhyMiRead(struct et131x_adapter *etdev, u8 xcvrAddr,
*/
int MiWrite(struct et131x_adapter *etdev, u8 xcvrReg, u16 value)
{
- struct _MAC_t __iomem *mac = &etdev->regs->mac;
+ struct mac_regs __iomem *mac = &etdev->regs->mac;
int status = 0;
- u8 xcvrAddr = etdev->Stats.xcvr_addr;
+ u8 xcvrAddr = etdev->stats.xcvr_addr;
u32 delay;
u32 miiAddr;
u32 miiCmd;
@@ -259,8 +259,8 @@ int et131x_xcvr_find(struct et131x_adapter *etdev)
xcvr_id = (u32) ((idr1 << 16) | idr2);
if (idr1 != 0 && idr1 != 0xffff) {
- etdev->Stats.xcvr_id = xcvr_id;
- etdev->Stats.xcvr_addr = xcvr_addr;
+ etdev->stats.xcvr_id = xcvr_id;
+ etdev->stats.xcvr_addr = xcvr_addr;
return 0;
}
}
@@ -582,7 +582,7 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev)
u16 lcr2;
/* Zero out the adapter structure variable representing BMSR */
- etdev->Bmsr.value = 0;
+ etdev->bmsr = 0;
MiRead(etdev, (u8) offsetof(struct mi_regs, isr), &isr);
MiRead(etdev, (u8) offsetof(struct mi_regs, imr), &imr);
@@ -590,7 +590,7 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev)
/* Set the link status interrupt only. Bad behavior when link status
* and auto neg are set, we run into a nested interrupt problem
*/
- imr |= 0x0105;
+ imr |= 0x0105;
MiWrite(etdev, (u8) offsetof(struct mi_regs, imr), imr);
@@ -729,7 +729,7 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev)
}
void et131x_Mii_check(struct et131x_adapter *etdev,
- MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints)
+ u16 bmsr, u16 bmsr_ints)
{
u8 link_status;
u32 autoneg_status;
@@ -740,8 +740,8 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
u32 polarity;
unsigned long flags;
- if (bmsr_ints.bits.link_status) {
- if (bmsr.bits.link_status) {
+ if (bmsr_ints & MI_BMSR_LINK_STATUS) {
+ if (bmsr & MI_BMSR_LINK_STATUS) {
etdev->boot_coma = 20;
/* Update our state variables and indicate the
@@ -750,7 +750,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
spin_lock_irqsave(&etdev->Lock, flags);
etdev->MediaState = NETIF_STATUS_MEDIA_CONNECT;
- etdev->Flags &= ~fMP_ADAPTER_LINK_DETECTION;
spin_unlock_irqrestore(&etdev->Lock, flags);
@@ -780,8 +779,7 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
* Timer expires, we can report disconnected (handled
* in the LinkDetectionDPC).
*/
- if (!(etdev->Flags & fMP_ADAPTER_LINK_DETECTION) ||
- (etdev->MediaState == NETIF_STATUS_MEDIA_DISCONNECT)) {
+ if ((etdev->MediaState == NETIF_STATUS_MEDIA_DISCONNECT)) {
spin_lock_irqsave(&etdev->Lock, flags);
etdev->MediaState =
NETIF_STATUS_MEDIA_DISCONNECT;
@@ -822,9 +820,10 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
}
}
- if (bmsr_ints.bits.auto_neg_complete ||
- (etdev->AiForceDpx == 3 && bmsr_ints.bits.link_status)) {
- if (bmsr.bits.auto_neg_complete || etdev->AiForceDpx == 3) {
+ if ((bmsr_ints & MI_BMSR_AUTO_NEG_COMPLETE) ||
+ (etdev->AiForceDpx == 3 && (bmsr_ints & MI_BMSR_LINK_STATUS))) {
+ if ((bmsr & MI_BMSR_AUTO_NEG_COMPLETE) ||
+ etdev->AiForceDpx == 3) {
ET1310_PhyLinkStatus(etdev,
&link_status, &autoneg_status,
&speed, &duplex, &mdi_mdix,
diff --git a/drivers/staging/et131x/et1310_phy.h b/drivers/staging/et131x/et1310_phy.h
index 946c0c54..6b38a3e 100644
--- a/drivers/staging/et131x/et1310_phy.h
+++ b/drivers/staging/et131x/et1310_phy.h
@@ -126,119 +126,66 @@ struct mi_regs {
u8 mi_res4[3]; /* Future use by MI working group(Reg 0x1D - 0x1F) */
};
-/* MI Register 0: Basic mode control register */
-typedef union _MI_BMCR_t {
- u16 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u16 reset:1; /* bit 15 */
- u16 loopback:1; /* bit 14 */
- u16 speed_sel:1; /* bit 13 */
- u16 enable_autoneg:1; /* bit 12 */
- u16 power_down:1; /* bit 11 */
- u16 isolate:1; /* bit 10 */
- u16 restart_autoneg:1; /* bit 9 */
- u16 duplex_mode:1; /* bit 8 */
- u16 col_test:1; /* bit 7 */
- u16 speed_1000_sel:1; /* bit 6 */
- u16 res1:6; /* bits 0-5 */
-#else
- u16 res1:6; /* bits 0-5 */
- u16 speed_1000_sel:1; /* bit 6 */
- u16 col_test:1; /* bit 7 */
- u16 duplex_mode:1; /* bit 8 */
- u16 restart_autoneg:1; /* bit 9 */
- u16 isolate:1; /* bit 10 */
- u16 power_down:1; /* bit 11 */
- u16 enable_autoneg:1; /* bit 12 */
- u16 speed_sel:1; /* bit 13 */
- u16 loopback:1; /* bit 14 */
- u16 reset:1; /* bit 15 */
-#endif
- } bits;
-} MI_BMCR_t, *PMI_BMCR_t;
-
-/* MI Register 1: Basic mode status register */
-typedef union _MI_BMSR_t {
- u16 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u16 link_100T4:1; /* bit 15 */
- u16 link_100fdx:1; /* bit 14 */
- u16 link_100hdx:1; /* bit 13 */
- u16 link_10fdx:1; /* bit 12 */
- u16 link_10hdx:1; /* bit 11 */
- u16 link_100T2fdx:1; /* bit 10 */
- u16 link_100T2hdx:1; /* bit 9 */
- u16 extend_status:1; /* bit 8 */
- u16 res1:1; /* bit 7 */
- u16 preamble_supress:1; /* bit 6 */
- u16 auto_neg_complete:1; /* bit 5 */
- u16 remote_fault:1; /* bit 4 */
- u16 auto_neg_able:1; /* bit 3 */
- u16 link_status:1; /* bit 2 */
- u16 jabber_detect:1; /* bit 1 */
- u16 ext_cap:1; /* bit 0 */
-#else
- u16 ext_cap:1; /* bit 0 */
- u16 jabber_detect:1; /* bit 1 */
- u16 link_status:1; /* bit 2 */
- u16 auto_neg_able:1; /* bit 3 */
- u16 remote_fault:1; /* bit 4 */
- u16 auto_neg_complete:1; /* bit 5 */
- u16 preamble_supress:1; /* bit 6 */
- u16 res1:1; /* bit 7 */
- u16 extend_status:1; /* bit 8 */
- u16 link_100T2hdx:1; /* bit 9 */
- u16 link_100T2fdx:1; /* bit 10 */
- u16 link_10hdx:1; /* bit 11 */
- u16 link_10fdx:1; /* bit 12 */
- u16 link_100hdx:1; /* bit 13 */
- u16 link_100fdx:1; /* bit 14 */
- u16 link_100T4:1; /* bit 15 */
-#endif
- } bits;
-} MI_BMSR_t, *PMI_BMSR_t;
-
-/* MI Register 4: Auto-negotiation advertisement register */
-typedef union _MI_ANAR_t {
- u16 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u16 np_indication:1; /* bit 15 */
- u16 res2:1; /* bit 14 */
- u16 remote_fault:1; /* bit 13 */
- u16 res1:1; /* bit 12 */
- u16 cap_asmpause:1; /* bit 11 */
- u16 cap_pause:1; /* bit 10 */
- u16 cap_100T4:1; /* bit 9 */
- u16 cap_100fdx:1; /* bit 8 */
- u16 cap_100hdx:1; /* bit 7 */
- u16 cap_10fdx:1; /* bit 6 */
- u16 cap_10hdx:1; /* bit 5 */
- u16 selector:5; /* bits 0-4 */
-#else
- u16 selector:5; /* bits 0-4 */
- u16 cap_10hdx:1; /* bit 5 */
- u16 cap_10fdx:1; /* bit 6 */
- u16 cap_100hdx:1; /* bit 7 */
- u16 cap_100fdx:1; /* bit 8 */
- u16 cap_100T4:1; /* bit 9 */
- u16 cap_pause:1; /* bit 10 */
- u16 cap_asmpause:1; /* bit 11 */
- u16 res1:1; /* bit 12 */
- u16 remote_fault:1; /* bit 13 */
- u16 res2:1; /* bit 14 */
- u16 np_indication:1; /* bit 15 */
-#endif
- } bits;
-} MI_ANAR_t, *PMI_ANAR_t;
+/*
+ * MI Register 0: Basic mode control register
+ * 15: reset
+ * 14: loopback
+ * 13: speed_sel
+ * 12: enable_autoneg
+ * 11: power_down
+ * 10: isolate
+ * 9: restart_autoneg
+ * 8: duplex_mode
+ * 7: col_test
+ * 6: speed_1000_sel
+ * 5-0: res1
+ */
+
+/*
+ * MI Register 1: Basic mode status register
+ * 15: link_100T4
+ * 14: link_100fdx
+ * 13: link_100hdx
+ * 12: link_10fdx
+ * 11: link_10hdx
+ * 10: link_100T2fdx
+ * 9: link_100T2hdx
+ * 8: extend_status
+ * 7: res1
+ * 6: preamble_supress
+ * 5: auto_neg_complete
+ * 4: remote_fault
+ * 3: auto_neg_able
+ * 2: link_status
+ * 1: jabber_detect
+ * 0: ext_cap
+ */
+
+#define MI_BMSR_LINK_STATUS 0x04
+#define MI_BMSR_AUTO_NEG_COMPLETE 0x20
+
+/*
+ * MI Register 4: Auto-negotiation advertisement register
+ *
+ * 15: np_indication
+ * 14: res2
+ * 13: remote_fault
+ * 12: res1
+ * 11: cap_asmpause
+ * 10: cap_pause
+ * 9: cap_100T4
+ * 8: cap_100fdx
+ * 7: cap_100hdx
+ * 6: cap_10fdx
+ * 5: cap_10hdx
+ * 4-0: selector
+ */
/* MI Register 5: Auto-negotiation link partner advertisement register
* 15: np_indication
* 14: acknowledge
* 13: remote_fault
- * 12: res1:1;
+ * 12: res1
* 11: cap_asmpause
* 10: cap_pause
* 9: cap_100T4
@@ -258,7 +205,7 @@ typedef union _MI_ANAR_t {
* 0: lp_an_able
*/
-/* MI Register 7: Auto-negotiation next page transmit reg(0x07)
+/* MI Register 7: Auto-negotiation next page transmit reg(0x07)
* 15: np
* 14: reserved
* 13: msg_page
@@ -267,7 +214,7 @@ typedef union _MI_ANAR_t {
* 10-0 msg
*/
-/* MI Register 8: Link Partner Next Page Reg(0x08)
+/* MI Register 8: Link Partner Next Page Reg(0x08)
* 15: np
* 14: ack
* 13: msg_page
@@ -473,7 +420,7 @@ typedef union _MI_ANAR_t {
#define TRUEPHY_ADV_DUPLEX_FULL 0x01
#define TRUEPHY_ADV_DUPLEX_HALF 0x02
#define TRUEPHY_ADV_DUPLEX_BOTH \
- (TRUEPHY_ADV_DUPLEX_FULL | TRUEPHY_ADV_DUPLEX_HALF)
+ (TRUEPHY_ADV_DUPLEX_FULL | TRUEPHY_ADV_DUPLEX_HALF)
#define PHY_CONTROL 0x00 /* #define TRU_MI_CONTROL_REGISTER 0 */
#define PHY_STATUS 0x01 /* #define TRU_MI_STATUS_REGISTER 1 */
diff --git a/drivers/staging/et131x/et1310_pm.c b/drivers/staging/et131x/et1310_pm.c
index 2bc1944..29d4d66 100644
--- a/drivers/staging/et131x/et1310_pm.c
+++ b/drivers/staging/et131x/et1310_pm.c
@@ -121,7 +121,7 @@ void EnablePhyComa(struct et131x_adapter *etdev)
/* Stop sending packets. */
spin_lock_irqsave(&etdev->send_hw_lock, flags);
- etdev->Flags |= fMP_ADAPTER_LOWER_POWER;
+ etdev->flags |= fMP_ADAPTER_LOWER_POWER;
spin_unlock_irqrestore(&etdev->send_hw_lock, flags);
/* Wait for outstanding Receive packets */
@@ -172,7 +172,7 @@ void DisablePhyComa(struct et131x_adapter *etdev)
et131x_adapter_setup(etdev);
/* Allow Tx to restart */
- etdev->Flags &= ~fMP_ADAPTER_LOWER_POWER;
+ etdev->flags &= ~fMP_ADAPTER_LOWER_POWER;
/* Need to re-enable Rx. */
et131x_rx_dma_enable(etdev);
diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index fc6bd43..7e386e0 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -88,7 +88,23 @@
#include "et1310_rx.h"
#include "et131x.h"
-void nic_return_rfd(struct et131x_adapter *etdev, struct rfd *rfd);
+static inline u32 bump_fbr(u32 *fbr, u32 limit)
+{
+ u32 v = *fbr;
+ v++;
+ /* This works for all cases where limit < 1024. The 1023 case
+ works because 1023++ is 1024 which means the if condition is not
+ taken but the carry of the bit into the wrap bit toggles the wrap
+ value correctly */
+ if ((v & ET_DMA10_MASK) > limit) {
+ v &= ~ET_DMA10_MASK;
+ v ^= ET_DMA10_WRAP;
+ }
+ /* For the 1023 case */
+ v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
+ *fbr = v;
+ return v;
+}
/**
* et131x_rx_dma_memory_alloc
@@ -246,7 +262,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
&rx_ring->Fbr1MemPa[i]);
if (!rx_ring->Fbr1MemVa[i]) {
- dev_err(&adapter->pdev->dev,
+ dev_err(&adapter->pdev->dev,
"Could not alloc memory\n");
return -ENOMEM;
}
@@ -378,7 +394,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
SLAB_HWCACHE_ALIGN,
NULL);
- adapter->Flags |= fMP_ADAPTER_RECV_LOOKASIDE;
+ adapter->flags |= fMP_ADAPTER_RECV_LOOKASIDE;
/* The RFDs are going to be put on lists later on, so initialize the
* lists now.
@@ -491,7 +507,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
/* Free Packet Status Ring */
if (rx_ring->pPSRingVa) {
pktStatRingSize =
- sizeof(struct pkt_stat_desc) * adapter->rx_ring.PsrNumEntries;
+ sizeof(struct pkt_stat_desc) * adapter->rx_ring.PsrNumEntries;
pci_free_consistent(adapter->pdev, pktStatRingSize,
rx_ring->pPSRingVa, rx_ring->pPSRingPa);
@@ -512,9 +528,9 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
/* Free receive packet pool */
/* Destroy the lookaside (RFD) pool */
- if (adapter->Flags & fMP_ADAPTER_RECV_LOOKASIDE) {
+ if (adapter->flags & fMP_ADAPTER_RECV_LOOKASIDE) {
kmem_cache_destroy(rx_ring->RecvLookaside);
- adapter->Flags &= ~fMP_ADAPTER_RECV_LOOKASIDE;
+ adapter->flags &= ~fMP_ADAPTER_RECV_LOOKASIDE;
}
/* Free the FBR Lookup Table */
@@ -708,6 +724,82 @@ void SetRxDmaTimer(struct et131x_adapter *etdev)
}
/**
+ * NICReturnRFD - Recycle a RFD and put it back onto the receive list
+ * @etdev: pointer to our adapter
+ * @rfd: pointer to the RFD
+ */
+void nic_return_rfd(struct et131x_adapter *etdev, struct rfd *rfd)
+{
+ struct rx_ring *rx_local = &etdev->rx_ring;
+ struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma;
+ u16 bi = rfd->bufferindex;
+ u8 ri = rfd->ringindex;
+ unsigned long flags;
+
+ /* We don't use any of the OOB data besides status. Otherwise, we
+ * need to clean up OOB data
+ */
+ if (
+#ifdef USE_FBR0
+ (ri == 0 && bi < rx_local->Fbr0NumEntries) ||
+#endif
+ (ri == 1 && bi < rx_local->Fbr1NumEntries)) {
+ spin_lock_irqsave(&etdev->FbrLock, flags);
+
+ if (ri == 1) {
+ struct fbr_desc *next =
+ (struct fbr_desc *) (rx_local->pFbr1RingVa) +
+ INDEX10(rx_local->local_Fbr1_full);
+
+ /* Handle the Free Buffer Ring advancement here. Write
+ * the PA / Buffer Index for the returned buffer into
+ * the oldest (next to be freed)FBR entry
+ */
+ next->addr_hi = rx_local->fbr[1]->bus_high[bi];
+ next->addr_lo = rx_local->fbr[1]->bus_low[bi];
+ next->word2 = bi;
+
+ writel(bump_fbr(&rx_local->local_Fbr1_full,
+ rx_local->Fbr1NumEntries - 1),
+ &rx_dma->fbr1_full_offset);
+ }
+#ifdef USE_FBR0
+ else {
+ struct fbr_desc *next = (struct fbr_desc *)
+ rx_local->pFbr0RingVa +
+ INDEX10(rx_local->local_Fbr0_full);
+
+ /* Handle the Free Buffer Ring advancement here. Write
+ * the PA / Buffer Index for the returned buffer into
+ * the oldest (next to be freed) FBR entry
+ */
+ next->addr_hi = rx_local->fbr[0]->bus_high[bi];
+ next->addr_lo = rx_local->fbr[0]->bus_low[bi];
+ next->word2 = bi;
+
+ writel(bump_fbr(&rx_local->local_Fbr0_full,
+ rx_local->Fbr0NumEntries - 1),
+ &rx_dma->fbr0_full_offset);
+ }
+#endif
+ spin_unlock_irqrestore(&etdev->FbrLock, flags);
+ } else {
+ dev_err(&etdev->pdev->dev,
+ "NICReturnRFD illegal Buffer Index returned\n");
+ }
+
+ /* The processing on this RFD is done, so put it back on the tail of
+ * our list
+ */
+ spin_lock_irqsave(&etdev->rcv_lock, flags);
+ list_add_tail(&rfd->list_node, &rx_local->RecvList);
+ rx_local->nReadyRecv++;
+ spin_unlock_irqrestore(&etdev->rcv_lock, flags);
+
+ WARN_ON(rx_local->nReadyRecv > rx_local->NumRfd);
+}
+
+/**
* et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310
* @etdev: pointer to our adapter structure
*/
@@ -776,7 +868,7 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev)
* the packet to it, puts the RFD in the RecvPendList, and also returns
* the pointer to the RFD.
*/
-struct rfd * nic_rx_pkts(struct et131x_adapter *etdev)
+struct rfd *nic_rx_pkts(struct et131x_adapter *etdev)
{
struct rx_ring *rx_local = &etdev->rx_ring;
struct rx_status_block *status;
@@ -879,7 +971,7 @@ struct rfd * nic_rx_pkts(struct et131x_adapter *etdev)
* also counted here.
*/
if (len < (NIC_MIN_PACKET_SIZE + 4)) {
- etdev->Stats.other_errors++;
+ etdev->stats.other_errors++;
len = 0;
}
@@ -947,16 +1039,16 @@ struct rfd * nic_rx_pkts(struct et131x_adapter *etdev)
}
if (len > 0)
- etdev->Stats.multircv++;
+ etdev->stats.multircv++;
} else if (word0 & ALCATEL_BROADCAST_PKT)
- etdev->Stats.brdcstrcv++;
+ etdev->stats.brdcstrcv++;
else
/* Not sure what this counter measures in
* promiscuous mode. Perhaps we should check
* the MAC address to see if it is directed
* to us in promiscuous mode.
*/
- etdev->Stats.unircv++;
+ etdev->stats.unircv++;
}
if (len > 0) {
@@ -1034,13 +1126,12 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
* Free buffer ring.
*/
if (!etdev->PacketFilter ||
- !(etdev->Flags & fMP_ADAPTER_LINK_DETECTION) ||
- rfd->len == 0) {
+ !netif_carrier_ok(etdev->netdev) ||
+ rfd->len == 0)
continue;
- }
/* Increment the number of packets we received */
- etdev->Stats.ipackets++;
+ etdev->net_stats.rx_packets++;
/* Set the status on the packet, either resources or success */
if (etdev->rx_ring.nReadyRecv < RFD_LOW_WATER_MARK) {
@@ -1059,96 +1150,3 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
etdev->rx_ring.UnfinishedReceives = false;
}
-static inline u32 bump_fbr(u32 *fbr, u32 limit)
-{
- u32 v = *fbr;
- v++;
- /* This works for all cases where limit < 1024. The 1023 case
- works because 1023++ is 1024 which means the if condition is not
- taken but the carry of the bit into the wrap bit toggles the wrap
- value correctly */
- if ((v & ET_DMA10_MASK) > limit) {
- v &= ~ET_DMA10_MASK;
- v ^= ET_DMA10_WRAP;
- }
- /* For the 1023 case */
- v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
- *fbr = v;
- return v;
-}
-
-/**
- * NICReturnRFD - Recycle a RFD and put it back onto the receive list
- * @etdev: pointer to our adapter
- * @rfd: pointer to the RFD
- */
-void nic_return_rfd(struct et131x_adapter *etdev, struct rfd *rfd)
-{
- struct rx_ring *rx_local = &etdev->rx_ring;
- struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma;
- u16 bi = rfd->bufferindex;
- u8 ri = rfd->ringindex;
- unsigned long flags;
-
- /* We don't use any of the OOB data besides status. Otherwise, we
- * need to clean up OOB data
- */
- if (
-#ifdef USE_FBR0
- (ri == 0 && bi < rx_local->Fbr0NumEntries) ||
-#endif
- (ri == 1 && bi < rx_local->Fbr1NumEntries)) {
- spin_lock_irqsave(&etdev->FbrLock, flags);
-
- if (ri == 1) {
- struct fbr_desc *next =
- (struct fbr_desc *) (rx_local->pFbr1RingVa) +
- INDEX10(rx_local->local_Fbr1_full);
-
- /* Handle the Free Buffer Ring advancement here. Write
- * the PA / Buffer Index for the returned buffer into
- * the oldest (next to be freed)FBR entry
- */
- next->addr_hi = rx_local->fbr[1]->bus_high[bi];
- next->addr_lo = rx_local->fbr[1]->bus_low[bi];
- next->word2 = bi;
-
- writel(bump_fbr(&rx_local->local_Fbr1_full,
- rx_local->Fbr1NumEntries - 1),
- &rx_dma->fbr1_full_offset);
- }
-#ifdef USE_FBR0
- else {
- struct fbr_desc *next = (struct fbr_desc *)
- rx_local->pFbr0RingVa +
- INDEX10(rx_local->local_Fbr0_full);
-
- /* Handle the Free Buffer Ring advancement here. Write
- * the PA / Buffer Index for the returned buffer into
- * the oldest (next to be freed) FBR entry
- */
- next->addr_hi = rx_local->fbr[0]->bus_high[bi];
- next->addr_lo = rx_local->fbr[0]->bus_low[bi];
- next->word2 = bi;
-
- writel(bump_fbr(&rx_local->local_Fbr0_full,
- rx_local->Fbr0NumEntries - 1),
- &rx_dma->fbr0_full_offset);
- }
-#endif
- spin_unlock_irqrestore(&etdev->FbrLock, flags);
- } else {
- dev_err(&etdev->pdev->dev,
- "NICReturnRFD illegal Buffer Index returned\n");
- }
-
- /* The processing on this RFD is done, so put it back on the tail of
- * our list
- */
- spin_lock_irqsave(&etdev->rcv_lock, flags);
- list_add_tail(&rfd->list_node, &rx_local->RecvList);
- rx_local->nReadyRecv++;
- spin_unlock_irqrestore(&etdev->rcv_lock, flags);
-
- WARN_ON(rx_local->nReadyRecv > rx_local->NumRfd);
-}
diff --git a/drivers/staging/et131x/et1310_tx.c b/drivers/staging/et131x/et1310_tx.c
index 4241d2a..8fb3051 100644
--- a/drivers/staging/et131x/et1310_tx.c
+++ b/drivers/staging/et131x/et1310_tx.c
@@ -307,7 +307,7 @@ int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev)
/* We need to see if the link is up; if it's not, make the
* netif layer think we're good and drop the packet
*/
- if ((etdev->Flags & fMP_ADAPTER_FAIL_SEND_MASK) ||
+ if ((etdev->flags & fMP_ADAPTER_FAIL_SEND_MASK) ||
!netif_carrier_ok(netdev)) {
dev_kfree_skb_any(skb);
skb = NULL;
@@ -635,11 +635,11 @@ inline void et131x_free_send_packet(struct et131x_adapter *etdev,
struct net_device_stats *stats = &etdev->net_stats;
if (tcb->flags & fMP_DEST_BROAD)
- atomic_inc(&etdev->Stats.brdcstxmt);
+ atomic_inc(&etdev->stats.brdcstxmt);
else if (tcb->flags & fMP_DEST_MULTI)
- atomic_inc(&etdev->Stats.multixmt);
+ atomic_inc(&etdev->stats.multixmt);
else
- atomic_inc(&etdev->Stats.unixmt);
+ atomic_inc(&etdev->stats.unixmt);
if (tcb->skb) {
stats->tx_bytes += tcb->skb->len;
@@ -673,7 +673,7 @@ inline void et131x_free_send_packet(struct et131x_adapter *etdev,
/* Add the TCB to the Ready Q */
spin_lock_irqsave(&etdev->TCBReadyQLock, flags);
- etdev->Stats.opackets++;
+ etdev->net_stats.tx_packets++;
if (etdev->tx_ring.tcb_qtail)
etdev->tx_ring.tcb_qtail->next = tcb;
@@ -747,7 +747,7 @@ void et131x_handle_send_interrupt(struct et131x_adapter *etdev)
struct tcb *tcb;
u32 index;
- serviced = readl(&etdev->regs->txdma.NewServiceComplete);
+ serviced = readl(&etdev->regs->txdma.new_service_complete);
index = INDEX10(serviced);
/* Has the ring wrapped? Process any descriptors that do not have
diff --git a/drivers/staging/et131x/et131x.h b/drivers/staging/et131x/et131x.h
index 8aa3365..48ebac0 100644
--- a/drivers/staging/et131x/et131x.h
+++ b/drivers/staging/et131x/et131x.h
@@ -108,12 +108,12 @@ void et131x_setphy_normal(struct et131x_adapter *adapter);
int PhyMiRead(struct et131x_adapter *adapter, u8 xcvrAddr,
u8 xcvrReg, u16 *value);
#define MiRead(adapter, xcvrReg, value) \
- PhyMiRead((adapter), (adapter)->Stats.xcvr_addr, (xcvrReg), (value))
+ PhyMiRead((adapter), (adapter)->stats.xcvr_addr, (xcvrReg), (value))
int32_t MiWrite(struct et131x_adapter *adapter,
u8 xcvReg, u16 value);
void et131x_Mii_check(struct et131x_adapter *pAdapter,
- MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints);
+ u16 bmsr, u16 bmsr_ints);
/* This last is not strictly required (the driver could call the TPAL
* version instead), but this sets the adapter up correctly, and calls the
diff --git a/drivers/staging/et131x/et131x_adapter.h b/drivers/staging/et131x/et131x_adapter.h
index c852f86..408c50b 100644
--- a/drivers/staging/et131x/et131x_adapter.h
+++ b/drivers/staging/et131x/et131x_adapter.h
@@ -67,7 +67,7 @@
* Do not change these values: if changed, then change also in respective
* TXdma and Rxdma engines
*/
-#define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */
+#define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */
#define NUM_TCB 64
/*
@@ -98,11 +98,7 @@ struct rfd {
#define FLOW_NONE 3
/* Struct to define some device statistics */
-typedef struct _ce_stats_t {
- /* Link Input/Output stats */
- uint64_t ipackets; /* # of in packets */
- uint64_t opackets; /* # of out packets */
-
+struct ce_stats {
/* MIB II variables
*
* NOTE: atomic_t types are only guaranteed to store 24-bits; if we
@@ -118,7 +114,7 @@ typedef struct _ce_stats_t {
u32 norcvbuf; /* # Rx packets discarded */
u32 noxmtbuf; /* # Tx packets discarded */
- /* Transciever state informations. */
+ /* Transceiver state informations. */
u8 xcvr_addr;
u32 xcvr_id;
@@ -143,7 +139,7 @@ typedef struct _ce_stats_t {
u32 SynchrounousIterations;
u32 InterruptStatus;
-} CE_STATS_t, *PCE_STATS_t;
+};
/* The private adapter structure */
@@ -154,7 +150,7 @@ struct et131x_adapter {
struct work_struct task;
/* Flags that indicate current state of the adapter */
- u32 Flags;
+ u32 flags;
u32 HwErrCount;
/* Configuration */
@@ -186,7 +182,7 @@ struct et131x_adapter {
u8 MCList[NIC_MAX_MCAST_LIST][ETH_ALEN];
/* Pointer to the device's PCI register space */
- ADDRESS_MAP_t __iomem *regs;
+ struct address_map __iomem *regs;
/* Registry parameters */
u8 SpeedDuplex; /* speed/duplex */
@@ -226,7 +222,7 @@ struct et131x_adapter {
u32 CachedMaskValue;
/* Xcvr status at last poll */
- MI_BMSR_t Bmsr;
+ u16 bmsr;
/* Tx Memory Variables */
struct tx_ring tx_ring;
@@ -239,10 +235,9 @@ struct et131x_adapter {
u8 ReplicaPhyLoopbkPF; /* Replica Enable Pass/Fail */
/* Stats */
- CE_STATS_t Stats;
+ struct ce_stats stats;
struct net_device_stats net_stats;
- struct net_device_stats net_stats_prev;
};
#endif /* __ET131X_ADAPTER_H__ */
diff --git a/drivers/staging/et131x/et131x_defs.h b/drivers/staging/et131x/et131x_defs.h
index d81fc77..3d5193f 100644
--- a/drivers/staging/et131x/et131x_defs.h
+++ b/drivers/staging/et131x/et131x_defs.h
@@ -95,7 +95,6 @@
#define fMP_ADAPTER_HARDWARE_ERROR 0x04000000
#define fMP_ADAPTER_REMOVE_IN_PROGRESS 0x08000000
#define fMP_ADAPTER_HALT_IN_PROGRESS 0x10000000
-#define fMP_ADAPTER_LINK_DETECTION 0x20000000
#define fMP_ADAPTER_FAIL_SEND_MASK 0x3ff00000
#define fMP_ADAPTER_NOT_READY_MASK 0x3ff00000
diff --git a/drivers/staging/et131x/et131x_initpci.c b/drivers/staging/et131x/et131x_initpci.c
index 50237ac..8c8d6b8 100644
--- a/drivers/staging/et131x/et131x_initpci.c
+++ b/drivers/staging/et131x/et131x_initpci.c
@@ -113,13 +113,13 @@
static u32 et131x_speed_set;
module_param(et131x_speed_set, uint, 0);
MODULE_PARM_DESC(et131x_speed_set,
- "Set Link speed and dublex manually (0-5) [0]\n \
- 1 : 10Mb Half-Duplex\n \
- 2 : 10Mb Full-Duplex\n \
- 3 : 100Mb Half-Duplex\n \
- 4 : 100Mb Full-Duplex\n \
- 5 : 1000Mb Full-Duplex\n \
- 0 : Auto Speed Auto Dublex");
+ "Set Link speed and dublex manually (0-5) [0]\n"
+ "1 : 10Mb Half-Duplex\n"
+ "2 : 10Mb Full-Duplex\n"
+ "3 : 100Mb Half-Duplex\n"
+ "4 : 100Mb Full-Duplex\n"
+ "5 : 1000Mb Full-Duplex\n"
+ "0 : Auto Speed Auto Dublex");
/**
* et131x_hwaddr_init - set up the MAC Address on the ET1310
@@ -274,14 +274,14 @@ void et131x_error_timer_handler(unsigned long data)
dev_err(&etdev->pdev->dev,
"No interrupts, in PHY coma, pm_csr = 0x%x\n", pm_csr);
- if (!etdev->Bmsr.bits.link_status &&
+ if (!(etdev->bmsr & MI_BMSR_LINK_STATUS) &&
etdev->RegistryPhyComa &&
etdev->boot_coma < 11) {
etdev->boot_coma++;
}
if (etdev->boot_coma == 10) {
- if (!etdev->Bmsr.bits.link_status
+ if (!(etdev->bmsr & MI_BMSR_LINK_STATUS)
&& etdev->RegistryPhyComa) {
if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
/* NOTE - This was originally a 'sync with
@@ -312,7 +312,6 @@ void et131x_link_detection_handler(unsigned long data)
spin_lock_irqsave(&etdev->Lock, flags);
etdev->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
- etdev->Flags &= ~fMP_ADAPTER_LINK_DETECTION;
spin_unlock_irqrestore(&etdev->Lock, flags);
@@ -539,7 +538,8 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
struct et131x_adapter *etdev;
- /* Setup the fundamental net_device and private adapter structure elements */
+ /* Setup the fundamental net_device and private adapter structure
+ * elements */
SET_NETDEV_DEV(netdev, &pdev->dev);
/* Allocate private adapter struct and copy in relevant information */
@@ -807,12 +807,12 @@ static struct pci_device_id et131x_pci_table[] __devinitdata = {
MODULE_DEVICE_TABLE(pci, et131x_pci_table);
static struct pci_driver et131x_driver = {
- .name = DRIVER_NAME,
- .id_table = et131x_pci_table,
- .probe = et131x_pci_setup,
- .remove = __devexit_p(et131x_pci_remove),
- .suspend = NULL, /* et131x_pci_suspend */
- .resume = NULL, /* et131x_pci_resume */
+ .name = DRIVER_NAME,
+ .id_table = et131x_pci_table,
+ .probe = et131x_pci_setup,
+ .remove = __devexit_p(et131x_pci_remove),
+ .suspend = NULL, /* et131x_pci_suspend */
+ .resume = NULL, /* et131x_pci_resume */
};
diff --git a/drivers/staging/et131x/et131x_isr.c b/drivers/staging/et131x/et131x_isr.c
index f716e40..9c33209 100644
--- a/drivers/staging/et131x/et131x_isr.c
+++ b/drivers/staging/et131x/et131x_isr.c
@@ -222,7 +222,7 @@ irqreturn_t et131x_isr(int irq, void *dev_id)
* DPC. We will clear the software copy of that in that
* routine.
*/
- adapter->Stats.InterruptStatus = status;
+ adapter->stats.InterruptStatus = status;
/* Schedule the ISR handler as a bottom-half task in the
* kernel's tq_immediate queue, and mark the queue for
@@ -244,8 +244,8 @@ void et131x_isr_handler(struct work_struct *work)
{
struct et131x_adapter *etdev =
container_of(work, struct et131x_adapter, task);
- u32 status = etdev->Stats.InterruptStatus;
- ADDRESS_MAP_t __iomem *iomem = etdev->regs;
+ u32 status = etdev->stats.InterruptStatus;
+ struct address_map __iomem *iomem = etdev->regs;
/*
* These first two are by far the most common. Once handled, we clear
@@ -268,7 +268,7 @@ void et131x_isr_handler(struct work_struct *work)
u32 txdma_err;
/* Following read also clears the register (COR) */
- txdma_err = readl(&iomem->txdma.TxDmaError);
+ txdma_err = readl(&iomem->txdma.tx_dma_error);
dev_warn(&etdev->pdev->dev,
"TXDMA_ERR interrupt, error = %d\n",
@@ -365,7 +365,8 @@ void et131x_isr_handler(struct work_struct *work)
/* Handle the PHY interrupt */
if (status & ET_INTR_PHY) {
u32 pm_csr;
- MI_BMSR_t BmsrInts, BmsrData;
+ u16 bmsr_ints;
+ u16 bmsr_data;
u16 myisr;
/* If we are in coma mode when we get this interrupt,
@@ -390,14 +391,13 @@ void et131x_isr_handler(struct work_struct *work)
if (!etdev->ReplicaPhyLoopbk) {
MiRead(etdev,
(uint8_t) offsetof(struct mi_regs, bmsr),
- &BmsrData.value);
+ &bmsr_data);
- BmsrInts.value =
- etdev->Bmsr.value ^ BmsrData.value;
- etdev->Bmsr.value = BmsrData.value;
+ bmsr_ints = etdev->bmsr ^ bmsr_data;
+ etdev->bmsr = bmsr_data;
/* Do all the cable in / cable out stuff */
- et131x_Mii_check(etdev, BmsrData, BmsrInts);
+ et131x_Mii_check(etdev, bmsr_data, bmsr_ints);
}
}
diff --git a/drivers/staging/et131x/et131x_netdev.c b/drivers/staging/et131x/et131x_netdev.c
index 95555d2..5f25bba 100644
--- a/drivers/staging/et131x/et131x_netdev.c
+++ b/drivers/staging/et131x/et131x_netdev.c
@@ -88,82 +88,18 @@
#include "et131x_adapter.h"
#include "et131x.h"
-struct net_device_stats *et131x_stats(struct net_device *netdev);
-int et131x_open(struct net_device *netdev);
-int et131x_close(struct net_device *netdev);
-int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, int cmd);
-void et131x_multicast(struct net_device *netdev);
-int et131x_tx(struct sk_buff *skb, struct net_device *netdev);
-void et131x_tx_timeout(struct net_device *netdev);
-int et131x_change_mtu(struct net_device *netdev, int new_mtu);
-int et131x_set_mac_addr(struct net_device *netdev, void *new_mac);
-void et131x_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
-void et131x_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
-
-static const struct net_device_ops et131x_netdev_ops = {
- .ndo_open = et131x_open,
- .ndo_stop = et131x_close,
- .ndo_start_xmit = et131x_tx,
- .ndo_set_multicast_list = et131x_multicast,
- .ndo_tx_timeout = et131x_tx_timeout,
- .ndo_change_mtu = et131x_change_mtu,
- .ndo_set_mac_address = et131x_set_mac_addr,
- .ndo_validate_addr = eth_validate_addr,
- .ndo_get_stats = et131x_stats,
- .ndo_do_ioctl = et131x_ioctl,
-};
-
-/**
- * et131x_device_alloc
- *
- * Returns pointer to the allocated and initialized net_device struct for
- * this device.
- *
- * Create instances of net_device and wl_private for the new adapter and
- * register the device's entry points in the net_device structure.
- */
-struct net_device *et131x_device_alloc(void)
-{
- struct net_device *netdev;
-
- /* Alloc net_device and adapter structs */
- netdev = alloc_etherdev(sizeof(struct et131x_adapter));
-
- if (netdev == NULL) {
- printk(KERN_ERR "et131x: Alloc of net_device struct failed\n");
- return NULL;
- }
-
- /* Setup the function registration table (and other data) for a
- * net_device
- */
- /* netdev->init = &et131x_init; */
- /* netdev->set_config = &et131x_config; */
- netdev->watchdog_timeo = ET131X_TX_TIMEOUT;
- netdev->netdev_ops = &et131x_netdev_ops;
-
- /* netdev->ethtool_ops = &et131x_ethtool_ops; */
-
- /* Poll? */
- /* netdev->poll = &et131x_poll; */
- /* netdev->poll_controller = &et131x_poll_controller; */
- return netdev;
-}
-
/**
* et131x_stats - Return the current device statistics.
* @netdev: device whose stats are being queried
*
* Returns 0 on success, errno on failure (as defined in errno.h)
*/
-struct net_device_stats *et131x_stats(struct net_device *netdev)
+static struct net_device_stats *et131x_stats(struct net_device *netdev)
{
struct et131x_adapter *adapter = netdev_priv(netdev);
struct net_device_stats *stats = &adapter->net_stats;
- CE_STATS_t *devstat = &adapter->Stats;
+ struct ce_stats *devstat = &adapter->stats;
- stats->rx_packets = devstat->ipackets;
- stats->tx_packets = devstat->opackets;
stats->rx_errors = devstat->length_err + devstat->alignment_err +
devstat->crc_err + devstat->code_violations + devstat->other_errors;
stats->tx_errors = devstat->max_pkt_error;
@@ -226,7 +162,7 @@ int et131x_open(struct net_device *netdev)
/* Enable device interrupts */
et131x_enable_interrupts(adapter);
- adapter->Flags |= fMP_ADAPTER_INTERRUPT_IN_USE;
+ adapter->flags |= fMP_ADAPTER_INTERRUPT_IN_USE;
/* We're ready to move some data, so start the queue */
netif_start_queue(netdev);
@@ -254,7 +190,7 @@ int et131x_close(struct net_device *netdev)
et131x_disable_interrupts(adapter);
/* Deregistering ISR */
- adapter->Flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE;
+ adapter->flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE;
free_irq(netdev->irq, netdev);
/* Stop the error timer */
@@ -278,7 +214,7 @@ int et131x_ioctl_mii(struct net_device *netdev, struct ifreq *reqbuf, int cmd)
switch (cmd) {
case SIOCGMIIPHY:
- data->phy_id = etdev->Stats.xcvr_addr;
+ data->phy_id = etdev->stats.xcvr_addr;
break;
case SIOCGMIIREG:
@@ -510,18 +446,14 @@ void et131x_tx_timeout(struct net_device *netdev)
struct tcb *tcb;
unsigned long flags;
- /* Just skip this part if the adapter is doing link detection */
- if (etdev->Flags & fMP_ADAPTER_LINK_DETECTION)
- return;
-
/* Any nonrecoverable hardware error?
* Checks adapter->flags for any failure in phy reading
*/
- if (etdev->Flags & fMP_ADAPTER_NON_RECOVER_ERROR)
+ if (etdev->flags & fMP_ADAPTER_NON_RECOVER_ERROR)
return;
/* Hardware failure? */
- if (etdev->Flags & fMP_ADAPTER_HARDWARE_ERROR) {
+ if (etdev->flags & fMP_ADAPTER_HARDWARE_ERROR) {
dev_err(&etdev->pdev->dev, "hardware error - reset\n");
return;
}
@@ -539,7 +471,7 @@ void et131x_tx_timeout(struct net_device *netdev)
flags);
dev_warn(&etdev->pdev->dev,
- "Send stuck - reset. tcb->WrIndex %x, Flags 0x%08x\n",
+ "Send stuck - reset. tcb->WrIndex %x, flags 0x%08x\n",
tcb->index,
tcb->flags);
@@ -608,7 +540,7 @@ int et131x_change_mtu(struct net_device *netdev, int new_mtu)
et131x_adapter_setup(adapter);
/* Enable interrupts */
- if (adapter->Flags & fMP_ADAPTER_INTERRUPT_IN_USE)
+ if (adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE)
et131x_enable_interrupts(adapter);
/* Restart the Tx and Rx DMA engines */
@@ -690,7 +622,7 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac)
et131x_adapter_setup(adapter);
/* Enable interrupts */
- if (adapter->Flags & fMP_ADAPTER_INTERRUPT_IN_USE)
+ if (adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE)
et131x_enable_interrupts(adapter);
/* Restart the Tx and Rx DMA engines */
@@ -701,3 +633,54 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac)
netif_wake_queue(netdev);
return result;
}
+
+static const struct net_device_ops et131x_netdev_ops = {
+ .ndo_open = et131x_open,
+ .ndo_stop = et131x_close,
+ .ndo_start_xmit = et131x_tx,
+ .ndo_set_multicast_list = et131x_multicast,
+ .ndo_tx_timeout = et131x_tx_timeout,
+ .ndo_change_mtu = et131x_change_mtu,
+ .ndo_set_mac_address = et131x_set_mac_addr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_get_stats = et131x_stats,
+ .ndo_do_ioctl = et131x_ioctl,
+};
+
+/**
+ * et131x_device_alloc
+ *
+ * Returns pointer to the allocated and initialized net_device struct for
+ * this device.
+ *
+ * Create instances of net_device and wl_private for the new adapter and
+ * register the device's entry points in the net_device structure.
+ */
+struct net_device *et131x_device_alloc(void)
+{
+ struct net_device *netdev;
+
+ /* Alloc net_device and adapter structs */
+ netdev = alloc_etherdev(sizeof(struct et131x_adapter));
+
+ if (netdev == NULL) {
+ printk(KERN_ERR "et131x: Alloc of net_device struct failed\n");
+ return NULL;
+ }
+
+ /* Setup the function registration table (and other data) for a
+ * net_device
+ */
+ /* netdev->init = &et131x_init; */
+ /* netdev->set_config = &et131x_config; */
+ netdev->watchdog_timeo = ET131X_TX_TIMEOUT;
+ netdev->netdev_ops = &et131x_netdev_ops;
+
+ /* netdev->ethtool_ops = &et131x_ethtool_ops; */
+
+ /* Poll? */
+ /* netdev->poll = &et131x_poll; */
+ /* netdev->poll_controller = &et131x_poll_controller; */
+ return netdev;
+}
+
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