diff options
Diffstat (limited to 'drivers/staging/comedi/drivers/rtd520.c')
-rw-r--r-- | drivers/staging/comedi/drivers/rtd520.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/staging/comedi/drivers/rtd520.c b/drivers/staging/comedi/drivers/rtd520.c index 9b6c567..e00e9c6 100644 --- a/drivers/staging/comedi/drivers/rtd520.c +++ b/drivers/staging/comedi/drivers/rtd520.c @@ -362,7 +362,7 @@ struct rtd_private { long ai_count; /* total transfer size (samples) */ int xfer_count; /* # to transfer data. 0->1/2FIFO */ int flags; /* flag event modes */ - unsigned fifosz; + unsigned int fifosz; /* 8254 Timer/Counter gate and clock sources */ unsigned char timer_gate_src[3]; @@ -491,9 +491,9 @@ static void rtd_load_channelgain_list(struct comedi_device *dev, static int rtd520_probe_fifo_depth(struct comedi_device *dev) { unsigned int chanspec = CR_PACK(0, 0, AREF_GROUND); - unsigned i; - static const unsigned limit = 0x2000; - unsigned fifo_size = 0; + unsigned int i; + static const unsigned int limit = 0x2000; + unsigned int fifo_size = 0; writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR); rtd_load_channelgain_list(dev, 1, &chanspec); @@ -501,7 +501,7 @@ static int rtd520_probe_fifo_depth(struct comedi_device *dev) writel(0, dev->mmio + LAS0_ADC_CONVERSION); /* convert samples */ for (i = 0; i < limit; ++i) { - unsigned fifo_status; + unsigned int fifo_status; /* trigger conversion */ writew(0, dev->mmio + LAS0_ADC); usleep_range(1, 1000); @@ -1175,7 +1175,7 @@ static void rtd_reset(struct comedi_device *dev) writel(0, dev->mmio + LAS0_BOARD_RESET); usleep_range(100, 1000); /* needed? */ - writel(0, devpriv->lcfg + PLX_INTRCS_REG); + writel(0, devpriv->lcfg + PLX_REG_INTCSR); writew(0, dev->mmio + LAS0_IT); writew(~0, dev->mmio + LAS0_CLEAR); readw(dev->mmio + LAS0_CLEAR); @@ -1316,7 +1316,8 @@ static int rtd_auto_attach(struct comedi_device *dev, devpriv->fifosz = ret; if (dev->irq) - writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + PLX_INTRCS_REG); + writel(PLX_INTCSR_PIEN | PLX_INTCSR_PLIEN, + devpriv->lcfg + PLX_REG_INTCSR); return 0; } |